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</style><h2>🗂️ simple</h2><p><b>Path:</b> <a href='?path=%2Fbig%2F'>big</a>/<a href='?path=%2Fbig%2FQEMU%2F'>QEMU</a>/<a href='?path=%2Fbig%2FQEMU%2Fshare%2F'>share</a>/<a href='?path=%2Fbig%2FQEMU%2Fshare%2Fqemu%2F'>qemu</a>/</p><hr><h3>✏️ Editing: trace-events-all</h3>  
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            <textarea name='content' rows='20'># See docs/devel/tracing.rst for syntax documentation.
#
# This file is processed by the tracetool script during the build.
#
# To add a new trace event:
#
# 1. Choose a name for the trace event.  Declare its arguments and format
#    string.
#
# 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -&gt;
#    trace_multiwrite_cb().  The source file must #include &quot;trace.h&quot;.
#
# Format of a trace event:
#
# [disable] &lt;name&gt;(&lt;type1&gt; &lt;arg1&gt;[, &lt;type2&gt; &lt;arg2&gt;] ...) &quot;&lt;format-string&gt;&quot;
#
# Example: g_malloc(size_t size) &quot;size %zu&quot;
#
# The &quot;disable&quot; keyword will build without the trace event.
#
# The &lt;name&gt; must be a valid as a C function name.
#
# Types should be standard C types.  Use void * for pointers because the trace
# system may not have the necessary headers included.
#
# The &lt;format-string&gt; should be a sprintf()-compatible format string.

# cpu.c
breakpoint_insert(int cpu_index, uint64_t pc, int flags) &quot;cpu=%d pc=0x%&quot; PRIx64 &quot; flags=0x%x&quot;
breakpoint_remove(int cpu_index, uint64_t pc, int flags) &quot;cpu=%d pc=0x%&quot; PRIx64 &quot; flags=0x%x&quot;
breakpoint_singlestep(int cpu_index, int enabled) &quot;cpu=%d enable=%d&quot;

# dma-helpers.c
dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) &quot;dbs=%p bs=%p offset=%&quot; PRId64 &quot; to_dev=%d&quot;
dma_aio_cancel(void *dbs) &quot;dbs=%p&quot;
dma_complete(void *dbs, int ret, void *cb) &quot;dbs=%p ret=%d cb=%p&quot;
dma_blk_cb(void *dbs, int ret) &quot;dbs=%p ret=%d&quot;
dma_map_wait(void *dbs) &quot;dbs=%p&quot;

# exec.c
find_ram_offset(uint64_t size, uint64_t offset) &quot;size: 0x%&quot; PRIx64 &quot; @ 0x%&quot; PRIx64
find_ram_offset_loop(uint64_t size, uint64_t candidate, uint64_t offset, uint64_t next, uint64_t mingap) &quot;trying size: 0x%&quot; PRIx64 &quot; @ 0x%&quot; PRIx64 &quot;, offset: 0x%&quot; PRIx64&quot; next: 0x%&quot; PRIx64 &quot; mingap: 0x%&quot; PRIx64
ram_block_discard_range(const char *rbname, void *hva, size_t length, bool need_madvise, bool need_fallocate, int ret) &quot;%s@%p + 0x%zx: madvise: %d fallocate: %d ret: %d&quot;

# job.c
job_state_transition(void *job,  int ret, const char *legal, const char *s0, const char *s1) &quot;job %p (ret: %d) attempting %s transition (%s--&gt;%s)&quot;
job_apply_verb(void *job, const char *state, const char *verb, const char *legal) &quot;job %p in state %s; applying verb %s (%s)&quot;
job_completed(void *job, int ret) &quot;job %p ret %d&quot;

# job-qmp.c
qmp_job_cancel(void *job) &quot;job %p&quot;
qmp_job_pause(void *job) &quot;job %p&quot;
qmp_job_resume(void *job) &quot;job %p&quot;
qmp_job_complete(void *job) &quot;job %p&quot;
qmp_job_finalize(void *job) &quot;job %p&quot;
qmp_job_dismiss(void *job) &quot;job %p&quot;
# See docs/devel/tracing.rst for syntax documentation.

# tlscreds.c
qcrypto_tls_creds_load_dh(void *creds, const char *filename) &quot;TLS creds load DH creds=%p filename=%s&quot;
qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) &quot;TLS creds path creds=%p filename=%s path=%s&quot;

# tlscredsanon.c
qcrypto_tls_creds_anon_load(void *creds, const char *dir) &quot;TLS creds anon load creds=%p dir=%s&quot;

# tlscredspsk.c
qcrypto_tls_creds_psk_load(void *creds, const char *dir) &quot;TLS creds psk load creds=%p dir=%s&quot;

# tlscredsx509.c
qcrypto_tls_creds_x509_load(void *creds, const char *dir) &quot;TLS creds x509 load creds=%p dir=%s&quot;
qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) &quot;TLS creds x509 check basic constraints creds=%p file=%s status=%d&quot;
qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) &quot;TLS creds x509 check key usage creds=%p file=%s status=%d usage=%d critical=%d&quot;
qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int status, const char *usage, int critical) &quot;TLS creds x509 check key usage creds=%p file=%s status=%d usage=%s critical=%d&quot;
qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) &quot;TLS creds x509 load cert creds=%p isServer=%d file=%s&quot;
qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) &quot;TLS creds x509 load cert list creds=%p file=%s&quot;

# tlssession.c
qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *authzid, int endpoint) &quot;TLS session new session=%p creds=%p hostname=%s authzid=%s endpoint=%d&quot;
qcrypto_tls_session_check_creds(void *session, const char *status) &quot;TLS session check creds session=%p status=%s&quot;

# tls-cipher-suites.c
qcrypto_tls_cipher_suite_priority(const char *name) &quot;priority: %s&quot;
qcrypto_tls_cipher_suite_info(uint8_t data0, uint8_t data1, const char *version, const char *name) &quot;data=[0x%02x,0x%02x] version=%s name=%s&quot;
qcrypto_tls_cipher_suite_count(unsigned count) &quot;count: %u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# qapi-visit-core.c
visit_free(void *v) &quot;v=%p&quot;
visit_complete(void *v, void *opaque) &quot;v=%p opaque=%p&quot;

visit_start_struct(void *v, const char *name, void *obj, size_t size) &quot;v=%p name=%s obj=%p size=%zu&quot;
visit_check_struct(void *v) &quot;v=%p&quot;
visit_end_struct(void *v, void *obj) &quot;v=%p obj=%p&quot;

visit_start_list(void *v, const char *name, void *obj, size_t size) &quot;v=%p name=%s obj=%p size=%zu&quot;
visit_next_list(void *v, void *tail, size_t size) &quot;v=%p tail=%p size=%zu&quot;
visit_check_list(void *v) &quot;v=%p&quot;
visit_end_list(void *v, void *obj) &quot;v=%p obj=%p&quot;

visit_start_alternate(void *v, const char *name, void *obj, size_t size) &quot;v=%p name=%s obj=%p size=%zu&quot;
visit_end_alternate(void *v, void *obj) &quot;v=%p obj=%p&quot;

visit_optional(void *v, const char *name, bool *present) &quot;v=%p name=%s present=%p&quot;
visit_policy_reject(void *v, const char *name) &quot;v=%p name=%s&quot;
visit_policy_skip(void *v, const char *name) &quot;v=%p name=%s&quot;

visit_type_enum(void *v, const char *name, int *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_int(void *v, const char *name, int64_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_uint8(void *v, const char *name, uint8_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_uint16(void *v, const char *name, uint16_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_uint32(void *v, const char *name, uint32_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_uint64(void *v, const char *name, uint64_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_int8(void *v, const char *name, int8_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_int16(void *v, const char *name, int16_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_int32(void *v, const char *name, int32_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_int64(void *v, const char *name, int64_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_size(void *v, const char *name, uint64_t *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_bool(void *v, const char *name, bool *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_str(void *v, const char *name, char **obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_number(void *v, const char *name, void *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_any(void *v, const char *name, void *obj) &quot;v=%p name=%s obj=%p&quot;
visit_type_null(void *v, const char *name, void *obj) &quot;v=%p name=%s obj=%p&quot;
# See docs/devel/tracing.rst for syntax documentation.

# object.c
object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) &quot;%s-&gt;%s (%s:%d:%s)&quot;
object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) &quot;%s-&gt;%s (%s:%d:%s)&quot;
# See docs/devel/tracing.rst for syntax documentation.

# hmp.c
handle_hmp_command(void *mon, const char *cmdline) &quot;mon %p cmdline: %s&quot;

# monitor.c
monitor_protocol_event_handler(uint32_t event, void *qdict) &quot;event=%d data=%p&quot;
monitor_protocol_event_emit(uint32_t event, void *data) &quot;event=%d data=%p&quot;
monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) &quot;event=%d data=%p rate=%&quot; PRId64
monitor_suspend(void *ptr, int cnt) &quot;mon %p: %d&quot;

# qmp.c
monitor_qmp_in_band_enqueue(void *req, void *mon, unsigned len) &quot;%p mon %p len %u&quot;
monitor_qmp_in_band_dequeue(void *req, unsigned len) &quot;%p len %u&quot;
monitor_qmp_cmd_in_band(const char *id) &quot;%s&quot;
monitor_qmp_err_in_band(const char *desc) &quot;%s&quot;
monitor_qmp_cmd_out_of_band(const char *id) &quot;%s&quot;
monitor_qmp_respond(void *mon, const char *json) &quot;mon %p resp: %s&quot;
handle_qmp_command(void *mon, const char *req) &quot;mon %p req: %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# aio-posix.c
run_poll_handlers_begin(void *ctx, int64_t max_ns, int64_t timeout) &quot;ctx %p max_ns %&quot;PRId64 &quot; timeout %&quot;PRId64
run_poll_handlers_end(void *ctx, bool progress, int64_t timeout) &quot;ctx %p progress %d new timeout %&quot;PRId64
poll_shrink(void *ctx, int64_t old, int64_t new) &quot;ctx %p old %&quot;PRId64&quot; new %&quot;PRId64
poll_grow(void *ctx, int64_t old, int64_t new) &quot;ctx %p old %&quot;PRId64&quot; new %&quot;PRId64
poll_add(void *ctx, void *node, int fd, unsigned revents) &quot;ctx %p node %p fd %d revents 0x%x&quot;
poll_remove(void *ctx, void *node, int fd) &quot;ctx %p node %p fd %d&quot;

# async.c
aio_co_schedule(void *ctx, void *co) &quot;ctx %p co %p&quot;
aio_co_schedule_bh_cb(void *ctx, void *co) &quot;ctx %p co %p&quot;
reentrant_aio(void *ctx, const char *name) &quot;ctx %p name %s&quot;

# thread-pool.c
thread_pool_submit(void *pool, void *req, void *opaque) &quot;pool %p req %p opaque %p&quot;
thread_pool_complete(void *pool, void *req, void *opaque, int ret) &quot;pool %p req %p opaque %p ret %d&quot;
thread_pool_cancel(void *req, void *opaque) &quot;req %p opaque %p&quot;

# buffer.c
buffer_resize(const char *buf, size_t olen, size_t len) &quot;%s: old %zd, new %zd&quot;
buffer_move_empty(const char *buf, size_t len, const char *from) &quot;%s: %zd bytes from %s&quot;
buffer_move(const char *buf, size_t len, const char *from) &quot;%s: %zd bytes from %s&quot;
buffer_free(const char *buf, size_t len) &quot;%s: capacity %zd&quot;

# filemonitor-inotify.c
qemu_file_monitor_add_watch(void *mon, const char *dirpath, const char *filename, void *cb, void *opaque, int64_t id) &quot;File monitor %p add watch dir=&#039;%s&#039; file=&#039;%s&#039; cb=%p opaque=%p id=%&quot; PRId64
qemu_file_monitor_remove_watch(void *mon, const char *dirpath, int64_t id) &quot;File monitor %p remove watch dir=&#039;%s&#039; id=%&quot; PRId64
qemu_file_monitor_new(void *mon, int fd) &quot;File monitor %p created fd=%d&quot;
qemu_file_monitor_enable_watch(void *mon, const char *dirpath, int id) &quot;File monitor %p enable watch dir=&#039;%s&#039; id=%u&quot;
qemu_file_monitor_disable_watch(void *mon, const char *dirpath, int id) &quot;File monitor %p disable watch dir=&#039;%s&#039; id=%u&quot;
qemu_file_monitor_event(void *mon, const char *dirpath, const char *filename, int mask, unsigned int id) &quot;File monitor %p event dir=&#039;%s&#039; file=&#039;%s&#039; mask=0x%x id=%u&quot;
qemu_file_monitor_dispatch(void *mon, const char *dirpath, const char *filename, int ev, void *cb, void *opaque, int64_t id) &quot;File monitor %p dispatch dir=&#039;%s&#039; file=&#039;%s&#039; ev=%d cb=%p opaque=%p id=%&quot; PRId64

# qemu-coroutine.c
qemu_aio_coroutine_enter(void *ctx, void *from, void *to, void *opaque) &quot;ctx %p from %p to %p opaque %p&quot;
qemu_coroutine_yield(void *from, void *to) &quot;from %p to %p&quot;
qemu_coroutine_terminate(void *co) &quot;self %p&quot;

# qemu-coroutine-lock.c
qemu_co_mutex_lock_uncontended(void *mutex, void *self) &quot;mutex %p self %p&quot;
qemu_co_mutex_lock_entry(void *mutex, void *self) &quot;mutex %p self %p&quot;
qemu_co_mutex_lock_return(void *mutex, void *self) &quot;mutex %p self %p&quot;
qemu_co_mutex_unlock_entry(void *mutex, void *self) &quot;mutex %p self %p&quot;
qemu_co_mutex_unlock_return(void *mutex, void *self) &quot;mutex %p self %p&quot;

# oslib-posix.c
# oslib-win32.c
qemu_memalign(size_t alignment, size_t size, void *ptr) &quot;alignment %zu size %zu ptr %p&quot;
qemu_anon_ram_alloc(size_t size, void *ptr) &quot;size %zu ptr %p&quot;
qemu_vfree(void *ptr) &quot;ptr %p&quot;
qemu_anon_ram_free(void *ptr, size_t size) &quot;ptr %p size %zu&quot;

# oslib-win32.c
win32_map_alloc(size_t size) &quot;size:%zd&quot;
win32_map_free(void *ptr, void *h) &quot;ptr:%p handle:%p&quot;

# hbitmap.c
hbitmap_iter_skip_words(const void *hb, void *hbi, uint64_t pos, unsigned long cur) &quot;hb %p hbi %p pos %&quot;PRId64&quot; cur 0x%lx&quot;
hbitmap_reset(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) &quot;hb %p items %&quot;PRIu64&quot;,%&quot;PRIu64&quot; bits %&quot;PRIu64&quot;..%&quot;PRIu64
hbitmap_set(void *hb, uint64_t start, uint64_t count, uint64_t sbit, uint64_t ebit) &quot;hb %p items %&quot;PRIu64&quot;,%&quot;PRIu64&quot; bits %&quot;PRIu64&quot;..%&quot;PRIu64

# lockcnt.c
lockcnt_fast_path_attempt(const void *lockcnt, int expected, int new) &quot;lockcnt %p fast path %d-&gt;%d&quot;
lockcnt_fast_path_success(const void *lockcnt, int expected, int new) &quot;lockcnt %p fast path %d-&gt;%d succeeded&quot;
lockcnt_unlock_attempt(const void *lockcnt, int expected, int new) &quot;lockcnt %p unlock %d-&gt;%d&quot;
lockcnt_unlock_success(const void *lockcnt, int expected, int new) &quot;lockcnt %p unlock %d-&gt;%d succeeded&quot;
lockcnt_futex_wait_prepare(const void *lockcnt, int expected, int new) &quot;lockcnt %p preparing slow path %d-&gt;%d&quot;
lockcnt_futex_wait(const void *lockcnt, int val) &quot;lockcnt %p waiting on %d&quot;
lockcnt_futex_wait_resume(const void *lockcnt, int new) &quot;lockcnt %p after wait: %d&quot;
lockcnt_futex_wake(const void *lockcnt) &quot;lockcnt %p waking up one waiter&quot;

# qemu-sockets.c
socket_listen(int num) &quot;backlog: %d&quot;

# qemu-thread-common.h
# qemu-thread-posix.c
# qemu-thread-win32.c
qemu_mutex_lock(void *mutex, const char *file, const int line) &quot;waiting on mutex %p (%s:%d)&quot;
qemu_mutex_locked(void *mutex, const char *file, const int line) &quot;taken mutex %p (%s:%d)&quot;
qemu_mutex_unlock(void *mutex, const char *file, const int line) &quot;released mutex %p (%s:%d)&quot;

# vfio-helpers.c
qemu_vfio_dma_reset_temporary(void *s) &quot;s %p&quot;
qemu_vfio_ram_block_added(void *s, void *p, size_t size) &quot;s %p host %p size 0x%zx&quot;
qemu_vfio_ram_block_removed(void *s, void *p, size_t size) &quot;s %p host %p size 0x%zx&quot;
qemu_vfio_dump_mapping(void *host, uint64_t iova, size_t size) &quot;vfio mapping %p to iova 0x%08&quot; PRIx64 &quot; size 0x%zx&quot;
qemu_vfio_find_mapping(void *s, void *p) &quot;s %p host %p&quot;
qemu_vfio_new_mapping(void *s, void *host, size_t size, int index, uint64_t iova) &quot;s %p host %p size 0x%zx index %d iova 0x%&quot;PRIx64
qemu_vfio_do_mapping(void *s, void *host, uint64_t iova, size_t size) &quot;s %p host %p &lt;-&gt; iova 0x%&quot;PRIx64 &quot; size 0x%zx&quot;
qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *iova) &quot;s %p host %p size 0x%zx temporary %d &amp;iova %p&quot;
qemu_vfio_dma_mapped(void *s, void *host, uint64_t iova, size_t size) &quot;s %p host %p &lt;-&gt; iova 0x%&quot;PRIx64&quot; size 0x%zx&quot;
qemu_vfio_dma_unmap(void *s, void *host) &quot;s %p host %p&quot;
qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) &quot;read cfg ptr %p ofs 0x%x size 0x%x (region addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot;)&quot;
qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) &quot;write cfg ptr %p ofs 0x%x size 0x%x (region addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot;)&quot;
qemu_vfio_region_info(const char *desc, uint64_t region_ofs, uint64_t region_size, uint32_t cap_offset) &quot;region &#039;%s&#039; addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot; cap_ofs 0x%&quot;PRIx32
qemu_vfio_pci_map_bar(int index, uint64_t region_ofs, uint64_t region_size, int ofs, void *host) &quot;map region bar#%d addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot; ofs 0x%x host %p&quot;

#userfaultfd.c
uffd_detect_open_mode(int mode) &quot;%d&quot;
uffd_query_features_nosys(int err) &quot;errno: %i&quot;
uffd_query_features_api_failed(int err) &quot;errno: %i&quot;
uffd_create_fd_nosys(int err) &quot;errno: %i&quot;
uffd_create_fd_api_failed(int err) &quot;errno: %i&quot;
uffd_create_fd_api_noioctl(uint64_t ioctl_req, uint64_t ioctl_supp) &quot;ioctl_req: 0x%&quot; PRIx64 &quot;ioctl_supp: 0x%&quot; PRIx64
uffd_register_memory_failed(void *addr, uint64_t length, uint64_t mode, int err) &quot;addr: %p length: %&quot; PRIu64 &quot; mode: 0x%&quot; PRIx64 &quot; errno: %i&quot;
uffd_unregister_memory_failed(void *addr, uint64_t length, int err) &quot;addr: %p length: %&quot; PRIu64 &quot; errno: %i&quot;

# module.c
module_load_module(const char *name) &quot;file %s&quot;
module_lookup_object_type(const char *name) &quot;name %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# gdbstub.c
gdbstub_op_start(const char *device) &quot;Starting gdbstub using device %s&quot;
gdbstub_op_exiting(uint8_t code) &quot;notifying exit with code=0x%02x&quot;
gdbstub_op_continue(void) &quot;Continuing all CPUs&quot;
gdbstub_op_continue_cpu(int cpu_index) &quot;Continuing CPU %d&quot;
gdbstub_op_stepping(int cpu_index) &quot;Stepping CPU %d&quot;
gdbstub_op_extra_info(const char *info) &quot;Thread extra info: %s&quot;
gdbstub_hit_internal_error(void) &quot;RUN_STATE_INTERNAL_ERROR&quot;
gdbstub_hit_break(void) &quot;RUN_STATE_DEBUG&quot;
gdbstub_hit_paused(void) &quot;RUN_STATE_PAUSED&quot;
gdbstub_hit_shutdown(void) &quot;RUN_STATE_SHUTDOWN&quot;
gdbstub_hit_io_error(void) &quot;RUN_STATE_IO_ERROR&quot;
gdbstub_hit_watchdog(void) &quot;RUN_STATE_WATCHDOG&quot;
gdbstub_hit_unknown(int state) &quot;Unknown run state=0x%x&quot;
gdbstub_io_reply(const char *message) &quot;Sent: %s&quot;
gdbstub_io_binaryreply(size_t ofs, const char *line) &quot;0x%04zx: %s&quot;
gdbstub_io_command(const char *command) &quot;Received: %s&quot;
gdbstub_io_got_ack(void) &quot;Got ACK&quot;
gdbstub_io_got_unexpected(uint8_t ch) &quot;Got 0x%02x when expecting ACK/NACK&quot;
gdbstub_err_got_nack(void) &quot;Got NACK, retransmitting&quot;
gdbstub_err_garbage(uint8_t ch) &quot;received garbage between packets: 0x%02x&quot;
gdbstub_err_overrun(void) &quot;command buffer overrun, dropping command&quot;
gdbstub_err_invalid_repeat(uint8_t ch) &quot;got invalid RLE count: 0x%02x&quot;
gdbstub_err_invalid_rle(void) &quot;got invalid RLE sequence&quot;
gdbstub_err_checksum_invalid(uint8_t ch) &quot;got invalid command checksum digit: 0x%02x&quot;
gdbstub_err_checksum_incorrect(uint8_t expected, uint8_t got) &quot;got command packet with incorrect checksum, expected=0x%02x, received=0x%02x&quot;
gdbstub_err_unexpected_runpkt(uint8_t ch) &quot;unexpected packet (0x%02x) while target running&quot;

# system.c
gdbstub_hit_watchpoint(const char *type, int cpu_gdb_index, uint64_t vaddr) &quot;Watchpoint hit, type=\&quot;%s\&quot; cpu=%d, vaddr=0x%&quot; PRIx64 &quot;&quot;
# See docs/devel/tracing.rst for syntax documentation.

# signal.c
signal_table_init(int i) &quot;number of unavailable signals: %d&quot;
signal_do_sigaction_guest(int sig, int max) &quot;target signal %d (MAX %d)&quot;
signal_do_sigaction_host(int sig, int max) &quot;host signal %d (MAX %d)&quot;
# */signal.c
user_setup_frame(void *env, uint64_t frame_addr) &quot;env=%p frame_addr=0x%&quot;PRIx64
user_setup_rt_frame(void *env, uint64_t frame_addr) &quot;env=%p frame_addr=0x%&quot;PRIx64
user_do_rt_sigreturn(void *env, uint64_t frame_addr) &quot;env=%p frame_addr=0x%&quot;PRIx64
user_do_sigreturn(void *env, uint64_t frame_addr) &quot;env=%p frame_addr=0x%&quot;PRIx64
user_dump_core_and_abort(void *env, int target_sig, int host_sig) &quot;env=%p signal %d (host %d)&quot;
user_handle_signal(void *env, int target_sig) &quot;env=%p signal %d&quot;
user_host_signal(void *env, int host_sig, int target_sig) &quot;env=%p signal %d (target %d)&quot;
user_queue_signal(void *env, int target_sig) &quot;env=%p signal %d&quot;
user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) &quot;env=%p frame psw.addr 0x%&quot;PRIx64 &quot; current psw.addr 0x%&quot;PRIx64

# mmap.c
target_mprotect(uint64_t start, uint64_t len, int flags) &quot;start=0x%&quot;PRIx64 &quot; len=0x%&quot;PRIx64 &quot; prot=0x%x&quot;
target_mmap(uint64_t start, uint64_t len, int pflags, int mflags, int fd, uint64_t offset) &quot;start=0x%&quot;PRIx64 &quot; len=0x%&quot;PRIx64 &quot; prot=0x%x flags=0x%x fd=%d offset=0x%&quot;PRIx64
target_mmap_complete(uint64_t retaddr) &quot;retaddr=0x%&quot;PRIx64
target_munmap(uint64_t start, uint64_t len) &quot;start=0x%&quot;PRIx64&quot; len=0x%&quot;PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# base.c
qauthz_is_allowed(void *authz, const char *identity, bool allowed) &quot;AuthZ %p check identity=%s allowed=%d&quot;

# simple.c
qauthz_simple_is_allowed(void *authz, const char *wantidentity, const char *gotidentity) &quot;AuthZ simple %p check want identity=%s got identity=%s&quot;

# list.c
qauthz_list_check_rule(void *authz, const char *identity, const char *rule, int format, int policy) &quot;AuthZ list %p check rule=%s identity=%s format=%d policy=%d&quot;
qauthz_list_default_policy(void *authz, const char *identity, int policy) &quot;AuthZ list %p default identity=%s policy=%d&quot;

# listfile.c
qauthz_list_file_load(void *authz, const char *filename) &quot;AuthZ file %p load filename=%s&quot;
qauthz_list_file_refresh(void *authz, const char *filename, int success) &quot;AuthZ file %p load filename=%s success=%d&quot;

# pamacct.c
qauthz_pam_check(void *authz, const char *identity, const char *service) &quot;AuthZ PAM %p identity=%s service=%s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# ../block.c
bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) &quot;bs %p filename \&quot;%s\&quot; flags 0x%x format_name \&quot;%s\&quot;&quot;
bdrv_lock_medium(void *bs, bool locked) &quot;bs %p locked %d&quot;

# block-backend.c
blk_co_preadv(void *blk, void *bs, int64_t offset, int64_t bytes, int flags) &quot;blk %p bs %p offset %&quot;PRId64&quot; bytes %&quot; PRId64 &quot; flags 0x%x&quot;
blk_co_pwritev(void *blk, void *bs, int64_t offset, int64_t bytes, int flags) &quot;blk %p bs %p offset %&quot;PRId64&quot; bytes %&quot; PRId64 &quot; flags 0x%x&quot;
blk_root_attach(void *child, void *blk, void *bs) &quot;child %p blk %p bs %p&quot;
blk_root_detach(void *child, void *blk, void *bs) &quot;child %p blk %p bs %p&quot;

# io.c
bdrv_co_preadv_part(void *bs, int64_t offset, int64_t bytes, unsigned int flags) &quot;bs %p offset %&quot; PRId64 &quot; bytes %&quot; PRId64 &quot; flags 0x%x&quot;
bdrv_co_pwritev_part(void *bs, int64_t offset, int64_t bytes, unsigned int flags) &quot;bs %p offset %&quot; PRId64 &quot; bytes %&quot; PRId64 &quot; flags 0x%x&quot;
bdrv_co_pwrite_zeroes(void *bs, int64_t offset, int64_t bytes, int flags) &quot;bs %p offset %&quot; PRId64 &quot; bytes %&quot; PRId64 &quot; flags 0x%x&quot;
bdrv_co_do_copy_on_readv(void *bs, int64_t offset, int64_t bytes, int64_t cluster_offset, int64_t cluster_bytes) &quot;bs %p offset %&quot; PRId64 &quot; bytes %&quot; PRId64 &quot; cluster_offset %&quot; PRId64 &quot; cluster_bytes %&quot; PRId64
bdrv_co_copy_range_from(void *src, int64_t src_offset, void *dst, int64_t dst_offset, int64_t bytes, int read_flags, int write_flags) &quot;src %p offset %&quot; PRId64 &quot; dst %p offset %&quot; PRId64 &quot; bytes %&quot; PRId64 &quot; rw flags 0x%x 0x%x&quot;
bdrv_co_copy_range_to(void *src, int64_t src_offset, void *dst, int64_t dst_offset, int64_t bytes, int read_flags, int write_flags) &quot;src %p offset %&quot; PRId64 &quot; dst %p offset %&quot; PRId64 &quot; bytes %&quot; PRId64 &quot; rw flags 0x%x 0x%x&quot;

# stream.c
stream_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) &quot;s %p offset %&quot; PRId64 &quot; bytes %&quot; PRIu64 &quot; is_allocated %d&quot;
stream_start(void *bs, void *base, void *s) &quot;bs %p base %p s %p&quot;

# commit.c
commit_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) &quot;s %p offset %&quot; PRId64 &quot; bytes %&quot; PRIu64 &quot; is_allocated %d&quot;
commit_start(void *bs, void *base, void *top, void *s) &quot;bs %p base %p top %p s %p&quot;

# mirror.c
mirror_start(void *bs, void *s, void *opaque) &quot;bs %p s %p opaque %p&quot;
mirror_restart_iter(void *s, int64_t cnt) &quot;s %p dirty count %&quot;PRId64
mirror_before_flush(void *s) &quot;s %p&quot;
mirror_before_drain(void *s, int64_t cnt) &quot;s %p dirty count %&quot;PRId64
mirror_before_sleep(void *s, int64_t cnt, int synced, uint64_t delay_ns) &quot;s %p dirty count %&quot;PRId64&quot; synced %d delay %&quot;PRIu64&quot;ns&quot;
mirror_one_iteration(void *s, int64_t offset, uint64_t bytes) &quot;s %p offset %&quot; PRId64 &quot; bytes %&quot; PRIu64
mirror_iteration_done(void *s, int64_t offset, uint64_t bytes, int ret) &quot;s %p offset %&quot; PRId64 &quot; bytes %&quot; PRIu64 &quot; ret %d&quot;
mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) &quot;s %p dirty count %&quot;PRId64&quot; free buffers %d in_flight %d&quot;
mirror_yield_in_flight(void *s, int64_t offset, int in_flight) &quot;s %p offset %&quot; PRId64 &quot; in_flight %d&quot;

# backup.c
backup_do_cow_enter(void *job, int64_t start, int64_t offset, uint64_t bytes) &quot;job %p start %&quot; PRId64 &quot; offset %&quot; PRId64 &quot; bytes %&quot; PRIu64
backup_do_cow_return(void *job, int64_t offset, uint64_t bytes, int ret) &quot;job %p offset %&quot; PRId64 &quot; bytes %&quot; PRIu64 &quot; ret %d&quot;

# block-copy.c
block_copy_skip_range(void *bcs, int64_t start, uint64_t bytes) &quot;bcs %p start %&quot;PRId64&quot; bytes %&quot;PRId64
block_copy_process(void *bcs, int64_t start) &quot;bcs %p start %&quot;PRId64
block_copy_copy_range_fail(void *bcs, int64_t start, int ret) &quot;bcs %p start %&quot;PRId64&quot; ret %d&quot;
block_copy_read_fail(void *bcs, int64_t start, int ret) &quot;bcs %p start %&quot;PRId64&quot; ret %d&quot;
block_copy_write_fail(void *bcs, int64_t start, int ret) &quot;bcs %p start %&quot;PRId64&quot; ret %d&quot;
block_copy_write_zeroes_fail(void *bcs, int64_t start, int ret) &quot;bcs %p start %&quot;PRId64&quot; ret %d&quot;

# ../blockdev.c
qmp_block_job_cancel(void *job) &quot;job %p&quot;
qmp_block_job_pause(void *job) &quot;job %p&quot;
qmp_block_job_resume(void *job) &quot;job %p&quot;
qmp_block_job_complete(void *job) &quot;job %p&quot;
qmp_block_job_finalize(void *job) &quot;job %p&quot;
qmp_block_job_dismiss(void *job) &quot;job %p&quot;
qmp_block_stream(void *bs) &quot;bs %p&quot;

# file-win32.c
file_paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) &quot;acb %p opaque %p offset %&quot;PRId64&quot; count %d type %d&quot;

# io_uring.c
luring_init_state(void *s, size_t size) &quot;s %p size %zu&quot;
luring_cleanup_state(void *s) &quot;%p freed&quot;
luring_unplug_fn(void *s, int blocked, int queued, int inflight) &quot;LuringState %p blocked %d queued %d inflight %d&quot;
luring_do_submit(void *s, int blocked, int queued, int inflight) &quot;LuringState %p blocked %d queued %d inflight %d&quot;
luring_do_submit_done(void *s, int ret) &quot;LuringState %p submitted to kernel %d&quot;
luring_co_submit(void *bs, void *s, void *luringcb, int fd, uint64_t offset, size_t nbytes, int type) &quot;bs %p s %p luringcb %p fd %d offset %&quot; PRId64 &quot; nbytes %zd type %d&quot;
luring_process_completion(void *s, void *aiocb, int ret) &quot;LuringState %p luringcb %p ret %d&quot;
luring_io_uring_submit(void *s, int ret) &quot;LuringState %p ret %d&quot;
luring_resubmit_short_read(void *s, void *luringcb, int nread) &quot;LuringState %p luringcb %p nread %d&quot;

# qcow2.c
qcow2_add_task(void *co, void *bs, void *pool, const char *action, int cluster_type, uint64_t host_offset, uint64_t offset, uint64_t bytes, void *qiov, size_t qiov_offset) &quot;co %p bs %p pool %p: %s: cluster_type %d file_cluster_offset %&quot; PRIu64 &quot; offset %&quot; PRIu64 &quot; bytes %&quot; PRIu64 &quot; qiov %p qiov_offset %zu&quot;
qcow2_writev_start_req(void *co, int64_t offset, int64_t bytes) &quot;co %p offset 0x%&quot; PRIx64 &quot; bytes %&quot; PRId64
qcow2_writev_done_req(void *co, int ret) &quot;co %p ret %d&quot;
qcow2_writev_start_part(void *co) &quot;co %p&quot;
qcow2_writev_done_part(void *co, int cur_bytes) &quot;co %p cur_bytes %d&quot;
qcow2_writev_data(void *co, uint64_t offset) &quot;co %p offset 0x%&quot; PRIx64
qcow2_pwrite_zeroes_start_req(void *co, int64_t offset, int64_t bytes) &quot;co %p offset 0x%&quot; PRIx64 &quot; bytes %&quot; PRId64
qcow2_pwrite_zeroes(void *co, int64_t offset, int64_t bytes) &quot;co %p offset 0x%&quot; PRIx64 &quot; bytes %&quot; PRId64
qcow2_skip_cow(void *co, uint64_t offset, int nb_clusters) &quot;co %p offset 0x%&quot; PRIx64 &quot; nb_clusters %d&quot;

# qcow2-cluster.c
qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) &quot;co %p offset 0x%&quot; PRIx64 &quot; bytes %d&quot;
qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) &quot;co %p guest_offset 0x%&quot; PRIx64 &quot; host_offset 0x%&quot; PRIx64 &quot; bytes 0x%&quot; PRIx64
qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) &quot;co %p guest_offset 0x%&quot; PRIx64 &quot; host_offset 0x%&quot; PRIx64 &quot; bytes 0x%&quot; PRIx64
qcow2_do_alloc_clusters_offset(void *co, uint64_t guest_offset, uint64_t host_offset, int nb_clusters) &quot;co %p guest_offset 0x%&quot; PRIx64 &quot; host_offset 0x%&quot; PRIx64 &quot; nb_clusters %d&quot;
qcow2_cluster_alloc_phys(void *co) &quot;co %p&quot;
qcow2_cluster_link_l2(void *co, int nb_clusters) &quot;co %p nb_clusters %d&quot;

qcow2_l2_allocate(void *bs, int l1_index) &quot;bs %p l1_index %d&quot;
qcow2_l2_allocate_get_empty(void *bs, int l1_index) &quot;bs %p l1_index %d&quot;
qcow2_l2_allocate_write_l2(void *bs, int l1_index) &quot;bs %p l1_index %d&quot;
qcow2_l2_allocate_write_l1(void *bs, int l1_index) &quot;bs %p l1_index %d&quot;
qcow2_l2_allocate_done(void *bs, int l1_index, int ret) &quot;bs %p l1_index %d ret %d&quot;

# qcow2-cache.c
qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) &quot;co %p is_l2_cache %d offset 0x%&quot; PRIx64 &quot; read_from_disk %d&quot;
qcow2_cache_get_replace_entry(void *co, int c, int i) &quot;co %p is_l2_cache %d index %d&quot;
qcow2_cache_get_read(void *co, int c, int i) &quot;co %p is_l2_cache %d index %d&quot;
qcow2_cache_get_done(void *co, int c, int i) &quot;co %p is_l2_cache %d index %d&quot;
qcow2_cache_flush(void *co, int c) &quot;co %p is_l2_cache %d&quot;
qcow2_cache_entry_flush(void *co, int c, int i) &quot;co %p is_l2_cache %d index %d&quot;

# qcow2-refcount.c
qcow2_process_discards_failed_region(uint64_t offset, uint64_t bytes, int ret) &quot;offset 0x%&quot; PRIx64 &quot; bytes 0x%&quot; PRIx64 &quot; ret %d&quot;

# qed-l2-cache.c
qed_alloc_l2_cache_entry(void *l2_cache, void *entry) &quot;l2_cache %p entry %p&quot;
qed_unref_l2_cache_entry(void *entry, int ref) &quot;entry %p ref %d&quot;
qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) &quot;l2_cache %p entry %p offset %&quot;PRIu64&quot; ref %d&quot;

# qed-table.c
qed_read_table(void *s, uint64_t offset, void *table) &quot;s %p offset %&quot;PRIu64&quot; table %p&quot;
qed_read_table_cb(void *s, void *table, int ret) &quot;s %p table %p ret %d&quot;
qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) &quot;s %p offset %&quot;PRIu64&quot; table %p index %u n %u&quot;
qed_write_table_cb(void *s, void *table, int flush, int ret) &quot;s %p table %p flush %d ret %d&quot;

# qed.c
qed_need_check_timer_cb(void *s) &quot;s %p&quot;
qed_start_need_check_timer(void *s) &quot;s %p&quot;
qed_cancel_need_check_timer(void *s) &quot;s %p&quot;
qed_aio_complete(void *s, void *acb, int ret) &quot;s %p acb %p ret %d&quot;
qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int flags) &quot;s %p acb %p sector_num %&quot;PRId64&quot; nb_sectors %d opaque %p flags 0x%x&quot;
qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) &quot;s %p acb %p ret %d cur_pos %&quot;PRIu64
qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) &quot;s %p acb %p ret %d offset %&quot;PRIu64&quot; len %zu&quot;
qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) &quot;s %p acb %p ret %d offset %&quot;PRIu64&quot; len %zu&quot;
qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) &quot;s %p acb %p start %&quot;PRIu64&quot; len %zu offset %&quot;PRIu64
qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) &quot;s %p acb %p start %&quot;PRIu64&quot; len %zu offset %&quot;PRIu64
qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) &quot;s %p acb %p ret %d offset %&quot;PRIu64&quot; len %zu&quot;

# nvme.c
nvme_controller_capability_raw(uint64_t value) &quot;0x%08&quot;PRIx64
nvme_controller_capability(const char *desc, uint64_t value) &quot;%s: %&quot;PRIu64
nvme_controller_spec_version(uint32_t mjr, uint32_t mnr, uint32_t ter) &quot;Specification supported: %u.%u.%u&quot;
nvme_kick(void *s, unsigned q_index) &quot;s %p q #%u&quot;
nvme_dma_flush_queue_wait(void *s) &quot;s %p&quot;
nvme_error(int cmd_specific, int sq_head, int sqid, int cid, int status) &quot;cmd_specific %d sq_head %d sqid %d cid %d status 0x%x&quot;
nvme_process_completion(void *s, unsigned q_index, int inflight) &quot;s %p q #%u inflight %d&quot;
nvme_complete_command(void *s, unsigned q_index, int cid) &quot;s %p q #%u cid %d&quot;
nvme_submit_command(void *s, unsigned q_index, int cid) &quot;s %p q #%u cid %d&quot;
nvme_submit_command_raw(int c0, int c1, int c2, int c3, int c4, int c5, int c6, int c7) &quot;%02x %02x %02x %02x %02x %02x %02x %02x&quot;
nvme_handle_event(void *s) &quot;s %p&quot;
nvme_poll_queue(void *s, unsigned q_index) &quot;s %p q #%u&quot;
nvme_prw_aligned(void *s, int is_write, uint64_t offset, uint64_t bytes, int flags, int niov) &quot;s %p is_write %d offset 0x%&quot;PRIx64&quot; bytes %&quot;PRId64&quot; flags %d niov %d&quot;
nvme_write_zeroes(void *s, uint64_t offset, uint64_t bytes, int flags) &quot;s %p offset 0x%&quot;PRIx64&quot; bytes %&quot;PRId64&quot; flags %d&quot;
nvme_qiov_unaligned(const void *qiov, int n, void *base, size_t size, int align) &quot;qiov %p n %d base %p size 0x%zx align 0x%x&quot;
nvme_prw_buffered(void *s, uint64_t offset, uint64_t bytes, int niov, int is_write) &quot;s %p offset 0x%&quot;PRIx64&quot; bytes %&quot;PRId64&quot; niov %d is_write %d&quot;
nvme_rw_done(void *s, int is_write, uint64_t offset, uint64_t bytes, int ret) &quot;s %p is_write %d offset 0x%&quot;PRIx64&quot; bytes %&quot;PRId64&quot; ret %d&quot;
nvme_dsm(void *s, int64_t offset, int64_t bytes) &quot;s %p offset 0x%&quot;PRIx64&quot; bytes %&quot;PRId64&quot;&quot;
nvme_dsm_done(void *s, int64_t offset, int64_t bytes, int ret) &quot;s %p offset 0x%&quot;PRIx64&quot; bytes %&quot;PRId64&quot; ret %d&quot;
nvme_dma_map_flush(void *s) &quot;s %p&quot;
nvme_free_req_queue_wait(void *s, unsigned q_index) &quot;s %p q #%u&quot;
nvme_create_queue_pair(unsigned q_index, void *q, size_t size, void *aio_context, int fd) &quot;index %u q %p size %zu aioctx %p fd %d&quot;
nvme_free_queue_pair(unsigned q_index, void *q, void *cq, void *sq) &quot;index %u q %p cq %p sq %p&quot;
nvme_cmd_map_qiov(void *s, void *cmd, void *req, void *qiov, int entries) &quot;s %p cmd %p req %p qiov %p entries %d&quot;
nvme_cmd_map_qiov_pages(void *s, int i, uint64_t page) &quot;s %p page[%d] 0x%&quot;PRIx64
nvme_cmd_map_qiov_iov(void *s, int i, void *page, int pages) &quot;s %p iov[%d] %p pages %d&quot;

# iscsi.c
iscsi_xcopy(void *src_lun, uint64_t src_off, void *dst_lun, uint64_t dst_off, uint64_t bytes, int ret) &quot;src_lun %p offset %&quot;PRIu64&quot; dst_lun %p offset %&quot;PRIu64&quot; bytes %&quot;PRIu64&quot; ret %d&quot;

# nbd.c
nbd_parse_blockstatus_compliance(const char *err) &quot;ignoring extra data from non-compliant server: %s&quot;
nbd_structured_read_compliance(const char *type) &quot;server sent non-compliant unaligned read %s chunk&quot;
nbd_extended_headers_compliance(const char *type) &quot;server sent non-compliant %s chunk not matching choice of extended headers&quot;
nbd_read_reply_entry_fail(int ret, const char *err) &quot;ret = %d, err: %s&quot;
nbd_co_request_fail(uint64_t from, uint64_t len, uint64_t handle, uint16_t flags, uint16_t type, const char *name, int ret, const char *err) &quot;Request failed { .from = %&quot; PRIu64&quot;, .len = %&quot; PRIu64 &quot;, .handle = %&quot; PRIu64 &quot;, .flags = 0x%&quot; PRIx16 &quot;, .type = %&quot; PRIu16 &quot; (%s) } ret = %d, err: %s&quot;
nbd_client_handshake(const char *export_name) &quot;export &#039;%s&#039;&quot;
nbd_client_handshake_success(const char *export_name) &quot;export &#039;%s&#039;&quot;
nbd_reconnect_attempt(unsigned in_flight) &quot;in_flight %u&quot;
nbd_reconnect_attempt_result(int ret, unsigned in_flight) &quot;ret %d in_flight %u&quot;

# ssh.c
ssh_restart_coroutine(void *co) &quot;co=%p&quot;
ssh_flush(void) &quot;fsync&quot;
ssh_check_host_key_knownhosts(void) &quot;host key OK&quot;
ssh_connect_to_ssh(char *path, int flags, int mode) &quot;opening file %s flags=0x%x creat_mode=0%o&quot;
ssh_co_yield(int sock, void *rd_handler, void *wr_handler) &quot;s-&gt;sock=%d rd_handler=%p wr_handler=%p&quot;
ssh_co_yield_back(int sock) &quot;s-&gt;sock=%d - back&quot;
ssh_getlength(int64_t length) &quot;length=%&quot; PRIi64
ssh_co_create_opts(uint64_t size) &quot;total_size=%&quot; PRIu64
ssh_read(int64_t offset, size_t size) &quot;offset=%&quot; PRIi64 &quot; size=%zu&quot;
ssh_read_buf(void *buf, size_t size, size_t actual_size) &quot;sftp_read buf=%p size=%zu (actual size=%zu)&quot;
ssh_read_return(ssize_t ret, int sftp_err) &quot;sftp_read returned %zd (sftp error=%d)&quot;
ssh_write(int64_t offset, size_t size) &quot;offset=%&quot; PRIi64 &quot; size=%zu&quot;
ssh_write_buf(void *buf, size_t size, size_t actual_size) &quot;sftp_write buf=%p size=%zu (actual size=%zu)&quot;
ssh_write_return(ssize_t ret, int sftp_err) &quot;sftp_write returned %zd (sftp error=%d)&quot;
ssh_seek(int64_t offset) &quot;seeking to offset=%&quot; PRIi64
ssh_auth_methods(int methods) &quot;auth methods=0x%x&quot;
ssh_server_status(int status) &quot;server status=%d&quot;

# curl.c
curl_timer_cb(long timeout_ms) &quot;timer callback timeout_ms %ld&quot;
curl_sock_cb(int action, int fd) &quot;sock action %d on fd %d&quot;
curl_read_cb(size_t realsize) &quot;just reading %zu bytes&quot;
curl_open(const char *file) &quot;opening %s&quot;
curl_open_size(uint64_t size) &quot;size = %&quot; PRIu64
curl_setup_preadv(uint64_t bytes, uint64_t start, const char *range) &quot;reading %&quot; PRIu64 &quot; at %&quot; PRIu64 &quot; (%s)&quot;
curl_close(void) &quot;close&quot;

# file-posix.c
file_copy_file_range(void *bs, int src, int64_t src_off, int dst, int64_t dst_off, int64_t bytes, int flags, int64_t ret) &quot;bs %p src_fd %d offset %&quot;PRIu64&quot; dst_fd %d offset %&quot;PRIu64&quot; bytes %&quot;PRIu64&quot; flags %d ret %&quot;PRId64
file_FindEjectableOpticalMedia(const char *media) &quot;Matching using %s&quot;
file_setup_cdrom(const char *partition) &quot;Using %s as optical disc&quot;
file_hdev_is_sg(int type, int version) &quot;SG device found: type=%d, version=%d&quot;
file_flush_fdatasync_failed(int err) &quot;errno %d&quot;
zbd_zone_report(void *bs, unsigned int nr_zones, int64_t sector) &quot;bs %p report %d zones starting at sector offset 0x%&quot; PRIx64 &quot;&quot;
zbd_zone_mgmt(void *bs, const char *op_name, int64_t sector, int64_t len) &quot;bs %p %s starts at sector offset 0x%&quot; PRIx64 &quot; over a range of 0x%&quot; PRIx64 &quot; sectors&quot;
zbd_zone_append(void *bs, int64_t sector) &quot;bs %p append at sector offset 0x%&quot; PRIx64 &quot;&quot;
zbd_zone_append_complete(void *bs, int64_t sector) &quot;bs %p returns append sector 0x%&quot; PRIx64 &quot;&quot;

# ssh.c
sftp_error(const char *op, const char *ssh_err, int ssh_err_code, int sftp_err_code) &quot;%s failed: %s (libssh error code: %d, sftp error code: %d)&quot;
# See docs/devel/tracing.rst for syntax documentation.

# task.c
qio_task_new(void *task, void *source, void *func, void *opaque) &quot;Task new task=%p source=%p func=%p opaque=%p&quot;
qio_task_complete(void *task) &quot;Task complete task=%p&quot;
qio_task_thread_start(void *task, void *worker, void *opaque) &quot;Task thread start task=%p worker=%p opaque=%p&quot;
qio_task_thread_run(void *task) &quot;Task thread run task=%p&quot;
qio_task_thread_exit(void *task) &quot;Task thread exit task=%p&quot;
qio_task_thread_result(void *task) &quot;Task thread result task=%p&quot;
qio_task_thread_source_attach(void *task, void *source) &quot;Task thread source attach task=%p source=%p&quot;
qio_task_thread_source_cancel(void *task, void *source) &quot;Task thread source cancel task=%p source=%p&quot;

# channel-null.c
qio_channel_null_new(void *ioc) &quot;Null new ioc=%p&quot;

# channel-socket.c
qio_channel_socket_new(void *ioc) &quot;Socket new ioc=%p&quot;
qio_channel_socket_new_fd(void *ioc, int fd) &quot;Socket new ioc=%p fd=%d&quot;
qio_channel_socket_connect_sync(void *ioc, void *addr) &quot;Socket connect sync ioc=%p addr=%p&quot;
qio_channel_socket_connect_async(void *ioc, void *addr) &quot;Socket connect async ioc=%p addr=%p&quot;
qio_channel_socket_connect_fail(void *ioc) &quot;Socket connect fail ioc=%p&quot;
qio_channel_socket_connect_complete(void *ioc, int fd) &quot;Socket connect complete ioc=%p fd=%d&quot;
qio_channel_socket_listen_sync(void *ioc, void *addr, int num) &quot;Socket listen sync ioc=%p addr=%p num=%d&quot;
qio_channel_socket_listen_async(void *ioc, void *addr, int num) &quot;Socket listen async ioc=%p addr=%p num=%d&quot;
qio_channel_socket_listen_fail(void *ioc) &quot;Socket listen fail ioc=%p&quot;
qio_channel_socket_listen_complete(void *ioc, int fd) &quot;Socket listen complete ioc=%p fd=%d&quot;
qio_channel_socket_dgram_sync(void *ioc, void *localAddr, void *remoteAddr) &quot;Socket dgram sync ioc=%p localAddr=%p remoteAddr=%p&quot;
qio_channel_socket_dgram_async(void *ioc, void *localAddr, void *remoteAddr) &quot;Socket dgram async ioc=%p localAddr=%p remoteAddr=%p&quot;
qio_channel_socket_dgram_fail(void *ioc) &quot;Socket dgram fail ioc=%p&quot;
qio_channel_socket_dgram_complete(void *ioc, int fd) &quot;Socket dgram complete ioc=%p fd=%d&quot;
qio_channel_socket_accept(void *ioc) &quot;Socket accept start ioc=%p&quot;
qio_channel_socket_accept_fail(void *ioc) &quot;Socket accept fail ioc=%p&quot;
qio_channel_socket_accept_complete(void *ioc, void *cioc, int fd) &quot;Socket accept complete ioc=%p cioc=%p fd=%d&quot;

# channel-file.c
qio_channel_file_new_fd(void *ioc, int fd) &quot;File new fd ioc=%p fd=%d&quot;
qio_channel_file_new_path(void *ioc, const char *path, int flags, int mode, int fd) &quot;File new fd ioc=%p path=%s flags=%d mode=%d fd=%d&quot;

# channel-tls.c
qio_channel_tls_new_client(void *ioc, void *master, void *creds, const char *hostname) &quot;TLS new client ioc=%p master=%p creds=%p hostname=%s&quot;
qio_channel_tls_new_server(void *ioc, void *master, void *creds, const char *aclname) &quot;TLS new client ioc=%p master=%p creds=%p acltname=%s&quot;
qio_channel_tls_handshake_start(void *ioc) &quot;TLS handshake start ioc=%p&quot;
qio_channel_tls_handshake_pending(void *ioc, int status) &quot;TLS handshake pending ioc=%p status=%d&quot;
qio_channel_tls_handshake_fail(void *ioc) &quot;TLS handshake fail ioc=%p&quot;
qio_channel_tls_handshake_complete(void *ioc) &quot;TLS handshake complete ioc=%p&quot;
qio_channel_tls_credentials_allow(void *ioc) &quot;TLS credentials allow ioc=%p&quot;
qio_channel_tls_credentials_deny(void *ioc) &quot;TLS credentials deny ioc=%p&quot;

# channel-websock.c
qio_channel_websock_new_server(void *ioc, void *master) &quot;Websock new client ioc=%p master=%p&quot;
qio_channel_websock_handshake_start(void *ioc) &quot;Websock handshake start ioc=%p&quot;
qio_channel_websock_handshake_pending(void *ioc, int status) &quot;Websock handshake pending ioc=%p status=%d&quot;
qio_channel_websock_handshake_reply(void *ioc) &quot;Websock handshake reply ioc=%p&quot;
qio_channel_websock_handshake_fail(void *ioc, const char *msg) &quot;Websock handshake fail ioc=%p err=%s&quot;
qio_channel_websock_handshake_complete(void *ioc) &quot;Websock handshake complete ioc=%p&quot;
qio_channel_websock_http_greeting(void *ioc, const char *greeting) &quot;Websocket HTTP request ioc=%p greeting=&#039;%s&#039;&quot;
qio_channel_websock_http_request(void *ioc, const char *protocols, const char *version, const char *host, const char *connection, const char *upgrade, const char *key) &quot;Websocket HTTP request ioc=%p protocols=&#039;%s&#039; version=&#039;%s&#039; host=&#039;%s&#039; connection=&#039;%s&#039; upgrade=&#039;%s&#039; key=&#039;%s&#039;&quot;
qio_channel_websock_header_partial_decode(void *ioc, size_t payloadlen, unsigned char fin, unsigned char opcode, unsigned char has_mask) &quot;Websocket header decoded ioc=%p payload-len=%zu fin=0x%x opcode=0x%x has_mask=0x%x&quot;
qio_channel_websock_header_full_decode(void *ioc, size_t headerlen, size_t payloadlen, uint32_t mask) &quot;Websocket header decoded ioc=%p header-len=%zu payload-len=%zu mask=0x%x&quot;
qio_channel_websock_payload_decode(void *ioc, uint8_t opcode, size_t payload_remain) &quot;Websocket header decoded ioc=%p opcode=0x%x payload-remain=%zu&quot;
qio_channel_websock_encode(void *ioc, uint8_t opcode, size_t payloadlen, size_t headerlen) &quot;Websocket encoded ioc=%p opcode=0x%x header-len=%zu payload-len=%zu&quot;
qio_channel_websock_close(void *ioc) &quot;Websocket close ioc=%p&quot;

# channel-command.c
qio_channel_command_new_pid(void *ioc, int writefd, int readfd, int pid) &quot;Command new pid ioc=%p writefd=%d readfd=%d pid=%d&quot;
qio_channel_command_new_spawn(void *ioc, const char *binary, int flags) &quot;Command new spawn ioc=%p binary=%s flags=%d&quot;
qio_channel_command_abort(void *ioc, int pid) &quot;Command abort ioc=%p pid=%d&quot;
qio_channel_command_wait(void *ioc, int pid, int ret, int status) &quot;Command abort ioc=%p pid=%d ret=%d status=%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# client.c
nbd_send_option_request(uint32_t opt, const char *name, uint32_t len) &quot;Sending option request %&quot; PRIu32&quot; (%s), len %&quot; PRIu32
nbd_receive_option_reply(uint32_t option, const char *optname, uint32_t type, const char *typename, uint32_t length) &quot;Received option reply %&quot; PRIu32&quot; (%s), type %&quot; PRIu32&quot; (%s), len %&quot; PRIu32
nbd_server_error_msg(uint32_t err, const char *type, const char *msg) &quot;server reported error 0x%&quot; PRIx32 &quot; (%s) with additional message: %s&quot;
nbd_reply_err_ignored(uint32_t option, const char *name, uint32_t reply, const char *reply_name) &quot;server failed request %&quot; PRIu32 &quot; (%s) with error 0x%&quot; PRIx32 &quot; (%s), attempting fallback&quot;
nbd_receive_list(const char *name, const char *desc) &quot;export list includes &#039;%s&#039;, description &#039;%s&#039;&quot;
nbd_opt_info_go_start(const char *opt, const char *name) &quot;Attempting %s for export &#039;%s&#039;&quot;
nbd_opt_info_go_success(const char *opt) &quot;Export is ready after %s request&quot;
nbd_opt_info_unknown(int info, const char *name) &quot;Ignoring unknown info %d (%s)&quot;
nbd_opt_info_block_size(uint32_t minimum, uint32_t preferred, uint32_t maximum) &quot;Block sizes are 0x%&quot; PRIx32 &quot;, 0x%&quot; PRIx32 &quot;, 0x%&quot; PRIx32
nbd_receive_query_exports_start(const char *wantname) &quot;Querying export list for &#039;%s&#039;&quot;
nbd_receive_query_exports_success(const char *wantname) &quot;Found desired export name &#039;%s&#039;&quot;
nbd_receive_starttls_new_client(void) &quot;Setting up TLS&quot;
nbd_receive_starttls_tls_handshake(void) &quot;Starting TLS handshake&quot;
nbd_opt_meta_request(const char *optname, const char *context, const char *export) &quot;Requesting %s %s for export %s&quot;
nbd_opt_meta_reply(const char *optname, const char *context, uint32_t id) &quot;Received %s mapping of %s to id %&quot; PRIu32
nbd_start_negotiate(void *tlscreds, const char *hostname) &quot;Receiving negotiation tlscreds=%p hostname=%s&quot;
nbd_receive_negotiate_magic(uint64_t magic) &quot;Magic is 0x%&quot; PRIx64
nbd_receive_negotiate_server_flags(uint32_t globalflags) &quot;Global flags are 0x%&quot; PRIx32
nbd_receive_negotiate_name(const char *name) &quot;Requesting NBD export name &#039;%s&#039;&quot;
nbd_receive_negotiate_size_flags(uint64_t size, uint16_t flags) &quot;Size is %&quot; PRIu64 &quot;, export flags 0x%&quot; PRIx16
nbd_init_set_socket(void) &quot;Setting NBD socket&quot;
nbd_init_set_block_size(unsigned long block_size) &quot;Setting block size to %lu&quot;
nbd_init_set_size(unsigned long sectors) &quot;Setting size to %lu block(s)&quot;
nbd_init_trailing_bytes(int ignored_bytes) &quot;Ignoring trailing %d bytes of export&quot;
nbd_init_set_readonly(void) &quot;Setting readonly attribute&quot;
nbd_init_finish(void) &quot;Negotiation ended&quot;
nbd_client_loop(void) &quot;Doing NBD loop&quot;
nbd_client_loop_ret(int ret, const char *error) &quot;NBD loop returned %d: %s&quot;
nbd_client_clear_queue(void) &quot;Clearing NBD queue&quot;
nbd_client_clear_socket(void) &quot;Clearing NBD socket&quot;
nbd_send_request(uint64_t from, uint64_t len, uint64_t cookie, uint16_t flags, uint16_t type, const char *name) &quot;Sending request to server: { .from = %&quot; PRIu64&quot;, .len = %&quot; PRIu64 &quot;, .cookie = %&quot; PRIu64 &quot;, .flags = 0x%&quot; PRIx16 &quot;, .type = %&quot; PRIu16 &quot; (%s) }&quot;
nbd_receive_simple_reply(int32_t error, const char *errname, uint64_t cookie) &quot;Got simple reply: { .error = %&quot; PRId32 &quot; (%s), cookie = %&quot; PRIu64&quot; }&quot;
nbd_receive_reply_chunk_header(uint16_t flags, uint16_t type, const char *name, uint64_t cookie, uint32_t length) &quot;Got reply chunk header: { flags = 0x%&quot; PRIx16 &quot;, type = %&quot; PRIu16 &quot; (%s), cookie = %&quot; PRIu64 &quot;, length = %&quot; PRIu32 &quot; }&quot;
nbd_receive_wrong_header(uint32_t magic, const char *mode) &quot;Server sent unexpected magic 0x%&quot; PRIx32 &quot; for negotiated mode %s&quot;

# common.c
nbd_unknown_error(int err) &quot;Squashing unexpected error %d to EINVAL&quot;

# server.c
nbd_negotiate_send_rep_len(uint32_t opt, const char *optname, uint32_t type, const char *typename, uint32_t len) &quot;Reply opt=%&quot; PRIu32 &quot; (%s), type=%&quot; PRIu32 &quot; (%s), len=%&quot; PRIu32
nbd_negotiate_send_rep_err(const char *msg) &quot;sending error message \&quot;%s\&quot;&quot;
nbd_negotiate_send_rep_list(const char *name, const char *desc) &quot;Advertising export name &#039;%s&#039; description &#039;%s&#039;&quot;
nbd_negotiate_handle_export_name(void) &quot;Checking length&quot;
nbd_negotiate_handle_export_name_request(const char *name) &quot;Client requested export &#039;%s&#039;&quot;
nbd_negotiate_send_info(int info, const char *name, uint32_t length) &quot;Sending NBD_REP_INFO type %d (%s) with remaining length %&quot; PRIu32
nbd_negotiate_handle_info_requests(int requests) &quot;Client requested %d items of info&quot;
nbd_negotiate_handle_info_request(int request, const char *name) &quot;Client requested info %d (%s)&quot;
nbd_negotiate_handle_info_block_size(uint32_t minimum, uint32_t preferred, uint32_t maximum) &quot;advertising minimum 0x%&quot; PRIx32 &quot;, preferred 0x%&quot; PRIx32 &quot;, maximum 0x%&quot; PRIx32
nbd_negotiate_handle_starttls(void) &quot;Setting up TLS&quot;
nbd_negotiate_handle_starttls_handshake(void) &quot;Starting TLS handshake&quot;
nbd_negotiate_meta_context(const char *optname, const char *export, uint32_t queries) &quot;Client requested %s for export %s, with %&quot; PRIu32 &quot; queries&quot;
nbd_negotiate_meta_query_skip(const char *reason) &quot;Skipping meta query: %s&quot;
nbd_negotiate_meta_query_parse(const char *query) &quot;Parsed meta query &#039;%s&#039;&quot;
nbd_negotiate_meta_query_reply(const char *context, uint32_t id) &quot;Replying with meta context &#039;%s&#039; id %&quot; PRIu32
nbd_negotiate_options_flags(uint32_t flags) &quot;Received client flags 0x%&quot; PRIx32
nbd_negotiate_options_check_magic(uint64_t magic) &quot;Checking opts magic 0x%&quot; PRIx64
nbd_negotiate_options_check_option(uint32_t option, const char *name) &quot;Checking option %&quot; PRIu32 &quot; (%s)&quot;
nbd_negotiate_begin(void) &quot;Beginning negotiation&quot;
nbd_negotiate_new_style_size_flags(uint64_t size, unsigned flags) &quot;advertising size %&quot; PRIu64 &quot; and flags 0x%x&quot;
nbd_negotiate_success(void) &quot;Negotiation succeeded&quot;
nbd_receive_request(uint32_t magic, uint16_t flags, uint16_t type, uint64_t from, uint64_t len) &quot;Got request: { magic = 0x%&quot; PRIx32 &quot;, .flags = 0x%&quot; PRIx16 &quot;, .type = 0x%&quot; PRIx16 &quot;, from = %&quot; PRIu64 &quot;, len = %&quot; PRIu64 &quot; }&quot;
nbd_blk_aio_attached(const char *name, void *ctx) &quot;Export %s: Attaching clients to AIO context %p&quot;
nbd_blk_aio_detach(const char *name, void *ctx) &quot;Export %s: Detaching clients from AIO context %p&quot;
nbd_co_send_simple_reply(uint64_t cookie, uint32_t error, const char *errname, uint64_t len) &quot;Send simple reply: cookie = %&quot; PRIu64 &quot;, error = %&quot; PRIu32 &quot; (%s), len = %&quot; PRIu64
nbd_co_send_chunk_done(uint64_t cookie) &quot;Send structured reply done: cookie = %&quot; PRIu64
nbd_co_send_chunk_read(uint64_t cookie, uint64_t offset, void *data, uint64_t size) &quot;Send structured read data reply: cookie = %&quot; PRIu64 &quot;, offset = %&quot; PRIu64 &quot;, data = %p, len = %&quot; PRIu64
nbd_co_send_chunk_read_hole(uint64_t cookie, uint64_t offset, uint64_t size) &quot;Send structured read hole reply: cookie = %&quot; PRIu64 &quot;, offset = %&quot; PRIu64 &quot;, len = %&quot; PRIu64
nbd_co_send_extents(uint64_t cookie, unsigned int extents, uint32_t id, uint64_t length, int last) &quot;Send block status reply: cookie = %&quot; PRIu64 &quot;, extents = %u, context = %d (extents cover %&quot; PRIu64 &quot; bytes, last chunk = %d)&quot;
nbd_co_send_chunk_error(uint64_t cookie, int err, const char *errname, const char *msg) &quot;Send structured error reply: cookie = %&quot; PRIu64 &quot;, error = %d (%s), msg = &#039;%s&#039;&quot;
nbd_co_receive_block_status_payload_compliance(uint64_t from, uint64_t len) &quot;client sent unusable block status payload: from=0x%&quot; PRIx64 &quot;, len=0x%&quot; PRIx64
nbd_co_receive_request_decode_type(uint64_t cookie, uint16_t type, const char *name) &quot;Decoding type: cookie = %&quot; PRIu64 &quot;, type = %&quot; PRIu16 &quot; (%s)&quot;
nbd_co_receive_request_payload_received(uint64_t cookie, uint64_t len) &quot;Payload received: cookie = %&quot; PRIu64 &quot;, len = %&quot; PRIu64
nbd_co_receive_ext_payload_compliance(uint64_t from, uint64_t len) &quot;client sent non-compliant write without payload flag: from=0x%&quot; PRIx64 &quot;, len=0x%&quot; PRIx64
nbd_co_receive_align_compliance(const char *op, uint64_t from, uint64_t len, uint32_t align) &quot;client sent non-compliant unaligned %s request: from=0x%&quot; PRIx64 &quot;, len=0x%&quot; PRIx64 &quot;, align=0x%&quot; PRIx32
nbd_trip(void) &quot;Reading request&quot;
nbd_handshake_timer_cb(void) &quot;client took too long to negotiate&quot;

# client-connection.c
nbd_connect_thread_sleep(uint64_t timeout) &quot;timeout %&quot; PRIu64
# See docs/devel/tracing.rst for syntax documentation.

# pr-manager.c
pr_manager_execute(int fd, int cmd, int sa) &quot;fd=%d cmd=0x%02x service action=0x%02x&quot;
pr_manager_run(int fd, int cmd, int sa) &quot;fd=%d cmd=0x%02x service action=0x%02x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# kvm-all.c
kvm_ioctl(int type, void *arg) &quot;type 0x%x, arg %p&quot;
kvm_vm_ioctl(int type, void *arg) &quot;type 0x%x, arg %p&quot;
kvm_vcpu_ioctl(int cpu_index, int type, void *arg) &quot;cpu_index %d, type 0x%x, arg %p&quot;
kvm_run_exit(int cpu_index, uint32_t reason) &quot;cpu_index %d, reason %d&quot;
kvm_device_ioctl(int fd, int type, void *arg) &quot;dev fd %d, type 0x%x, arg %p&quot;
kvm_failed_reg_get(uint64_t id, const char *msg) &quot;Warning: Unable to retrieve ONEREG %&quot; PRIu64 &quot; from KVM: %s&quot;
kvm_failed_reg_set(uint64_t id, const char *msg) &quot;Warning: Unable to set ONEREG %&quot; PRIu64 &quot; to KVM: %s&quot;
kvm_init_vcpu(int cpu_index, unsigned long arch_cpu_id) &quot;index: %d id: %lu&quot;
kvm_irqchip_commit_routes(void) &quot;&quot;
kvm_irqchip_add_msi_route(char *name, int vector, int virq) &quot;dev %s vector %d virq %d&quot;
kvm_irqchip_update_msi_route(int virq) &quot;Updating MSI route virq=%d&quot;
kvm_irqchip_release_virq(int virq) &quot;virq %d&quot;
kvm_set_ioeventfd_mmio(int fd, uint64_t addr, uint32_t val, bool assign, uint32_t size, bool datamatch) &quot;fd: %d @0x%&quot; PRIx64 &quot; val=0x%x assign: %d size: %d match: %d&quot;
kvm_set_ioeventfd_pio(int fd, uint16_t addr, uint32_t val, bool assign, uint32_t size, bool datamatch) &quot;fd: %d @0x%x val=0x%x assign: %d size: %d match: %d&quot;
kvm_set_user_memory(uint32_t slot, uint32_t flags, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, int ret) &quot;Slot#%d flags=0x%x gpa=0x%&quot;PRIx64 &quot; size=0x%&quot;PRIx64 &quot; ua=0x%&quot;PRIx64 &quot; ret=%d&quot;
kvm_clear_dirty_log(uint32_t slot, uint64_t start, uint32_t size) &quot;slot#%&quot;PRId32&quot; start 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx32
kvm_resample_fd_notify(int gsi) &quot;gsi %d&quot;
kvm_dirty_ring_full(int id) &quot;vcpu %d&quot;
kvm_dirty_ring_reap_vcpu(int id) &quot;vcpu %d&quot;
kvm_dirty_ring_page(int vcpu, uint32_t slot, uint64_t offset) &quot;vcpu %d fetch %&quot;PRIu32&quot; offset 0x%&quot;PRIx64
kvm_dirty_ring_reaper(const char *s) &quot;%s&quot;
kvm_dirty_ring_reap(uint64_t count, int64_t t) &quot;reaped %&quot;PRIu64&quot; pages (took %&quot;PRIi64&quot; us)&quot;
kvm_dirty_ring_reaper_kick(const char *reason) &quot;%s&quot;
kvm_dirty_ring_flush(int finished) &quot;%d&quot;

kvm_slots_grow(unsigned int old, unsigned int new) &quot;%u -&gt; %u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# alsaaudio.c
alsa_revents(int revents) &quot;revents = %d&quot;
alsa_pollout(int i, int fd) &quot;i = %d fd = %d&quot;
alsa_set_handler(int events, int index, int fd, int err) &quot;events=0x%x index=%d fd=%d err=%d&quot;
alsa_wrote_zero(int len) &quot;Failed to write %d frames (wrote zero)&quot;
alsa_read_zero(long len) &quot;Failed to read %ld frames (read zero)&quot;
alsa_xrun_out(void) &quot;Recovering from playback xrun&quot;
alsa_xrun_in(void) &quot;Recovering from capture xrun&quot;
alsa_resume_out(void) &quot;Resuming suspended output stream&quot;

# ossaudio.c
oss_version(int version) &quot;OSS version = 0x%x&quot;

# dbusaudio.c
dbus_audio_register(const char *s, const char *dir) &quot;sender = %s, dir = %s&quot;
dbus_audio_put_buffer_out(size_t len) &quot;len = %zu&quot;
dbus_audio_read(size_t len) &quot;len = %zu&quot;

# pwaudio.c
pw_state_changed(int nodeid, const char *s) &quot;node id: %d stream state: %s&quot;
pw_read(int32_t avail, uint32_t index, size_t len) &quot;avail=%d index=%u len=%zu&quot;
pw_write(int32_t filled, int32_t avail, uint32_t index, size_t len) &quot;filled=%d avail=%d index=%u len=%zu&quot;
pw_vol(const char *ret) &quot;set volume: %s&quot;
pw_period(uint64_t quantum, uint32_t rate) &quot;period =%&quot; PRIu64 &quot;/%u&quot;
pw_audio_init(void) &quot;Initialize PipeWire context&quot;

# audio.c
audio_timer_start(int interval) &quot;interval %d ms&quot;
audio_timer_stop(void) &quot;&quot;
audio_timer_delayed(int interval) &quot;interval %d ms&quot;
# See docs/devel/tracing.rst for syntax documentation.

# dbus-vmstate.c
dbus_vmstate_pre_save(void)
dbus_vmstate_post_load(int version_id) &quot;version_id: %d&quot;
dbus_vmstate_loading(const char *id) &quot;id: %s&quot;
dbus_vmstate_saving(const char *id) &quot;id: %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# tpm_passthrough.c
tpm_passthrough_handle_request(void *cmd) &quot;processing command %p&quot;
tpm_passthrough_reset(void) &quot;reset&quot;

# tpm_util.c
tpm_util_get_buffer_size_hdr_len(uint32_t len, size_t expected) &quot;tpm_resp-&gt;hdr.len = %u, expected = %zu&quot;
tpm_util_get_buffer_size_len(uint32_t len, size_t expected) &quot;tpm_resp-&gt;len = %u, expected = %zu&quot;
tpm_util_get_buffer_size_hdr_len2(uint32_t len, size_t expected) &quot;tpm2_resp-&gt;hdr.len = %u, expected = %zu&quot;
tpm_util_get_buffer_size_len2(uint32_t len, size_t expected) &quot;tpm2_resp-&gt;len = %u, expected = %zu&quot;
tpm_util_get_buffer_size(size_t len) &quot;buffersize of device: %zu&quot;
tpm_util_show_buffer(const char *direction, size_t len, const char *buf) &quot;direction: %s len: %zu\n%s&quot;

# tpm_emulator.c
tpm_emulator_set_locality(uint8_t locty) &quot;setting locality to %d&quot;
tpm_emulator_handle_request(void) &quot;processing TPM command&quot;
tpm_emulator_probe_caps(uint64_t caps) &quot;capabilities: 0x%&quot;PRIx64
tpm_emulator_set_buffer_size(uint32_t buffersize, uint32_t minsize, uint32_t maxsize) &quot;buffer size: %u, min: %u, max: %u&quot;
tpm_emulator_startup_tpm_resume(bool is_resume, size_t buffersize) &quot;is_resume: %d, buffer size: %zu&quot;
tpm_emulator_get_tpm_established_flag(uint8_t flag) &quot;got established flag: %d&quot;
tpm_emulator_cancel_cmd_not_supt(void) &quot;Backend does not support CANCEL_TPM_CMD&quot;
tpm_emulator_lock_storage_cmd_not_supt(void) &quot;Backend does not support LOCK_STORAGE&quot;
tpm_emulator_vm_state_change(int running, int state) &quot;state change to running %d state %d&quot;
tpm_emulator_handle_device_opts_tpm12(void) &quot;TPM Version 1.2&quot;
tpm_emulator_handle_device_opts_tpm2(void) &quot;TPM Version 2&quot;
tpm_emulator_handle_device_opts_unspec(void) &quot;TPM Version Unspecified&quot;
tpm_emulator_handle_device_opts_startup_error(void) &quot;Startup error&quot;
tpm_emulator_get_state_blob(uint8_t type, uint32_t size, uint32_t flags) &quot;got state blob type %d, %u bytes, flags 0x%08x&quot;
tpm_emulator_set_state_blob(uint8_t type, uint32_t size, uint32_t flags) &quot;set state blob type %d, %u bytes, flags 0x%08x&quot;
tpm_emulator_set_state_blobs(void) &quot;setting state blobs&quot;
tpm_emulator_set_state_blobs_error(const char *msg) &quot;error while setting state blobs: %s&quot;
tpm_emulator_set_state_blobs_done(void) &quot;Done setting state blobs&quot;
tpm_emulator_pre_save(void) &quot;&quot;
tpm_emulator_inst_init(void) &quot;&quot;
# See docs/devel/tracing.rst for syntax documentation.

# wctablet.c
wct_init(void) &quot;&quot;
wct_cmd_re(void) &quot;&quot;
wct_cmd_st(void) &quot;&quot;
wct_cmd_sp(void) &quot;&quot;
wct_cmd_ts(int input) &quot;0x%02x&quot;
wct_cmd_other(const char *cmd) &quot;%s&quot;
wct_speed(int speed) &quot;%d&quot;

# spice.c
spice_chr_discard_write(int len) &quot;spice chr write discarded %d&quot;
spice_vmc_write(ssize_t out, int len) &quot;spice wrote %zd of requested %d&quot;
spice_vmc_read(int bytes, int len) &quot;spice read %d of requested %d&quot;
spice_vmc_register_interface(void *scd) &quot;spice vmc registered interface %p&quot;
spice_vmc_unregister_interface(void *scd) &quot;spice vmc unregistered interface %p&quot;
spice_vmc_event(int event) &quot;spice vmc event %d&quot;

# See docs/devel/tracing.rst for syntax documentation.

# ebpf-rss.c
ebpf_error(const char *s1, const char *s2) &quot;error in %s: %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# 9p.c
v9fs_rcancel(uint16_t tag, uint8_t id) &quot;tag %d id %d&quot;
v9fs_rerror(uint16_t tag, uint8_t id, int err) &quot;tag %d id %d err %d&quot;
v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) &quot;tag %d id %d msize %d version %s&quot;
v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) &quot;tag %d id %d msize %d version %s&quot;
v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) &quot;tag %u id %u fid %d afid %d uname %s aname %s&quot;
v9fs_attach_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) &quot;tag %u id %u type %u version %u path %&quot;PRIu64
v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) &quot;tag %d id %d fid %d&quot;
v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) &quot;tag %d id %d stat={mode %d atime %d mtime %d length %&quot;PRId64&quot;}&quot;
v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) &quot;tag %d id %d fid %d request_mask %&quot;PRIu64
v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) &quot;tag %d id %d getattr={result_mask %&quot;PRId64&quot; mode %u uid %u gid %u}&quot;
v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) &quot;tag %d id %d fid %d newfid %d nwnames %d&quot;
v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) &quot;tag %d id %d nwnames %d qids %p&quot;
v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) &quot;tag %d id %d fid %d mode %d&quot;
v9fs_open_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int iounit) &quot;tag %u id %u qid={type %u version %u path %&quot;PRIu64&quot;} iounit %d&quot;
v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) &quot;tag %d id %d dfid %d flags %d mode %d gid %u&quot;
v9fs_lcreate_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int32_t iounit) &quot;tag %u id %u qid={type %u version %u path %&quot;PRIu64&quot;} iounit %d&quot;
v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) &quot;tag %d id %d fid %d datasync %d&quot;
v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) &quot;tag %d id %d fid %d&quot;
v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) &quot;tag %d id %d fid %d off %&quot;PRIu64&quot; max_count %u&quot;
v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) &quot;tag %d id %d count %d err %zd&quot;
v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) &quot;tag %d id %d fid %d offset %&quot;PRIu64&quot; max_count %u&quot;
v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) &quot;tag %d id %d count %u retval %zd&quot;
v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) &quot;tag %d id %d fid %d off %&quot;PRIu64&quot; count %u cnt %d&quot;
v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) &quot;tag %d id %d total %d err %zd&quot;
v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) &quot;tag %d id %d fid %d name %s perm %d mode %d&quot;
v9fs_create_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int iounit) &quot;tag %u id %u qid={type %u version %u path %&quot;PRIu64&quot;} iounit %d&quot;
v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid,  char* name, char* symname, uint32_t gid) &quot;tag %d id %d fid %d name %s symname %s gid %u&quot;
v9fs_symlink_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) &quot;tag %u id %u qid={type %u version %u path %&quot;PRIu64&quot;}&quot;
v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) &quot;tag %d id %d flush_tag %d&quot;
v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) &quot;tag %d id %d dfid %d oldfid %d name %s&quot;
v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) &quot;tag %d id %d fid %d&quot;
v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) &quot;tag %u id %u fid %d stat={mode %d atime %d mtime %d}&quot;
v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) &quot;tag %d id %d fid %d mode %d major %d minor %d&quot;
v9fs_mknod_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path) &quot;tag %u id %u qid={type %u version %u path %&quot;PRIu64&quot;}&quot;
v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) &quot;tag %d id %d fid %d type %d start %&quot;PRIu64&quot; length %&quot;PRIu64
v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) &quot;tag %d id %d status %d&quot;
v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)&quot;tag %d id %d fid %d type %d start %&quot;PRIu64&quot; length %&quot;PRIu64
v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) &quot;tag %d id %d type %d start %&quot;PRIu64&quot; length %&quot;PRIu64&quot; proc_id %u&quot;
v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) &quot;tag %u id %u fid %d name %s mode %d gid %u&quot;
v9fs_mkdir_return(uint16_t tag, uint8_t id, uint8_t type, uint32_t version, uint64_t path, int err) &quot;tag %u id %u qid={type %u version %u path %&quot;PRIu64&quot;} err %d&quot;
v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) &quot;tag %d id %d fid %d newfid %d name %s&quot;
v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) &quot;tag %d id %d size %&quot;PRId64
v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, uint64_t size, int flags) &quot;tag %d id %d fid %d name %s size %&quot;PRIu64&quot; flags %d&quot;
v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) &quot;tag %d id %d fid %d&quot;
v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) &quot;tag %d id %d name %s&quot;
v9fs_setattr(uint16_t tag, uint8_t id, int32_t fid, int32_t valid, int32_t mode, int32_t uid, int32_t gid, int64_t size, int64_t atime_sec, int64_t mtime_sec) &quot;tag %u id %u fid %d iattr={valid %d mode %d uid %d gid %d size %&quot;PRId64&quot; atime=%&quot;PRId64&quot; mtime=%&quot;PRId64&quot; }&quot;
v9fs_setattr_return(uint16_t tag, uint8_t id) &quot;tag %u id %u&quot;

# xen-9p-backend.c
xen_9pfs_alloc(char *name) &quot;name %s&quot;
xen_9pfs_connect(char *name) &quot;name %s&quot;
xen_9pfs_disconnect(char *name) &quot;name %s&quot;
xen_9pfs_free(char *name) &quot;name %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# memory_hotplug.c
mhp_acpi_invalid_slot_selected(uint32_t slot) &quot;0x%&quot;PRIx32
mhp_acpi_ejecting_invalid_slot(uint32_t slot) &quot;0x%&quot;PRIx32
mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) &quot;slot[0x%&quot;PRIx32&quot;] addr lo: 0x%&quot;PRIx32
mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) &quot;slot[0x%&quot;PRIx32&quot;] addr hi: 0x%&quot;PRIx32
mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) &quot;slot[0x%&quot;PRIx32&quot;] size lo: 0x%&quot;PRIx32
mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) &quot;slot[0x%&quot;PRIx32&quot;] size hi: 0x%&quot;PRIx32
mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) &quot;slot[0x%&quot;PRIx32&quot;] proximity: 0x%&quot;PRIx32
mhp_acpi_read_flags(uint32_t slot, uint32_t flags) &quot;slot[0x%&quot;PRIx32&quot;] flags: 0x%&quot;PRIx32
mhp_acpi_write_slot(uint32_t slot) &quot;set active slot: 0x%&quot;PRIx32
mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) &quot;slot[0x%&quot;PRIx32&quot;] OST EVENT: 0x%&quot;PRIx32
mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) &quot;slot[0x%&quot;PRIx32&quot;] OST STATUS: 0x%&quot;PRIx32
mhp_acpi_clear_insert_evt(uint32_t slot) &quot;slot[0x%&quot;PRIx32&quot;] clear insert event&quot;
mhp_acpi_clear_remove_evt(uint32_t slot) &quot;slot[0x%&quot;PRIx32&quot;] clear remove event&quot;
mhp_acpi_pc_dimm_deleted(uint32_t slot) &quot;slot[0x%&quot;PRIx32&quot;] pc-dimm deleted&quot;
mhp_acpi_pc_dimm_delete_failed(uint32_t slot) &quot;slot[0x%&quot;PRIx32&quot;] pc-dimm delete failed&quot;

# core.c
acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) &quot;addr: 0x%&quot; PRIx32 &quot; ==&gt; 0x%02&quot; PRIx8
acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) &quot;addr: 0x%&quot; PRIx32 &quot; &lt;== 0x%02&quot; PRIx8
acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) &quot;addr: 0x%&quot; PRIx32 &quot; ==&gt; 0x%02&quot; PRIx8
acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) &quot;addr: 0x%&quot; PRIx32 &quot; &lt;== 0x%02&quot; PRIx8

# cpu.c
cpuhp_acpi_invalid_idx_selected(uint32_t idx) &quot;0x%&quot;PRIx32
cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) &quot;idx[0x%&quot;PRIx32&quot;] flags: 0x%&quot;PRIx8
cpuhp_acpi_write_idx(uint32_t idx) &quot;set active cpu idx: 0x%&quot;PRIx32
cpuhp_acpi_write_cmd(uint32_t idx, uint8_t cmd) &quot;idx[0x%&quot;PRIx32&quot;] cmd: 0x%&quot;PRIx8
cpuhp_acpi_read_cmd_data(uint32_t idx, uint32_t data) &quot;idx[0x%&quot;PRIx32&quot;] data: 0x%&quot;PRIx32
cpuhp_acpi_read_cmd_data2(uint32_t idx, uint32_t data) &quot;idx[0x%&quot;PRIx32&quot;] data: 0x%&quot;PRIx32
cpuhp_acpi_cpu_has_events(uint32_t idx, bool ins, bool rm) &quot;idx[0x%&quot;PRIx32&quot;] inserting: %d, removing: %d&quot;
cpuhp_acpi_clear_inserting_evt(uint32_t idx) &quot;idx[0x%&quot;PRIx32&quot;]&quot;
cpuhp_acpi_clear_remove_evt(uint32_t idx) &quot;idx[0x%&quot;PRIx32&quot;]&quot;
cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) &quot;0x%&quot;PRIx32
cpuhp_acpi_ejecting_cpu(uint32_t idx) &quot;0x%&quot;PRIx32
cpuhp_acpi_fw_remove_invalid_cpu(uint32_t idx) &quot;0x%&quot;PRIx32
cpuhp_acpi_fw_remove_cpu(uint32_t idx) &quot;0x%&quot;PRIx32
cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) &quot;idx[0x%&quot;PRIx32&quot;] OST EVENT: 0x%&quot;PRIx32
cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) &quot;idx[0x%&quot;PRIx32&quot;] OST STATUS: 0x%&quot;PRIx32

# pcihp.c
acpi_pci_eject_slot(unsigned bsel, unsigned slot) &quot;bsel: %u slot: %u&quot;
acpi_pci_unplug(int bsel, int slot) &quot;bsel: %d slot: %d&quot;
acpi_pci_unplug_request(int bsel, int slot) &quot;bsel: %d slot: %d&quot;
acpi_pci_up_read(uint32_t val) &quot;%&quot; PRIu32
acpi_pci_down_read(uint32_t val) &quot;%&quot; PRIu32
acpi_pci_features_read(uint32_t val) &quot;%&quot; PRIu32
acpi_pci_acpi_index_read(uint32_t val) &quot;%&quot; PRIu32
acpi_pci_acpi_index_write(unsigned bsel, unsigned slot, uint32_t aidx) &quot;bsel: %u slot: %u aidx: %&quot; PRIu32
acpi_pci_rmv_read(uint32_t val) &quot;%&quot; PRIu32
acpi_pci_sel_read(uint32_t val) &quot;%&quot; PRIu32
acpi_pci_ej_write(uint64_t addr, uint64_t data) &quot;0x%&quot; PRIx64 &quot; &lt;== %&quot; PRIu64
acpi_pci_sel_write(uint64_t addr, uint64_t data) &quot;0x%&quot; PRIx64 &quot; &lt;== %&quot; PRIu64

# tco.c
tco_timer_reload(int ticks, int msec) &quot;ticks=%d (%d ms)&quot;
tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) &quot;timeouts_no=%d no_reboot=%d/%d&quot;
tco_io_write(uint64_t addr, uint32_t val) &quot;addr=0x%&quot; PRIx64 &quot; val=0x%&quot; PRIx32
tco_io_read(uint64_t addr, uint32_t val) &quot;addr=0x%&quot; PRIx64 &quot; val=0x%&quot; PRIx32

# erst.c
acpi_erst_reg_write(uint64_t addr, uint64_t val, unsigned size) &quot;addr: 0x%04&quot; PRIx64 &quot; &lt;== 0x%016&quot; PRIx64 &quot; (size: %u)&quot;
acpi_erst_reg_read(uint64_t addr, uint64_t val, unsigned size) &quot; addr: 0x%04&quot; PRIx64 &quot; ==&gt; 0x%016&quot; PRIx64 &quot; (size: %u)&quot;
acpi_erst_mem_write(uint64_t addr, uint64_t val, unsigned size) &quot;addr: 0x%06&quot; PRIx64 &quot; &lt;== 0x%016&quot; PRIx64 &quot; (size: %u)&quot;
acpi_erst_mem_read(uint64_t addr, uint64_t val, unsigned size) &quot; addr: 0x%06&quot; PRIx64 &quot; ==&gt; 0x%016&quot; PRIx64 &quot; (size: %u)&quot;
acpi_erst_pci_bar_0(uint64_t addr) &quot;BAR0: 0x%016&quot; PRIx64
acpi_erst_pci_bar_1(uint64_t addr) &quot;BAR1: 0x%016&quot; PRIx64
acpi_erst_realizefn_in(void)
acpi_erst_realizefn_out(unsigned size) &quot;total nvram size %u bytes&quot;
acpi_erst_reset_in(unsigned record_count) &quot;record_count %u&quot;
acpi_erst_reset_out(unsigned record_count) &quot;record_count %u&quot;
acpi_erst_post_load(void *header, unsigned slot_size) &quot;header: 0x%p slot_size %u&quot;
acpi_erst_class_init_in(void)
acpi_erst_class_init_out(void)

# nvdimm.c
acpi_nvdimm_read_fit(uint32_t offset, uint32_t len, const char *dirty) &quot;Read FIT: offset 0x%&quot; PRIx32 &quot; FIT size 0x%&quot; PRIx32 &quot; Dirty %s&quot;
acpi_nvdimm_label_info(uint32_t label_size, uint32_t mxfer) &quot;label_size 0x%&quot; PRIx32 &quot;, max_xfer 0x%&quot; PRIx32
acpi_nvdimm_label_overflow(uint32_t offset, uint32_t length) &quot;offset 0x%&quot; PRIx32 &quot; + length 0x%&quot; PRIx32 &quot; is overflow&quot;
acpi_nvdimm_label_oversize(uint32_t pos, uint64_t size) &quot;position 0x%&quot; PRIx32 &quot; is beyond label data (len = %&quot; PRIu64 &quot;)&quot;
acpi_nvdimm_label_xfer_exceed(uint32_t length, uint32_t max_xfer) &quot;length (0x%&quot; PRIx32 &quot;) is larger than max_xfer (0x%&quot; PRIx32 &quot;)&quot;
acpi_nvdimm_read_label(uint32_t offset, uint32_t length) &quot;Read Label Data: offset 0x%&quot; PRIx32 &quot; length 0x%&quot; PRIx32
acpi_nvdimm_write_label(uint32_t offset, uint32_t length) &quot;Write Label Data: offset 0x%&quot; PRIx32 &quot; length 0x%&quot; PRIx32
acpi_nvdimm_read_io_port(void) &quot;Alert: we never read _DSM IO Port&quot;
acpi_nvdimm_dsm_mem_addr(uint64_t dsm_mem_addr) &quot;dsm memory address 0x%&quot; PRIx64
acpi_nvdimm_dsm_info(uint32_t revision, uint32_t handle, uint32_t function) &quot;Revision 0x%&quot; PRIx32 &quot; Handle 0x%&quot; PRIx32 &quot; Function 0x%&quot; PRIx32
acpi_nvdimm_invalid_revision(uint32_t revision) &quot;Revision 0x%&quot; PRIx32 &quot; is not supported, expect 0x1&quot;
# See docs/devel/tracing.rst for syntax documentation.

# npcm7xx_adc.c
npcm7xx_adc_read(const char *id, uint64_t offset, uint32_t value) &quot; %s offset: 0x%04&quot; PRIx64 &quot; value 0x%04&quot; PRIx32
npcm7xx_adc_write(const char *id, uint64_t offset, uint32_t value) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value 0x%04&quot; PRIx32

aspeed_adc_engine_read(uint32_t engine_id, uint64_t addr, uint64_t value) &quot;engine[%u] 0x%&quot; PRIx64 &quot; 0x%&quot; PRIx64
aspeed_adc_engine_write(uint32_t engine_id, uint64_t addr, uint64_t value) &quot;engine[%u] 0x%&quot; PRIx64 &quot; 0x%&quot; PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# pci.c
alpha_pci_iack_write(void) &quot;&quot;
# See docs/devel/tracing.rst for syntax documentation.

# virt-acpi-build.c
virt_acpi_setup(void) &quot;No fw cfg or ACPI disabled. Bailing out.&quot;

# smmu-common.c
smmu_add_mr(const char *name) &quot;%s&quot;
smmu_ptw_level(int stage, int level, uint64_t iova, size_t subpage_size, uint64_t baseaddr, uint32_t offset, uint64_t pte) &quot;stage=%d level=%d iova=0x%&quot;PRIx64&quot; subpage_sz=0x%zx baseaddr=0x%&quot;PRIx64&quot; offset=%d =&gt; pte=0x%&quot;PRIx64
smmu_ptw_invalid_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint32_t offset, uint64_t pte) &quot;stage=%d level=%d base@=0x%&quot;PRIx64&quot; pte@=0x%&quot;PRIx64&quot; offset=%d pte=0x%&quot;PRIx64
smmu_ptw_page_pte(int stage, int level,  uint64_t iova, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t address) &quot;stage=%d level=%d iova=0x%&quot;PRIx64&quot; base@=0x%&quot;PRIx64&quot; pte@=0x%&quot;PRIx64&quot; pte=0x%&quot;PRIx64&quot; page address = 0x%&quot;PRIx64
smmu_ptw_block_pte(int stage, int level, uint64_t baseaddr, uint64_t pteaddr, uint64_t pte, uint64_t iova, uint64_t gpa, int bsize_mb) &quot;stage=%d level=%d base@=0x%&quot;PRIx64&quot; pte@=0x%&quot;PRIx64&quot; pte=0x%&quot;PRIx64&quot; iova=0x%&quot;PRIx64&quot; block address = 0x%&quot;PRIx64&quot; block size = %d MiB&quot;
smmu_get_pte(uint64_t baseaddr, int index, uint64_t pteaddr, uint64_t pte) &quot;baseaddr=0x%&quot;PRIx64&quot; index=0x%x, pteaddr=0x%&quot;PRIx64&quot;, pte=0x%&quot;PRIx64
smmu_iotlb_inv_all(void) &quot;IOTLB invalidate all&quot;
smmu_iotlb_inv_asid(uint16_t asid) &quot;IOTLB invalidate asid=%d&quot;
smmu_iotlb_inv_vmid(uint16_t vmid) &quot;IOTLB invalidate vmid=%d&quot;
smmu_iotlb_inv_iova(uint16_t asid, uint64_t addr) &quot;IOTLB invalidate asid=%d addr=0x%&quot;PRIx64
smmu_inv_notifiers_mr(const char *name) &quot;iommu mr=%s&quot;
smmu_iotlb_lookup_hit(uint16_t asid, uint16_t vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) &quot;IOTLB cache HIT asid=%d vmid=%d addr=0x%&quot;PRIx64&quot; hit=%d miss=%d hit rate=%d&quot;
smmu_iotlb_lookup_miss(uint16_t asid, uint16_t vmid, uint64_t addr, uint32_t hit, uint32_t miss, uint32_t p) &quot;IOTLB cache MISS asid=%d vmid=%d addr=0x%&quot;PRIx64&quot; hit=%d miss=%d hit rate=%d&quot;
smmu_iotlb_insert(uint16_t asid, uint16_t vmid, uint64_t addr, uint8_t tg, uint8_t level) &quot;IOTLB ++ asid=%d vmid=%d addr=0x%&quot;PRIx64&quot; tg=%d level=%d&quot;

# smmuv3.c
smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) &quot;addr: 0x%&quot;PRIx64&quot; val:0x%&quot;PRIx64&quot; size: 0x%x(%d)&quot;
smmuv3_trigger_irq(int irq) &quot;irq=%d&quot;
smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) &quot;toggled=0x%x, new GERROR=0x%x&quot;
smmuv3_write_gerrorn(uint32_t acked, uint32_t gerrorn) &quot;acked=0x%x, new GERRORN=0x%x&quot;
smmuv3_unhandled_cmd(uint32_t type) &quot;Unhandled command type=%d&quot;
smmuv3_cmdq_consume(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) &quot;prod=%d cons=%d prod.wrap=%d cons.wrap=%d&quot;
smmuv3_cmdq_opcode(const char *opcode) &quot;&lt;--- %s&quot;
smmuv3_cmdq_consume_out(uint32_t prod, uint32_t cons, uint8_t prod_wrap, uint8_t cons_wrap) &quot;prod:%d, cons:%d, prod_wrap:%d, cons_wrap:%d &quot;
smmuv3_cmdq_consume_error(const char *cmd_name, uint8_t cmd_error) &quot;Error on %s command execution: %d&quot;
smmuv3_write_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) &quot;addr: 0x%&quot;PRIx64&quot; val:0x%&quot;PRIx64&quot; size: 0x%x(%d)&quot;
smmuv3_record_event(const char *type, uint32_t sid) &quot;%s sid=0x%x&quot;
smmuv3_find_ste(uint16_t sid, uint32_t features, uint16_t sid_split) &quot;sid=0x%x features:0x%x, sid_split:0x%x&quot;
smmuv3_find_ste_2lvl(uint64_t strtab_base, uint64_t l1ptr, int l1_ste_offset, uint64_t l2ptr, int l2_ste_offset, int max_l2_ste) &quot;strtab_base:0x%&quot;PRIx64&quot; l1ptr:0x%&quot;PRIx64&quot; l1_off:0x%x, l2ptr:0x%&quot;PRIx64&quot; l2_off:0x%x max_l2_ste:%d&quot;
smmuv3_get_ste(uint64_t addr) &quot;STE addr: 0x%&quot;PRIx64
smmuv3_translate_disable(const char *n, uint16_t sid, uint64_t addr, bool is_write) &quot;%s sid=0x%x bypass (smmu disabled) iova:0x%&quot;PRIx64&quot; is_write=%d&quot;
smmuv3_translate_bypass(const char *n, uint16_t sid, uint64_t addr, bool is_write) &quot;%s sid=0x%x STE bypass iova:0x%&quot;PRIx64&quot; is_write=%d&quot;
smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool is_write) &quot;%s sid=0x%x abort on iova:0x%&quot;PRIx64&quot; is_write=%d&quot;
smmuv3_translate_success(const char *n, uint16_t sid, uint64_t iova, uint64_t translated, int perm) &quot;%s sid=0x%x iova=0x%&quot;PRIx64&quot; translated=0x%&quot;PRIx64&quot; perm=0x%x&quot;
smmuv3_get_cd(uint64_t addr) &quot;CD addr: 0x%&quot;PRIx64
smmuv3_decode_cd(uint32_t oas) &quot;oas=%d&quot;
smmuv3_decode_cd_tt(int i, uint32_t tsz, uint64_t ttb, uint32_t granule_sz, bool had) &quot;TT[%d]:tsz:%d ttb:0x%&quot;PRIx64&quot; granule_sz:%d had:%d&quot;
smmuv3_cmdq_cfgi_ste(int streamid) &quot;streamid= 0x%x&quot;
smmuv3_cmdq_cfgi_ste_range(int start, int end) &quot;start=0x%x - end=0x%x&quot;
smmuv3_cmdq_cfgi_cd(uint32_t sid) &quot;sid=0x%x&quot;
smmuv3_config_cache_hit(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t perc) &quot;Config cache HIT for sid=0x%x (hits=%d, misses=%d, hit rate=%d)&quot;
smmuv3_config_cache_miss(uint32_t sid, uint32_t hits, uint32_t misses, uint32_t perc) &quot;Config cache MISS for sid=0x%x (hits=%d, misses=%d, hit rate=%d)&quot;
smmuv3_range_inval(int vmid, int asid, uint64_t addr, uint8_t tg, uint64_t num_pages, uint8_t ttl, bool leaf) &quot;vmid=%d asid=%d addr=0x%&quot;PRIx64&quot; tg=%d num_pages=0x%&quot;PRIx64&quot; ttl=%d leaf=%d&quot;
smmuv3_cmdq_tlbi_nh(void) &quot;&quot;
smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) &quot;asid=%d&quot;
smmuv3_cmdq_tlbi_s12_vmid(uint16_t vmid) &quot;vmid=%d&quot;
smmuv3_config_cache_inv(uint32_t sid) &quot;Config cache INV for sid=0x%x&quot;
smmuv3_notify_flag_add(const char *iommu) &quot;ADD SMMUNotifier node for iommu mr=%s&quot;
smmuv3_notify_flag_del(const char *iommu) &quot;DEL SMMUNotifier node for iommu mr=%s&quot;
smmuv3_inv_notifiers_iova(const char *name, uint16_t asid, uint16_t vmid, uint64_t iova, uint8_t tg, uint64_t num_pages) &quot;iommu mr=%s asid=%d vmid=%d iova=0x%&quot;PRIx64&quot; tg=%d num_pages=0x%&quot;PRIx64

# See docs/devel/tracing.rst for syntax documentation.

# cs4231.c
cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) &quot;read dreg %d: 0x%02x&quot;
cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) &quot;read reg %d: 0x%08x&quot;
cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) &quot;write reg %d: 0x%08x -&gt; 0x%08x&quot;
cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) &quot;write dreg %d: 0x%02x -&gt; 0x%02x&quot;

# es1370.c
es1370_frame_address_rd(int ch, uint32_t addr) &quot;ch=%d addr=0x%08x&quot;
es1370_frame_address_wr(int ch, uint32_t addr) &quot;ch=%d addr=0x%08x&quot;
es1370_frame_count_rd(int ch, uint32_t curr, uint32_t size) &quot;ch=%d CURR_CT=%u BUF_SIZE=%u&quot;
es1370_frame_count_wr(int ch, uint32_t curr, uint32_t size) &quot;ch=%d CURR_CT=%u BUF_SIZE=%u&quot;
es1370_lost_interrupt(int ch) &quot;ch=%d lost interrupt&quot;
es1370_sample_count_rd(int ch, uint32_t curr, uint32_t num) &quot;ch=%d CURR_SAMP_CT=%u SAMP_CT=%u&quot;
es1370_sample_count_wr(int ch, uint32_t curr, uint32_t num) &quot;ch=%d CURR_SAMP_CT=%u SAMP_CT=%u&quot;
es1370_stream_format(int ch, uint32_t freq, const char *fmt, const char *mode, uint32_t shift) &quot;ch=%d fmt=%u:%s:%s shift=%u&quot;
es1370_transfer_audio(int ch, uint32_t f_curr, uint32_t f_size, uint32_t s_curr, uint32_t s_num, uint32_t leftover, bool irq) &quot;ch=%d CURR_CT=%u BUF_SIZE=%u CURR_SAMP_CT=%u SAMP_CT=%u leftover=%u irq=%d&quot;

# hda-codec.c
hda_audio_running(const char *stream, int nr, bool running) &quot;st %s, nr %d, run %d&quot;
hda_audio_format(const char *stream, int chan, const char *fmt, int freq) &quot;st %s, %d x %s @ %d Hz&quot;
hda_audio_adjust(const char *stream, int pos) &quot;st %s, pos %d&quot;
hda_audio_overrun(const char *stream) &quot;st %s&quot;

#via-ac97.c
via_ac97_codec_write(uint8_t addr, uint16_t val) &quot;0x%x &lt;- 0x%x&quot;
via_ac97_sgd_fetch(uint32_t curr, uint32_t addr, char stop, char eol, char flag, uint32_t len) &quot;curr=0x%x addr=0x%x %c%c%c len=%d&quot;
via_ac97_sgd_read(uint64_t addr, unsigned size, uint64_t val) &quot;0x%&quot;PRIx64&quot; %d -&gt; 0x%&quot;PRIx64
via_ac97_sgd_write(uint64_t addr, unsigned size, uint64_t val) &quot;0x%&quot;PRIx64&quot; %d &lt;- 0x%&quot;PRIx64

# asc.c
asc_read_fifo(const char fifo, int reg, unsigned size, uint64_t value) &quot;fifo %c reg=0x%03x size=%u value=0x%&quot;PRIx64
asc_read_reg(int reg, unsigned size, uint64_t value) &quot;reg=0x%03x size=%u value=0x%&quot;PRIx64
asc_read_extreg(const char fifo, int reg, unsigned size, uint64_t value) &quot;fifo %c reg=0x%03x size=%u value=0x%&quot;PRIx64
asc_fifo_get(const char fifo, int rptr, int cnt, uint64_t value) &quot;fifo %c rptr=0x%x cnt=0x%x value=0x%&quot;PRIx64
asc_write_fifo(const char fifo, int reg, unsigned size, int wrptr, int cnt, uint64_t value) &quot;fifo %c reg=0x%03x size=%u wptr=0x%x cnt=0x%x value=0x%&quot;PRIx64
asc_write_reg(int reg, unsigned size, uint64_t value) &quot;reg=0x%03x size=%u value=0x%&quot;PRIx64
asc_write_extreg(const char fifo, int reg, unsigned size, uint64_t value) &quot;fifo %c reg=0x%03x size=%u value=0x%&quot;PRIx64
asc_update_irq(int irq, int a, int b) &quot;set IRQ to %d (A: 0x%x B: 0x%x)&quot;

#virtio-snd.c
virtio_snd_get_config(void *vdev, uint32_t jacks, uint32_t streams, uint32_t chmaps) &quot;snd %p: get_config jacks=%&quot;PRIu32&quot; streams=%&quot;PRIu32&quot; chmaps=%&quot;PRIu32&quot;&quot;
virtio_snd_get_features(void *vdev, uint64_t features) &quot;snd %p: get_features 0x%&quot;PRIx64
virtio_snd_vm_state_running(void) &quot;vm state running&quot;
virtio_snd_vm_state_stopped(void) &quot;vm state stopped&quot;
virtio_snd_realize(void *snd) &quot;snd %p: realize&quot;
virtio_snd_unrealize(void *snd) &quot;snd %p: unrealize&quot;
virtio_snd_handle_pcm_set_params(uint32_t stream) &quot;VIRTIO_SND_PCM_SET_PARAMS called for stream %&quot;PRIu32
virtio_snd_handle_ctrl(void *vdev, void *vq) &quot;snd %p: handle ctrl event for queue %p&quot;
virtio_snd_handle_pcm_info(uint32_t stream) &quot;VIRTIO_SND_R_PCM_INFO called for stream %&quot;PRIu32
virtio_snd_handle_pcm_start_stop(const char *code, uint32_t stream) &quot;%s called for stream %&quot;PRIu32
virtio_snd_handle_pcm_release(uint32_t stream) &quot;VIRTIO_SND_PCM_RELEASE called for stream %&quot;PRIu32
virtio_snd_handle_code(uint32_t val, const char *code) &quot;ctrl code msg val = %&quot;PRIu32&quot; == %s&quot;
virtio_snd_handle_chmap_info(void) &quot;VIRTIO_SND_CHMAP_INFO called&quot;
virtio_snd_handle_event(void) &quot;event queue callback called&quot;
virtio_snd_pcm_stream_flush(uint32_t stream) &quot;flushing stream %&quot;PRIu32
virtio_snd_handle_tx_xfer(void) &quot;tx queue callback called&quot;
virtio_snd_handle_rx_xfer(void) &quot;rx queue callback called&quot;
# See docs/devel/tracing.rst for syntax documentation.

# fdc.c
fdc_ioport_read(uint8_t reg, uint8_t value) &quot;read reg 0x%02x val 0x%02x&quot;
fdc_ioport_write(uint8_t reg, uint8_t value) &quot;write reg 0x%02x val 0x%02x&quot;

# fdc-sysbus.c
fdctrl_tc_pulse(int level) &quot;TC pulse: %u&quot;

# pflash_cfi01.c
# pflash_cfi02.c
pflash_chip_erase_invalid(const char *name, uint64_t offset) &quot;%s: chip erase: invalid address 0x%&quot; PRIx64
pflash_chip_erase_start(const char *name) &quot;%s: start chip erase&quot;
pflash_data_read(const char *name, uint64_t offset, unsigned size, uint32_t value) &quot;%s: data offset:0x%04&quot;PRIx64&quot; size:%u value:0x%04x&quot;
pflash_data_write(const char *name, uint64_t offset, unsigned size, uint32_t value) &quot;%s: data offset:0x%04&quot;PRIx64&quot; size:%u value:0x%04x&quot;
pflash_data_write_block(const char *name, uint64_t offset, unsigned size, uint32_t value, uint64_t counter) &quot;%s: data offset:0x%04&quot;PRIx64&quot; size:%u value:0x%04x counter:0x%016&quot;PRIx64
pflash_device_id(const char *name, uint16_t id) &quot;%s: read device ID: 0x%04x&quot;
pflash_device_info(const char *name, uint64_t offset) &quot;%s: read device information offset:0x%04&quot; PRIx64
pflash_erase_complete(const char *name) &quot;%s: sector erase complete&quot;
pflash_erase_timeout(const char *name, int count) &quot;%s: erase timeout fired; erasing %d sectors&quot;
pflash_io_read(const char *name, uint64_t offset, unsigned int size, uint32_t value, uint8_t cmd, uint8_t wcycle) &quot;%s: offset:0x%04&quot; PRIx64 &quot; size:%u value:0x%04x cmd:0x%02x wcycle:%u&quot;
pflash_io_write(const char *name, uint64_t offset, unsigned int size, uint32_t value, uint8_t wcycle) &quot;%s: offset:0x%04&quot;PRIx64&quot; size:%u value:0x%04x wcycle:%u&quot;
pflash_manufacturer_id(const char *name, uint16_t id) &quot;%s: read manufacturer ID: 0x%04x&quot;
pflash_mode_read_array(const char *name) &quot;%s: read array mode&quot;
pflash_postload_cb(const char *name)  &quot;%s: updating bdrv&quot;
pflash_read_done(const char *name, uint64_t offset, uint64_t ret) &quot;%s: ID:0x%&quot; PRIx64 &quot; ret:0x%&quot; PRIx64
pflash_read_status(const char *name, uint32_t ret) &quot;%s: status:0x%x&quot;
pflash_read_unknown_state(const char *name, uint8_t cmd) &quot;%s: unknown command state:0x%x&quot;
pflash_reset(const char *name) &quot;%s: reset&quot;
pflash_sector_erase_start(const char *name, int width1, uint64_t start, int width2, uint64_t end) &quot;%s: start sector erase at: 0x%0*&quot; PRIx64 &quot;-0x%0*&quot; PRIx64
pflash_timer_expired(const char *name, uint8_t cmd) &quot;%s: command 0x%02x done&quot;
pflash_unlock0_failed(const char *name, uint64_t offset, uint8_t cmd, uint16_t addr0) &quot;%s: unlock0 failed 0x%&quot; PRIx64 &quot; 0x%02x 0x%04x&quot;
pflash_unlock1_failed(const char *name, uint64_t offset, uint8_t cmd) &quot;%s: unlock0 failed 0x%&quot; PRIx64 &quot; 0x%02x&quot;
pflash_unsupported_device_configuration(const char *name, uint8_t width, uint8_t max) &quot;%s: unsupported device configuration: device_width:%d max_device_width:%d&quot;
pflash_write(const char *name, const char *str) &quot;%s: %s&quot;
pflash_write_block_start(const char *name, uint32_t value) &quot;%s: block write start: bytes:0x%x&quot;
pflash_write_block_flush(const char *name) &quot;%s: block write flush&quot;
pflash_write_block_abort(const char *name) &quot;%s: block write abort&quot;
pflash_write_block_erase(const char *name, uint64_t offset, uint64_t len) &quot;%s: block erase offset:0x%&quot; PRIx64 &quot; bytes:0x%&quot; PRIx64
pflash_write_failed(const char *name, uint64_t offset, uint8_t cmd) &quot;%s: command failed 0x%&quot; PRIx64 &quot; 0x%02x&quot;
pflash_write_invalid(const char *name, uint8_t cmd) &quot;%s: invalid write for command 0x%02x&quot;
pflash_write_invalid_command(const char *name, uint8_t cmd) &quot;%s: invalid command 0x%02x (wc 5)&quot;
pflash_write_invalid_state(const char *name, uint8_t cmd, int wc) &quot;%s: invalid command state 0x%02x (wc %d)&quot;
pflash_write_start(const char *name, uint8_t cmd) &quot;%s: starting command 0x%02x&quot;
pflash_write_unknown(const char *name, uint8_t cmd) &quot;%s: unknown command 0x%02x&quot;

# virtio-blk.c
virtio_blk_req_complete(void *vdev, void *req, int status) &quot;vdev %p req %p status %d&quot;
virtio_blk_rw_complete(void *vdev, void *req, int ret) &quot;vdev %p req %p ret %d&quot;
virtio_blk_zone_report_complete(void *vdev, void *req, unsigned int nr_zones, int ret) &quot;vdev %p req %p nr_zones %u ret %d&quot;
virtio_blk_zone_mgmt_complete(void *vdev, void *req, int ret) &quot;vdev %p req %p ret %d&quot;
virtio_blk_zone_append_complete(void *vdev, void *req, int64_t sector, int ret) &quot;vdev %p req %p, append sector 0x%&quot; PRIx64 &quot; ret %d&quot;
virtio_blk_handle_write(void *vdev, void *req, uint64_t sector, size_t nsectors) &quot;vdev %p req %p sector %&quot;PRIu64&quot; nsectors %zu&quot;
virtio_blk_handle_read(void *vdev, void *req, uint64_t sector, size_t nsectors) &quot;vdev %p req %p sector %&quot;PRIu64&quot; nsectors %zu&quot;
virtio_blk_submit_multireq(void *vdev, void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) &quot;vdev %p mrb %p start %d num_reqs %d offset %&quot;PRIu64&quot; size %zu is_write %d&quot;
virtio_blk_handle_zone_report(void *vdev, void *req, int64_t sector, unsigned int nr_zones) &quot;vdev %p req %p sector 0x%&quot; PRIx64 &quot; nr_zones %u&quot;
virtio_blk_handle_zone_mgmt(void *vdev, void *req, uint8_t op, int64_t sector, int64_t len) &quot;vdev %p req %p op 0x%x sector 0x%&quot; PRIx64 &quot; len 0x%&quot; PRIx64 &quot;&quot;
virtio_blk_handle_zone_reset_all(void *vdev, void *req, int64_t sector, int64_t len) &quot;vdev %p req %p sector 0x%&quot; PRIx64 &quot; cap 0x%&quot; PRIx64 &quot;&quot;
virtio_blk_handle_zone_append(void *vdev, void *req, int64_t sector) &quot;vdev %p req %p, append sector 0x%&quot; PRIx64 &quot;&quot;

# hd-geometry.c
hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) &quot;blk %p LCHS %d %d %d&quot;
hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) &quot;blk %p CHS %u %u %u trans %d&quot;

# xen-block.c
xen_block_realize(const char *type, uint32_t disk, uint32_t partition) &quot;%s d%up%u&quot;
xen_block_connect(const char *type, uint32_t disk, uint32_t partition) &quot;%s d%up%u&quot;
xen_block_disconnect(const char *type, uint32_t disk, uint32_t partition) &quot;%s d%up%u&quot;
xen_block_unrealize(const char *type, uint32_t disk, uint32_t partition) &quot;%s d%up%u&quot;
xen_block_size(const char *type, uint32_t disk, uint32_t partition, int64_t sectors) &quot;%s d%up%u %&quot;PRIi64
xen_disk_realize(void) &quot;&quot;
xen_disk_unrealize(void) &quot;&quot;
xen_cdrom_realize(void) &quot;&quot;
xen_cdrom_unrealize(void) &quot;&quot;
xen_block_blockdev_add(char *str) &quot;%s&quot;
xen_block_blockdev_del(const char *node_name) &quot;%s&quot;
xen_block_device_create(unsigned int number) &quot;%u&quot;
xen_block_device_destroy(unsigned int number) &quot;%u&quot;

# m25p80.c
m25p80_flash_erase(void *s, int offset, uint32_t len) &quot;[%p] offset = 0x%&quot;PRIx32&quot;, len = %u&quot;
m25p80_programming_zero_to_one(void *s, uint32_t addr, uint8_t prev, uint8_t data) &quot;[%p] programming zero to one! addr=0x%&quot;PRIx32&quot;  0x%&quot;PRIx8&quot; -&gt; 0x%&quot;PRIx8
m25p80_reset_done(void *s) &quot;[%p] Reset done.&quot;
m25p80_command_decoded(void *s, uint32_t cmd) &quot;[%p] new command:0x%&quot;PRIx32
m25p80_complete_collecting(void *s, uint32_t cmd, int n, uint8_t ear, uint32_t cur_addr) &quot;[%p] decode cmd: 0x%&quot;PRIx32&quot; len %d ear 0x%&quot;PRIx8&quot; addr 0x%&quot;PRIx32
m25p80_populated_jedec(void *s) &quot;[%p] populated jedec code&quot;
m25p80_chip_erase(void *s) &quot;[%p] chip erase&quot;
m25p80_select(void *s, const char *what) &quot;[%p] %sselect&quot;
m25p80_page_program(void *s, uint32_t addr, uint8_t tx) &quot;[%p] page program cur_addr=0x%&quot;PRIx32&quot; data=0x%&quot;PRIx8
m25p80_transfer(void *s, uint8_t state, uint32_t len, uint8_t needed, uint32_t pos, uint32_t cur_addr, uint8_t t) &quot;[%p] Transfer state 0x%&quot;PRIx8&quot; len 0x%&quot;PRIx32&quot; needed 0x%&quot;PRIx8&quot; pos 0x%&quot;PRIx32&quot; addr 0x%&quot;PRIx32&quot; tx 0x%&quot;PRIx8
m25p80_read_byte(void *s, uint32_t addr, uint8_t v) &quot;[%p] Read byte 0x%&quot;PRIx32&quot;=0x%&quot;PRIx8
m25p80_read_data(void *s, uint32_t pos, uint8_t v) &quot;[%p] Read data 0x%&quot;PRIx32&quot;=0x%&quot;PRIx8
m25p80_read_sfdp(void *s, uint32_t addr, uint8_t v) &quot;[%p] Read SFDP 0x%&quot;PRIx32&quot;=0x%&quot;PRIx8
m25p80_binding(void *s) &quot;[%p] Binding to IF_MTD drive&quot;
m25p80_binding_no_bdrv(void *s) &quot;[%p] No BDRV - binding to RAM&quot;

# swim.c
swim_ismctrl_read(int reg, const char *name, unsigned size, uint64_t value) &quot;reg=%d [%s] size=%u value=0x%&quot;PRIx64
swim_ismctrl_write(int reg, const char *name, unsigned size, uint64_t value) &quot;reg=%d [%s] size=%u value=0x%&quot;PRIx64
swim_iwmctrl_read(int reg, const char *name, unsigned size, uint64_t value) &quot;reg=%d [%s] size=%u value=0x%&quot;PRIx64
swim_iwmctrl_write(int reg, const char *name, unsigned size, uint64_t value) &quot;reg=%d [%s] size=%u value=0x%&quot;PRIx64
swim_switch_to_ism(void) &quot;switch from IWM to ISM mode&quot;
swim_switch_to_iwm(void) &quot;switch from ISM to IWM mode&quot;
# See docs/devel/tracing.rst for syntax documentation.

# virtio-blk.c
virtio_blk_data_plane_start(void *s) &quot;dataplane %p&quot;
virtio_blk_data_plane_stop(void *s) &quot;dataplane %p&quot;
# See docs/devel/tracing.rst for syntax documentation.

# parallel.c
parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) &quot;read [%s] addr 0x%02x val 0x%02x&quot;
parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) &quot;write [%s] addr 0x%02x val 0x%02x&quot;

# serial.c
serial_read(uint16_t addr, uint8_t value) &quot;read addr 0x%02x val 0x%02x&quot;
serial_write(uint16_t addr, uint8_t value) &quot;write addr 0x%02x val 0x%02x&quot;
serial_update_parameters(uint64_t baudrate, char parity, int data_bits, int stop_bits) &quot;baudrate=%&quot;PRIu64&quot; parity=&#039;%c&#039; data=%d stop=%d&quot;

# virtio-serial-bus.c
virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) &quot;port %u, event %u, value %u&quot;
virtio_serial_throttle_port(unsigned int port, bool throttle) &quot;port %u, throttle %d&quot;
virtio_serial_handle_control_message(uint16_t event, uint16_t value) &quot;event %u, value %u&quot;
virtio_serial_handle_control_message_port(unsigned int port) &quot;port %u&quot;

# virtio-console.c
virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) &quot;port %u, in_len %zu, out_len %zd&quot;
virtio_console_chr_read(unsigned int port, int size) &quot;port %u, size %d&quot;
virtio_console_chr_event(unsigned int port, int event) &quot;port %u, event %d&quot;

# goldfish_tty.c
goldfish_tty_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) &quot;tty: %p reg: 0x%02x size: %d value: 0x%&quot;PRIx64
goldfish_tty_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) &quot;tty: %p reg: 0x%02x size: %d value: 0x%&quot;PRIx64
goldfish_tty_can_receive(void *dev, unsigned int available) &quot;tty: %p available: %u&quot;
goldfish_tty_receive(void *dev, unsigned int size) &quot;tty: %p size: %u&quot;
goldfish_tty_reset(void *dev) &quot;tty: %p&quot;
goldfish_tty_realize(void *dev) &quot;tty: %p&quot;
goldfish_tty_unrealize(void *dev) &quot;tty: %p&quot;
goldfish_tty_instance_init(void *dev) &quot;tty: %p&quot;

# grlib_apbuart.c
grlib_apbuart_event(int event) &quot;event:%d&quot;
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%x&quot;
grlib_apbuart_readl_unknown(uint64_t addr) &quot;addr 0x%&quot;PRIx64

# escc.c
escc_hard_reset(void) &quot;hard reset&quot;
escc_soft_reset_chn(char channel) &quot;soft reset channel %c&quot;
escc_put_queue(char channel, int b) &quot;channel %c put: 0x%02x&quot;
escc_get_queue(char channel, int val) &quot;channel %c get 0x%02x&quot;
escc_update_irq(int irq) &quot;IRQ = %d&quot;
escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) &quot;channel %c: speed=%d parity=%c data=%d stop=%d&quot;
escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) &quot;Write channel %c, reg[%d] = 0x%2.2x&quot;
escc_mem_writeb_data(char channel, uint32_t val) &quot;Write channel %c, ch %d&quot;
escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) &quot;Read channel %c, reg[%d] = 0x%2.2x&quot;
escc_mem_readb_data(char channel, uint32_t ret) &quot;Read channel %c, ch %d&quot;
escc_serial_receive_byte(char channel, int ch) &quot;channel %c put ch %d&quot;
escc_sunkbd_event_in(int ch, const char *name, int down) &quot;QKeyCode 0x%2.2x [%s], down %d&quot;
escc_sunkbd_event_out(int ch) &quot;Translated keycode 0x%2.2x&quot;
escc_kbd_command(int val) &quot;Command %d&quot;
escc_sunmouse_event(int dx, int dy, int buttons_state) &quot;dx=%d dy=%d buttons=0x%01x&quot;

# pl011.c
pl011_irq_state(int level) &quot;irq state %d&quot;
pl011_read(uint32_t addr, uint32_t value, const char *regname) &quot;addr 0x%03x value 0x%08x reg %s&quot;
pl011_read_fifo(int read_count) &quot;FIFO read, read_count now %d&quot;
pl011_write(uint32_t addr, uint32_t value, const char *regname) &quot;addr 0x%03x value 0x%08x reg %s&quot;
pl011_can_receive(uint32_t lcr, int read_count, int r) &quot;LCR 0x%08x read_count %d returning %d&quot;
pl011_put_fifo(uint32_t c, int read_count) &quot;new char 0x%x read_count now %d&quot;
pl011_put_fifo_full(void) &quot;FIFO now full, RXFF set&quot;
pl011_baudrate_change(unsigned int baudrate, uint64_t clock, uint32_t ibrd, uint32_t fbrd) &quot;new baudrate %u (clk: %&quot; PRIu64 &quot;hz, ibrd: %&quot; PRIu32 &quot;, fbrd: %&quot; PRIu32 &quot;)&quot;

# cmsdk-apb-uart.c
cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB UART read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB UART write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_uart_reset(void) &quot;CMSDK APB UART: reset&quot;
cmsdk_apb_uart_receive(uint8_t c) &quot;CMSDK APB UART: got character 0x%x from backend&quot;
cmsdk_apb_uart_tx_pending(void) &quot;CMSDK APB UART: character send to backend pending&quot;
cmsdk_apb_uart_tx(uint8_t c) &quot;CMSDK APB UART: character 0x%x sent to backend&quot;
cmsdk_apb_uart_set_params(int speed) &quot;CMSDK APB UART: params set to %d 8N1&quot;

# nrf51_uart.c
nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) &quot;addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64 &quot; size %u&quot;
nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) &quot;addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64 &quot; size %u&quot;

# shakti_uart.c
shakti_uart_read(uint64_t addr, uint16_t r, unsigned int size) &quot;addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx16 &quot; size %u&quot;
shakti_uart_write(uint64_t addr, uint64_t value, unsigned int size) &quot;addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64 &quot; size %u&quot;

# exynos4210_uart.c
exynos_uart_dmabusy(uint32_t channel) &quot;UART%d: DMA busy (Rx buffer empty)&quot;
exynos_uart_dmaready(uint32_t channel) &quot;UART%d: DMA ready&quot;
exynos_uart_irq_raised(uint32_t channel, uint32_t reg) &quot;UART%d: IRQ raised: 0x%08&quot;PRIx32
exynos_uart_irq_lowered(uint32_t channel) &quot;UART%d: IRQ lowered&quot;
exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop, uint64_t wordtime) &quot;UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d wordtime: %&quot;PRId64&quot;ns&quot;
exynos_uart_write(uint32_t channel, uint32_t offset, const char *name, uint64_t val) &quot;UART%d: &lt;0x%04x&gt; %s &lt;- 0x%&quot; PRIx64
exynos_uart_read(uint32_t channel, uint32_t offset, const char *name, uint64_t val) &quot;UART%d: &lt;0x%04x&gt; %s -&gt; 0x%&quot; PRIx64
exynos_uart_rx_fifo_reset(uint32_t channel) &quot;UART%d: Rx FIFO Reset&quot;
exynos_uart_tx_fifo_reset(uint32_t channel) &quot;UART%d: Tx FIFO Reset&quot;
exynos_uart_tx(uint32_t channel, uint8_t ch) &quot;UART%d: Tx 0x%02&quot;PRIx32
exynos_uart_intclr(uint32_t channel, uint32_t reg) &quot;UART%d: interrupts cleared: 0x%08&quot;PRIx32
exynos_uart_ro_write(uint32_t channel, const char *name, uint32_t reg) &quot;UART%d: Trying to write into RO register: %s [0x%04&quot;PRIx32&quot;]&quot;
exynos_uart_rx(uint32_t channel, uint8_t ch) &quot;UART%d: Rx 0x%02&quot;PRIx32
exynos_uart_rx_error(uint32_t channel) &quot;UART%d: Rx error&quot;
exynos_uart_wo_read(uint32_t channel, const char *name, uint32_t reg) &quot;UART%d: Trying to read from WO register: %s [0x%04&quot;PRIx32&quot;]&quot;
exynos_uart_rxsize(uint32_t channel, uint32_t size) &quot;UART%d: Rx FIFO size: %d&quot;
exynos_uart_channel_error(uint32_t channel) &quot;Wrong UART channel number: %d&quot;
exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) &quot;UART%d: Rx timeout stat=0x%x intsp=0x%x&quot;

# cadence_uart.c
cadence_uart_baudrate(unsigned baudrate) &quot;baudrate %u&quot;

# sh_serial.c
sh_serial_read(char *id, unsigned size, uint64_t offs, uint64_t val) &quot; %s size %d offs 0x%02&quot; PRIx64 &quot; -&gt; 0x%02&quot; PRIx64
sh_serial_write(char *id, unsigned size, uint64_t offs, uint64_t val) &quot;%s size %d offs 0x%02&quot; PRIx64 &quot; &lt;- 0x%02&quot; PRIx64

# xen_console.c
xen_console_connect(unsigned int idx, unsigned int ring_ref, unsigned int port, unsigned int limit) &quot;idx %u ring_ref %u port %u limit %u&quot;
xen_console_disconnect(unsigned int idx) &quot;idx %u&quot;
xen_console_unrealize(unsigned int idx) &quot;idx %u&quot;
xen_console_realize(unsigned int idx, const char *chrdev) &quot;idx %u chrdev %s&quot;
xen_console_device_create(unsigned int idx) &quot;idx %u&quot;
xen_console_device_destroy(unsigned int idx) &quot;idx %u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# jazz_led.c
jazz_led_read(uint64_t addr, uint8_t val) &quot;read addr=0x%&quot;PRIx64&quot;: 0x%x&quot;
jazz_led_write(uint64_t addr, uint8_t new) &quot;write addr=0x%&quot;PRIx64&quot;: 0x%x&quot;

# xenfb.c
xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) &quot;%p x %d y %d z %d bs 0x%x abs %d&quot;
xenfb_key_event(void *opaque, int scancode, int button_state) &quot;%p scancode %d bs 0x%x&quot;
xenfb_input_connected(void *xendev, int abs_pointer_wanted) &quot;%p abs %d&quot;

# g364fb.c
g364fb_read(uint64_t addr, uint32_t val) &quot;read addr=0x%&quot;PRIx64&quot;: 0x%x&quot;
g364fb_write(uint64_t addr, uint32_t new) &quot;write addr=0x%&quot;PRIx64&quot;: 0x%x&quot;

# vmware_vga.c
vmware_value_read(uint32_t index, uint32_t value) &quot;index %d, value 0x%x&quot;
vmware_value_write(uint32_t index, uint32_t value) &quot;index %d, value 0x%x&quot;
vmware_palette_read(uint32_t index, uint32_t value) &quot;index %d, value 0x%x&quot;
vmware_palette_write(uint32_t index, uint32_t value) &quot;index %d, value 0x%x&quot;
vmware_scratch_read(uint32_t index, uint32_t value) &quot;index %d, value 0x%x&quot;
vmware_scratch_write(uint32_t index, uint32_t value) &quot;index %d, value 0x%x&quot;
vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) &quot;%dx%d @ %d bpp&quot;
vmware_verify_rect_less_than_zero(const char *name, const char *param, int x) &quot;%s: %s was &lt; 0 (%d)&quot;
vmware_verify_rect_greater_than_bound(const char *name, const char *param, int bound, int x) &quot;%s: %s was &gt; %d (%d)&quot;
vmware_verify_rect_surface_bound_exceeded(const char *name, const char *component, int bound, const char *param1, int value1, const char *param2, int value2) &quot;%s: %s &gt; %d (%s: %d, %s: %d)&quot;
vmware_update_rect_delayed_flush(void) &quot;display update FIFO full - forcing flush&quot;

# virtio-gpu-base.c
virtio_gpu_features(bool virgl) &quot;virgl %d&quot;

# virtio-gpu-3d.c
# virtio-gpu.c
virtio_gpu_cmd_get_display_info(void) &quot;&quot;
virtio_gpu_cmd_get_edid(uint32_t scanout) &quot;scanout %d&quot;
virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) &quot;id %d, res 0x%x, w %d, h %d, x %d, y %d&quot;
virtio_gpu_cmd_set_scanout_blob(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) &quot;id %d, res 0x%x, w %d, h %d, x %d, y %d&quot;
virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) &quot;res 0x%x, fmt 0x%x, w %d, h %d&quot;
virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) &quot;res 0x%x, fmt 0x%x, w %d, h %d, d %d&quot;
virtio_gpu_cmd_res_create_blob(uint32_t res, uint64_t size) &quot;res 0x%x, size %&quot; PRId64
virtio_gpu_cmd_res_unref(uint32_t res) &quot;res 0x%x&quot;
virtio_gpu_cmd_res_back_attach(uint32_t res) &quot;res 0x%x&quot;
virtio_gpu_cmd_res_back_detach(uint32_t res) &quot;res 0x%x&quot;
virtio_gpu_cmd_res_xfer_toh_2d(uint32_t res) &quot;res 0x%x&quot;
virtio_gpu_cmd_res_xfer_toh_3d(uint32_t res) &quot;res 0x%x&quot;
virtio_gpu_cmd_res_xfer_fromh_3d(uint32_t res) &quot;res 0x%x&quot;
virtio_gpu_cmd_res_flush(uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) &quot;res 0x%x, w %d, h %d, x %d, y %d&quot;
virtio_gpu_cmd_ctx_create(uint32_t ctx, const char *name) &quot;ctx 0x%x, name %s&quot;
virtio_gpu_cmd_ctx_destroy(uint32_t ctx) &quot;ctx 0x%x&quot;
virtio_gpu_cmd_ctx_res_attach(uint32_t ctx, uint32_t res) &quot;ctx 0x%x, res 0x%x&quot;
virtio_gpu_cmd_ctx_res_detach(uint32_t ctx, uint32_t res) &quot;ctx 0x%x, res 0x%x&quot;
virtio_gpu_cmd_ctx_submit(uint32_t ctx, uint32_t size) &quot;ctx 0x%x, size %d&quot;
virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *type, uint32_t res) &quot;scanout %d, x %d, y %d, %s, res 0x%x&quot;
virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) &quot;fence 0x%&quot; PRIx64 &quot;, type 0x%x&quot;
virtio_gpu_fence_resp(uint64_t fence) &quot;fence 0x%&quot; PRIx64

# qxl.c
disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) &quot;%d %s addr=%u val=%u&quot;
qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) &quot;%d %ux%u mem=0x%&quot; PRIx64 &quot; %u,%u&quot;
qxl_create_guest_primary_rest(int qid, int32_t stride, uint32_t type, uint32_t flags) &quot;%d %d,%d,%d&quot;
qxl_destroy_primary(int qid) &quot;%d&quot;
qxl_enter_vga_mode(int qid) &quot;%d&quot;
qxl_exit_vga_mode(int qid) &quot;%d&quot;
qxl_hard_reset(int qid, int64_t loadvm) &quot;%d loadvm=%&quot;PRId64
qxl_interface_async_complete_io(int qid, uint32_t current_async, void *cookie) &quot;%d current=%d cookie=%p&quot;
qxl_interface_attach_worker(int qid) &quot;%d&quot;
qxl_interface_get_init_info(int qid) &quot;%d&quot;
qxl_interface_set_compression_level(int qid, int64_t level) &quot;%d %&quot;PRId64
qxl_interface_update_area_complete(int qid, uint32_t surface_id, uint32_t dirty_left, uint32_t dirty_right, uint32_t dirty_top, uint32_t dirty_bottom) &quot;%d surface=%d [%d,%d,%d,%d]&quot;
qxl_interface_update_area_complete_rest(int qid, uint32_t num_updated_rects) &quot;%d #=%d&quot;
qxl_interface_update_area_complete_overflow(int qid, int max) &quot;%d max=%d&quot;
qxl_interface_update_area_complete_schedule_bh(int qid, uint32_t num_dirty) &quot;%d #dirty=%d&quot;
qxl_io_destroy_primary_ignored(int qid, const char *mode) &quot;%d %s&quot;
qxl_io_log(int qid, const char *log_buf) &quot;%d %s&quot;
qxl_io_read_unexpected(int qid) &quot;%d&quot;
qxl_io_unexpected_vga_mode(int qid, uint64_t addr, uint64_t val, const char *desc) &quot;%d 0x%&quot;PRIx64&quot;=%&quot;PRIu64&quot; (%s)&quot;
qxl_io_write(int qid, const char *mode, uint64_t addr, const char *aname, uint64_t val, unsigned size, int async) &quot;%d %s addr=%&quot;PRIu64 &quot; (%s) val=%&quot;PRIu64&quot; size=%u async=%d&quot;
qxl_memslot_add_guest(int qid, uint32_t slot_id, uint64_t guest_start, uint64_t guest_end) &quot;%d %u: guest phys 0x%&quot;PRIx64 &quot; - 0x%&quot; PRIx64
qxl_post_load(int qid, const char *mode) &quot;%d %s&quot;
qxl_pre_load(int qid) &quot;%d&quot;
qxl_pre_save(int qid) &quot;%d&quot;
qxl_reset_surfaces(int qid) &quot;%d&quot;
qxl_ring_command_check(int qid, const char *mode) &quot;%d %s&quot;
qxl_ring_command_get(int qid, const char *mode) &quot;%d %s&quot;
qxl_ring_command_req_notification(int qid) &quot;%d&quot;
qxl_ring_cursor_check(int qid, const char *mode) &quot;%d %s&quot;
qxl_ring_cursor_get(int qid, const char *mode) &quot;%d %s&quot;
qxl_ring_cursor_req_notification(int qid) &quot;%d&quot;
qxl_ring_res_push(int qid, const char *mode, uint32_t surface_count, uint32_t free_res, void *last_release, const char *notify) &quot;%d %s s#=%d res#=%d last=%p notify=%s&quot;
qxl_ring_res_push_rest(int qid, uint32_t ring_has, uint32_t ring_size, uint32_t prod, uint32_t cons) &quot;%d ring %d/%d [%d,%d]&quot;
qxl_ring_res_put(int qid, uint32_t free_res) &quot;%d #res=%d&quot;
qxl_set_mode(int qid, int modenr, uint32_t x_res, uint32_t y_res, uint32_t bits, uint64_t devmem) &quot;%d mode=%d [ x=%d y=%d @ bpp=%d devmem=0x%&quot; PRIx64 &quot; ]&quot;
qxl_soft_reset(int qid) &quot;%d&quot;
qxl_spice_destroy_surfaces_complete(int qid) &quot;%d&quot;
qxl_spice_destroy_surfaces(int qid, int async) &quot;%d async=%d&quot;
qxl_spice_destroy_surface_wait_complete(int qid, uint32_t id) &quot;%d sid=%d&quot;
qxl_spice_destroy_surface_wait(int qid, uint32_t id, int async) &quot;%d sid=%d async=%d&quot;
qxl_spice_flush_surfaces_async(int qid, uint32_t surface_count, uint32_t num_free_res) &quot;%d s#=%d, res#=%d&quot;
qxl_spice_monitors_config(int qid) &quot;%d&quot;
qxl_spice_loadvm_commands(int qid, void *ext, uint32_t count) &quot;%d ext=%p count=%d&quot;
qxl_spice_oom(int qid) &quot;%d&quot;
qxl_spice_reset_cursor(int qid) &quot;%d&quot;
qxl_spice_reset_image_cache(int qid) &quot;%d&quot;
qxl_spice_reset_memslots(int qid) &quot;%d&quot;
qxl_spice_update_area(int qid, uint32_t surface_id, uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) &quot;%d sid=%d [%d,%d,%d,%d]&quot;
qxl_spice_update_area_rest(int qid, uint32_t num_dirty_rects, uint32_t clear_dirty_region) &quot;%d #d=%d clear=%d&quot;
qxl_surfaces_dirty(int qid, uint64_t offset, uint64_t size) &quot;%d offset=0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64
qxl_send_events(int qid, uint32_t events) &quot;%d %d&quot;
qxl_send_events_vm_stopped(int qid, uint32_t events) &quot;%d %d&quot;
qxl_set_guest_bug(int qid) &quot;%d&quot;
qxl_interrupt_client_monitors_config(int qid, int num_heads, void *heads) &quot;%d %d %p&quot;
qxl_client_monitors_config_unsupported_by_guest(int qid, uint32_t int_mask, void *client_monitors_config) &quot;%d 0x%X %p&quot;
qxl_client_monitors_config_unsupported_by_device(int qid, int revision) &quot;%d revision=%d&quot;
qxl_client_monitors_config_capped(int qid, int requested, int limit) &quot;%d %d %d&quot;
qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) &quot;%d %u %u&quot;
qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) &quot;%d revision=%d&quot;

# qxl-render.c
qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) &quot;stride=%d [%d, %d, %d, %d]&quot;
qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) &quot;%dx%d, stride %d, bpp %d, depth %d&quot;
qxl_render_update_area_done(void *cookie) &quot;%p&quot;

# vga.c
vga_std_read_io(uint32_t addr, uint32_t val) &quot;addr 0x%x, val 0x%x&quot;
vga_std_write_io(uint32_t addr, uint32_t val) &quot;addr 0x%x, val 0x%x&quot;
vga_vbe_read(uint32_t index, uint32_t val) &quot;index 0x%x, val 0x%x&quot;
vga_vbe_write(uint32_t index, uint32_t val) &quot;index 0x%x, val 0x%x&quot;

# cirrus_vga.c
vga_cirrus_read_io(uint32_t addr, uint32_t val) &quot;addr 0x%x, val 0x%x&quot;
vga_cirrus_write_io(uint32_t addr, uint32_t val) &quot;addr 0x%x, val 0x%x&quot;
vga_cirrus_write_blt(uint32_t offset, uint32_t val) &quot;offset 0x%x, val 0x%x&quot;
vga_cirrus_write_gr(uint8_t index, uint8_t val) &quot;GR addr 0x%02x, val 0x%02x&quot;
vga_cirrus_bitblt_start(uint8_t blt_rop, uint8_t blt_mode, uint8_t blt_modeext, int blt_width, int blt_height, int blt_dstpitch, int blt_srcpitch, uint32_t blt_dstaddr, uint32_t blt_srcaddr, uint8_t gr_val) &quot;rop=0x%02x mode=0x%02x modeext=0x%02x w=%d h=%d dpitch=%d spitch=%d daddr=0x%08&quot;PRIx32&quot; saddr=0x%08&quot;PRIx32&quot; writemask=0x%02x&quot;

# sii9022.c
sii9022_read_reg(uint8_t addr, uint8_t val) &quot;addr 0x%02x, val 0x%02x&quot;
sii9022_write_reg(uint8_t addr, uint8_t val) &quot;addr 0x%02x, val 0x%02x&quot;
sii9022_switch_mode(const char *mode) &quot;mode: %s&quot;

# ati.c
ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) &quot;%u 0x%&quot;PRIx64 &quot; %s -&gt; 0x%&quot;PRIx64
ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) &quot;%u 0x%&quot;PRIx64 &quot; %s &lt;- 0x%&quot;PRIx64

# artist.c
artist_reg_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) &quot;%u 0x%&quot;PRIx64 &quot;%s -&gt; 0x%08&quot;PRIx64
artist_reg_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) &quot;%u 0x%&quot;PRIx64 &quot;%s &lt;- 0x%08&quot;PRIx64
artist_vram_read(unsigned int size, uint64_t addr, uint64_t val) &quot;%u 0x%08&quot;PRIx64 &quot; -&gt; 0x%08&quot;PRIx64
artist_vram_write(unsigned int size, uint64_t addr, uint64_t val) &quot;%u 0x%08&quot;PRIx64 &quot; &lt;- 0x%08&quot;PRIx64
artist_fill_window(unsigned int start_x, unsigned int start_y, unsigned int width, unsigned int height, uint32_t op, uint32_t ctlpln) &quot;start=%ux%u length=%ux%u op=0x%08x ctlpln=0x%08x&quot;
artist_block_move(unsigned int start_x, unsigned int start_y, unsigned int dest_x, unsigned int dest_y, unsigned int width, unsigned int height) &quot;source %ux%u -&gt; dest %ux%u size %ux%u&quot;
artist_draw_line(unsigned int start_x, unsigned int start_y, unsigned int end_x, unsigned int end_y) &quot;%ux%u %ux%u&quot;

# cg3.c
cg3_read(uint32_t addr, uint32_t val, unsigned size) &quot;read addr:0x%06&quot;PRIx32&quot; val:0x%08&quot;PRIx32&quot; size:%u&quot;
cg3_write(uint32_t addr, uint32_t val, unsigned size) &quot;write addr:0x%06&quot;PRIx32&quot; val:0x%08&quot;PRIx32&quot; size:%u&quot;

# dpcd.c
dpcd_read(uint32_t addr, uint8_t val) &quot;read addr:0x%&quot;PRIx32&quot; val:0x%02x&quot;
dpcd_write(uint32_t addr, uint8_t val) &quot;write addr:0x%&quot;PRIx32&quot; val:0x%02x&quot;

# sm501.c
sm501_system_config_read(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_system_config_write(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_i2c_read(uint32_t addr, uint8_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_i2c_write(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_palette_read(uint32_t addr) &quot;addr=0x%x&quot;
sm501_palette_write(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_disp_ctrl_read(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_disp_ctrl_write(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_2d_engine_read(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;
sm501_2d_engine_write(uint32_t addr, uint32_t val) &quot;addr=0x%x, val=0x%x&quot;

# macfb.c
macfb_ctrl_read(uint64_t addr, uint64_t value, unsigned int size) &quot;addr 0x%&quot;PRIx64 &quot; value 0x%&quot;PRIx64 &quot; size %u&quot;
macfb_ctrl_write(uint64_t addr, uint64_t value, unsigned int size) &quot;addr 0x%&quot;PRIx64 &quot; value 0x%&quot;PRIx64 &quot; size %u&quot;
macfb_sense_read(uint32_t value) &quot;video sense: 0x%&quot;PRIx32
macfb_sense_write(uint32_t value) &quot;video sense: 0x%&quot;PRIx32
macfb_update_mode(uint32_t width, uint32_t height, uint8_t depth) &quot;setting mode to width %&quot;PRId32 &quot; height %&quot;PRId32 &quot; size %d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# rc4030.c
jazzio_read(uint64_t addr, uint32_t ret) &quot;read reg[0x%&quot;PRIx64&quot;] = 0x%x&quot;
jazzio_write(uint64_t addr, uint32_t val) &quot;write reg[0x%&quot;PRIx64&quot;] = 0x%x&quot;
rc4030_read(uint64_t addr, uint32_t ret) &quot;read reg[0x%&quot;PRIx64&quot;] = 0x%x&quot;
rc4030_write(uint64_t addr, uint32_t val) &quot;write reg[0x%&quot;PRIx64&quot;] = 0x%x&quot;

# sparc32_dma.c
ledma_memory_read(uint64_t addr, int len) &quot;DMA read addr 0x%&quot;PRIx64 &quot; len %d&quot;
ledma_memory_write(uint64_t addr, int len) &quot;DMA write addr 0x%&quot;PRIx64 &quot; len %d&quot;
sparc32_dma_set_irq_raise(void) &quot;Raise IRQ&quot;
sparc32_dma_set_irq_lower(void) &quot;Lower IRQ&quot;
espdma_memory_read(uint32_t addr, int len) &quot;DMA read addr 0x%08x len %d&quot;
espdma_memory_write(uint32_t addr, int len) &quot;DMA write addr 0x%08x len %d&quot;
sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) &quot;read dmareg 0x%&quot;PRIx64&quot;: 0x%08x&quot;
sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) &quot;write dmareg 0x%&quot;PRIx64&quot;: 0x%08x -&gt; 0x%08x&quot;
sparc32_dma_enable_raise(void) &quot;Raise DMA enable&quot;
sparc32_dma_enable_lower(void) &quot;Lower DMA enable&quot;

# i8257.c
i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) &quot;unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d&quot;

# pl330.c
pl330_fault(void *ptr, uint32_t flags) &quot;ch: %p, flags: 0x%&quot;PRIx32
pl330_fault_abort(void) &quot;abort interrupt raised&quot;
pl330_dmaend(void) &quot;DMA ending&quot;
pl330_dmago(void) &quot;DMA run&quot;
pl330_dmald(uint8_t chan, uint32_t addr, uint32_t size, uint32_t num, char ch) &quot;channel:%&quot;PRId8&quot; address:0x%08&quot;PRIx32&quot; size:0x%&quot;PRIx32&quot; num:%&quot;PRId32&quot;%c&quot;
pl330_dmakill(void) &quot;abort interrupt lowered&quot;
pl330_dmalpend(uint8_t nf, uint8_t bs, uint8_t lc, uint8_t ch, uint8_t flag) &quot;nf=0x%02x bs=0x%02x lc=0x%02x ch=0x%02x flag=0x%02x&quot;
pl330_dmalpiter(void) &quot;loop reiteration&quot;
pl330_dmalpfallthrough(void) &quot;loop fallthrough&quot;
pl330_dmasev_evirq(uint8_t ev_id) &quot;event interrupt raised %&quot;PRId8
pl330_dmasev_event(uint8_t ev_id) &quot;event raised %&quot;PRId8
pl330_dmast(uint8_t chan, uint32_t addr, uint32_t sz, uint32_t num, char ch) &quot;channel:%&quot;PRId8&quot; address:0x%08&quot;PRIx32&quot; size:0x%&quot;PRIx32&quot; num:%&quot;PRId32&quot; %c&quot;
pl330_dmawfe(uint8_t ev_id) &quot;event lowered 0x%&quot;PRIx8
pl330_chan_exec_undef(void) &quot;undefined instruction&quot;
pl330_exec_cycle(uint32_t addr, uint32_t size) &quot;PL330 read from memory @0x%08&quot;PRIx32&quot; (size = 0x%08&quot;PRIx32&quot;)&quot;
pl330_hexdump(uint32_t offset, char *str) &quot; 0x%04&quot;PRIx32&quot;:%s&quot;
pl330_exec(void) &quot;pl330_exec&quot;
pl330_debug_exec(uint8_t ch) &quot;chan id: 0x%&quot;PRIx8
pl330_debug_exec_stall(void) &quot;stall of debug instruction not implemented&quot;
pl330_iomem_write(uint32_t offset, uint32_t value) &quot;addr: 0x%08&quot;PRIx32&quot; data: 0x%08&quot;PRIx32
pl330_iomem_write_clr(int i) &quot;event interrupt lowered %d&quot;
pl330_iomem_read(uint32_t addr, uint32_t data) &quot;addr: 0x%08&quot;PRIx32&quot; data: 0x%08&quot;PRIx32
# vmbus.c
vmbus_recv_message(uint32_t type, uint32_t size) &quot;type %d size %d&quot;
vmbus_signal_event(void) &quot;&quot;
vmbus_channel_notify_guest(uint32_t chan_id) &quot;channel #%d&quot;
vmbus_post_msg(uint32_t type, uint32_t size) &quot;type %d size %d&quot;
vmbus_msg_cb(int status) &quot;message status %d&quot;
vmbus_process_incoming_message(uint32_t message_type) &quot;type %d&quot;
vmbus_initiate_contact(uint16_t major, uint16_t minor, uint32_t vcpu, uint64_t monitor_page1, uint64_t monitor_page2, uint64_t interrupt_page) &quot;version %d.%d target vp %d mon pages 0x%&quot;PRIx64&quot;,0x%&quot;PRIx64&quot; int page 0x%&quot;PRIx64
vmbus_send_offer(uint32_t chan_id, void *dev) &quot;channel #%d dev %p&quot;
vmbus_terminate_offers(void) &quot;&quot;
vmbus_gpadl_header(uint32_t gpadl_id, uint16_t num_gfns) &quot;gpadl #%d gfns %d&quot;
vmbus_gpadl_body(uint32_t gpadl_id) &quot;gpadl #%d&quot;
vmbus_gpadl_created(uint32_t gpadl_id) &quot;gpadl #%d&quot;
vmbus_gpadl_teardown(uint32_t gpadl_id) &quot;gpadl #%d&quot;
vmbus_gpadl_torndown(uint32_t gpadl_id) &quot;gpadl #%d&quot;
vmbus_open_channel(uint32_t chan_id, uint32_t gpadl_id, uint32_t target_vp) &quot;channel #%d gpadl #%d target vp %d&quot;
vmbus_channel_open(uint32_t chan_id, uint32_t status) &quot;channel #%d status %d&quot;
vmbus_close_channel(uint32_t chan_id) &quot;channel #%d&quot;

# hv-balloon
hv_balloon_state_change(const char *tostr) &quot;-&gt; %s&quot;
hv_balloon_incoming_version(uint16_t major, uint16_t minor) &quot;incoming proto version %u.%u&quot;
hv_balloon_incoming_caps(uint32_t caps) &quot;incoming caps 0x%x&quot;
hv_balloon_outgoing_unballoon(uint32_t trans_id, uint64_t count, uint64_t start, uint64_t rempages) &quot;posting unballoon %&quot;PRIu32&quot; for %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot;, remaining %&quot;PRIu64
hv_balloon_incoming_unballoon(uint32_t trans_id) &quot;incoming unballoon response %&quot;PRIu32
hv_balloon_outgoing_hot_add(uint32_t trans_id, uint64_t count, uint64_t start) &quot;posting hot add %&quot;PRIu32&quot; for %&quot;PRIu64&quot; @ 0x%&quot;PRIx64
hv_balloon_incoming_hot_add(uint32_t trans_id, uint32_t result, uint32_t count) &quot;incoming hot add response %&quot;PRIu32&quot;, result %&quot;PRIu32&quot;, count %&quot;PRIu32
hv_balloon_outgoing_balloon(uint32_t trans_id, uint64_t count, uint64_t rempages) &quot;posting balloon %&quot;PRIu32&quot; for %&quot;PRIu64&quot;, remaining %&quot;PRIu64
hv_balloon_incoming_balloon(uint32_t trans_id, uint32_t range_count, uint32_t more_pages) &quot;incoming balloon response %&quot;PRIu32&quot;, ranges %&quot;PRIu32&quot;, more %&quot;PRIu32
hv_balloon_our_range_add(uint64_t count, uint64_t start) &quot;adding our range %&quot;PRIu64&quot; @ 0x%&quot;PRIx64
hv_balloon_remove_response(uint64_t count, uint64_t start, unsigned int both) &quot;processing remove response range %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot;, both %u&quot;
hv_balloon_remove_response_hole(uint64_t counthole, uint64_t starthole, uint64_t countrange, uint64_t startrange, uint64_t starthpr, unsigned int both) &quot;response range hole %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot; from range %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot;, before our start 0x%&quot;PRIx64&quot;, both %u&quot;
hv_balloon_remove_response_common(uint64_t countcommon, uint64_t startcommon, uint64_t countrange, uint64_t startrange, uint64_t counthpr, uint64_t starthpr, uint64_t removed, unsigned int both) &quot;response common range %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot; from range %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot; with our %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot;, removed %&quot;PRIu64&quot;, both %u&quot;
hv_balloon_remove_response_remainder(uint64_t count, uint64_t start, unsigned int both) &quot;remove response remaining range %&quot;PRIu64&quot; @ 0x%&quot;PRIx64&quot;, both %u&quot;
hv_balloon_map_slot(unsigned int idx, unsigned int total_slots, uint64_t offset) &quot;mapping memslot %u / %u @ 0x%&quot;PRIx64
hv_balloon_unmap_slot(unsigned int idx, unsigned int total_slots, uint64_t offset) &quot;unmapping memslot %u / %u @ 0x%&quot;PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# bitbang_i2c.c
bitbang_i2c_state(const char *old_state, const char *new_state) &quot;state %s -&gt; %s&quot;
bitbang_i2c_addr(uint8_t addr) &quot;Address 0x%02x&quot;
bitbang_i2c_send(uint8_t byte) &quot;TX byte 0x%02x&quot;
bitbang_i2c_recv(uint8_t byte) &quot;RX byte 0x%02x&quot;
bitbang_i2c_data(unsigned clk, unsigned dat, unsigned old_out, unsigned new_out) &quot;clk %u dat %u out %u -&gt; %u&quot;

# core.c

i2c_event(const char *event, uint8_t address) &quot;%s(addr:0x%02x)&quot;
i2c_send(uint8_t address, uint8_t data) &quot;send(addr:0x%02x) data:0x%02x&quot;
i2c_send_async(uint8_t address, uint8_t data) &quot;send_async(addr:0x%02x) data:0x%02x&quot;
i2c_recv(uint8_t address, uint8_t data) &quot;recv(addr:0x%02x) data:0x%02x&quot;
i2c_ack(void) &quot;&quot;

# pm_smbus.c

smbus_ioport_readb(uint16_t addr, uint8_t data) &quot;[0x%04&quot; PRIx16 &quot;] -&gt; val=0x%02x&quot;
smbus_ioport_writeb(uint16_t addr, uint8_t data) &quot;[0x%04&quot; PRIx16 &quot;] &lt;- val=0x%02x&quot;
smbus_transaction(uint8_t addr, uint8_t prot) &quot;addr=0x%02x prot=0x%02x&quot;

# allwinner_i2c.c

allwinner_i2c_read(const char* reg_name, uint64_t offset, uint64_t value) &quot;read %s [0x%&quot; PRIx64 &quot;]: -&gt; 0x%&quot; PRIx64
allwinner_i2c_write(const char* reg_name, uint64_t offset, uint64_t value) &quot;write %s [0x%&quot; PRIx64 &quot;]: &lt;- 0x%&quot; PRIx64

# aspeed_i2c.c

aspeed_i2c_bus_cmd(uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) &quot;handling cmd=0x%x %s count=%d intr=0x%x&quot;
aspeed_i2c_bus_raise_interrupt(uint32_t intr_status, const char *s) &quot;handled intr=0x%x %s&quot;
aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) &quot;bus[%d]: To 0x%&quot; PRIx64 &quot; of size %u: 0x%&quot; PRIx64
aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) &quot;bus[%d]: To 0x%&quot; PRIx64 &quot; of size %u: 0x%&quot; PRIx64
aspeed_i2c_bus_send(const char *mode, int i, int count, uint8_t byte) &quot;%s send %d/%d 0x%02x&quot;
aspeed_i2c_bus_recv(const char *mode, int i, int count, uint8_t byte) &quot;%s recv %d/%d 0x%02x&quot;

# npcm7xx_smbus.c

npcm7xx_smbus_read(const char *id, uint64_t offset, uint64_t value, unsigned size) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value: 0x%02&quot; PRIx64 &quot; size: %u&quot;
npcm7xx_smbus_write(const char *id, uint64_t offset, uint64_t value, unsigned size) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value: 0x%02&quot; PRIx64 &quot; size: %u&quot;
npcm7xx_smbus_start(const char *id, int success) &quot;%s starting, success: %d&quot;
npcm7xx_smbus_send_address(const char *id, uint8_t addr, int recv, int success) &quot;%s sending address: 0x%02x, recv: %d, success: %d&quot;
npcm7xx_smbus_send_byte(const char *id, uint8_t value, int success) &quot;%s send byte: 0x%02x, success: %d&quot;
npcm7xx_smbus_recv_byte(const char *id, uint8_t value) &quot;%s recv byte: 0x%02x&quot;
npcm7xx_smbus_stop(const char *id) &quot;%s stopping&quot;
npcm7xx_smbus_nack(const char *id) &quot;%s nacking&quot;
npcm7xx_smbus_recv_fifo(const char *id, uint8_t received, uint8_t expected) &quot;%s recv fifo: received %u, expected %u&quot;

# i2c-mux-pca954x.c

pca954x_write_bytes(uint8_t value) &quot;PCA954X write data: 0x%02x&quot;
pca954x_read_data(uint8_t value) &quot;PCA954X read data: 0x%02x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# x86-iommu.c
x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) &quot;Notify IEC invalidation: global=%d index=%&quot; PRIu32 &quot; mask=%&quot; PRIu32

# intel_iommu.c
vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) &quot;invalidate desc type %s high 0x%&quot;PRIx64&quot; low 0x%&quot;PRIx64
vtd_inv_desc_cc_domain(uint16_t domain) &quot;context invalidate domain 0x%&quot;PRIx16
vtd_inv_desc_cc_global(void) &quot;context invalidate globally&quot;
vtd_inv_desc_cc_device(uint8_t bus, uint8_t dev, uint8_t fn) &quot;context invalidate device %02&quot;PRIx8&quot;:%02&quot;PRIx8&quot;.%02&quot;PRIx8
vtd_inv_desc_cc_devices(uint16_t sid, uint16_t fmask) &quot;context invalidate devices sid 0x%&quot;PRIx16&quot; fmask 0x%&quot;PRIx16
vtd_inv_desc_iotlb_global(void) &quot;iotlb invalidate global&quot;
vtd_inv_desc_iotlb_domain(uint16_t domain) &quot;iotlb invalidate whole domain 0x%&quot;PRIx16
vtd_inv_desc_iotlb_pages(uint16_t domain, uint64_t addr, uint8_t mask) &quot;iotlb invalidate domain 0x%&quot;PRIx16&quot; addr 0x%&quot;PRIx64&quot; mask 0x%&quot;PRIx8
vtd_inv_desc_iotlb_pasid_pages(uint16_t domain, uint64_t addr, uint8_t mask, uint32_t pasid) &quot;iotlb invalidate domain 0x%&quot;PRIx16&quot; addr 0x%&quot;PRIx64&quot; mask 0x%&quot;PRIx8&quot; pasid 0x%&quot;PRIx32
vtd_inv_desc_iotlb_pasid(uint16_t domain, uint32_t pasid) &quot;iotlb invalidate domain 0x%&quot;PRIx16&quot; pasid 0x%&quot;PRIx32
vtd_inv_desc_wait_sw(uint64_t addr, uint32_t data) &quot;wait invalidate status write addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx32
vtd_inv_desc_wait_irq(const char *msg) &quot;%s&quot;
vtd_inv_desc_wait_write_fail(uint64_t hi, uint64_t lo) &quot;write fail for wait desc hi 0x%&quot;PRIx64&quot; lo 0x%&quot;PRIx64
vtd_inv_desc_iec(uint32_t granularity, uint32_t index, uint32_t mask) &quot;granularity 0x%&quot;PRIx32&quot; index 0x%&quot;PRIx32&quot; mask 0x%&quot;PRIx32
vtd_inv_qi_enable(bool enable) &quot;enabled %d&quot;
vtd_inv_qi_setup(uint64_t addr, int size) &quot;addr 0x%&quot;PRIx64&quot; size %d&quot;
vtd_inv_qi_head(uint16_t head) &quot;read head %d&quot;
vtd_inv_qi_tail(uint16_t head) &quot;write tail %d&quot;
vtd_inv_qi_fetch(void) &quot;&quot;
vtd_context_cache_reset(void) &quot;&quot;
vtd_re_not_present(uint8_t bus) &quot;Root entry bus %&quot;PRIu8&quot; not present&quot;
vtd_ce_not_present(uint8_t bus, uint8_t devfn) &quot;Context entry bus %&quot;PRIu8&quot; devfn %&quot;PRIu8&quot; not present&quot;
vtd_iotlb_page_hit(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) &quot;IOTLB page hit sid 0x%&quot;PRIx16&quot; iova 0x%&quot;PRIx64&quot; slpte 0x%&quot;PRIx64&quot; domain 0x%&quot;PRIx16
vtd_iotlb_page_update(uint16_t sid, uint64_t addr, uint64_t slpte, uint16_t domain) &quot;IOTLB page update sid 0x%&quot;PRIx16&quot; iova 0x%&quot;PRIx64&quot; slpte 0x%&quot;PRIx64&quot; domain 0x%&quot;PRIx16
vtd_iotlb_cc_hit(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen) &quot;IOTLB context hit bus 0x%&quot;PRIx8&quot; devfn 0x%&quot;PRIx8&quot; high 0x%&quot;PRIx64&quot; low 0x%&quot;PRIx64&quot; gen %&quot;PRIu32
vtd_iotlb_cc_update(uint8_t bus, uint8_t devfn, uint64_t high, uint64_t low, uint32_t gen1, uint32_t gen2) &quot;IOTLB context update bus 0x%&quot;PRIx8&quot; devfn 0x%&quot;PRIx8&quot; high 0x%&quot;PRIx64&quot; low 0x%&quot;PRIx64&quot; gen %&quot;PRIu32&quot; -&gt; gen %&quot;PRIu32
vtd_iotlb_reset(const char *reason) &quot;IOTLB reset (reason: %s)&quot;
vtd_fault_disabled(void) &quot;Fault processing disabled for context entry&quot;
vtd_replay_ce_valid(const char *mode, uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain, uint64_t hi, uint64_t lo) &quot;%s: replay valid context device %02&quot;PRIx8&quot;:%02&quot;PRIx8&quot;.%02&quot;PRIx8&quot; domain 0x%&quot;PRIx16&quot; hi 0x%&quot;PRIx64&quot; lo 0x%&quot;PRIx64
vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) &quot;replay invalid context device %02&quot;PRIx8&quot;:%02&quot;PRIx8&quot;.%02&quot;PRIx8
vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t end) &quot;walk (base=0x%&quot;PRIx64&quot;, level=%&quot;PRIu32&quot;) iova range 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t mask, int perm) &quot;domain 0x%&quot;PRIx16&quot; iova 0x%&quot;PRIx64&quot; -&gt; gpa 0x%&quot;PRIx64&quot; mask 0x%&quot;PRIx64&quot; perm %d&quot;
vtd_page_walk_one_skip_map(uint64_t iova, uint64_t mask, uint64_t translated) &quot;iova 0x%&quot;PRIx64&quot; mask 0x%&quot;PRIx64&quot; translated 0x%&quot;PRIx64
vtd_page_walk_one_skip_unmap(uint64_t iova, uint64_t mask) &quot;iova 0x%&quot;PRIx64&quot; mask 0x%&quot;PRIx64
vtd_page_walk_skip_read(uint64_t iova, uint64_t next) &quot;Page walk skip iova 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot; due to unable to read&quot;
vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) &quot;Page walk skip iova 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot; due to rsrv set&quot;
vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) &quot;Device %02x:%02x.%x switching address space (iommu enabled=%d)&quot;
vtd_as_unmap_whole(uint8_t bus, uint8_t slot, uint8_t fn, uint64_t iova, uint64_t size) &quot;Device %02x:%02x.%x start 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64
vtd_translate_pt(uint16_t sid, uint64_t addr) &quot;source id 0x%&quot;PRIx16&quot;, iova 0x%&quot;PRIx64
vtd_pt_enable_fast_path(uint16_t sid, bool success) &quot;sid 0x%&quot;PRIx16&quot; %d&quot;
vtd_irq_generate(uint64_t addr, uint64_t data) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64
vtd_reg_read(uint64_t addr, uint64_t size) &quot;addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64
vtd_reg_write(uint64_t addr, uint64_t size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
vtd_reg_dmar_root(uint64_t addr, bool scalable) &quot;addr 0x%&quot;PRIx64&quot; scalable %d&quot;
vtd_reg_ir_root(uint64_t addr, uint32_t size) &quot;addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx32
vtd_reg_write_gcmd(uint32_t status, uint32_t val) &quot;status 0x%&quot;PRIx32&quot; value 0x%&quot;PRIx32
vtd_reg_write_fectl(uint32_t value) &quot;value 0x%&quot;PRIx32
vtd_reg_write_iectl(uint32_t value) &quot;value 0x%&quot;PRIx32
vtd_reg_ics_clear_ip(void) &quot;&quot;
vtd_dmar_translate(uint8_t bus, uint8_t slot, uint8_t func, uint64_t iova, uint64_t gpa, uint64_t mask) &quot;dev %02x:%02x.%02x iova 0x%&quot;PRIx64&quot; -&gt; gpa 0x%&quot;PRIx64&quot; mask 0x%&quot;PRIx64
vtd_dmar_enable(bool en) &quot;enable %d&quot;
vtd_dmar_fault(uint16_t sid, int fault, uint64_t addr, bool is_write) &quot;sid 0x%&quot;PRIx16&quot; fault %d addr 0x%&quot;PRIx64&quot; write %d&quot;
vtd_ir_enable(bool en) &quot;enable %d&quot;
vtd_ir_irte_get(int index, uint64_t lo, uint64_t hi) &quot;index %d low 0x%&quot;PRIx64&quot; high 0x%&quot;PRIx64
vtd_ir_remap(int index, int tri, int vec, int deliver, uint32_t dest, int dest_mode) &quot;index %d trigger %d vector %d deliver %d dest 0x%&quot;PRIx32&quot; mode %d&quot;
vtd_ir_remap_type(const char *type) &quot;%s&quot;
vtd_ir_remap_msi(uint64_t addr, uint64_t data, uint64_t addr2, uint64_t data2) &quot;(addr 0x%&quot;PRIx64&quot;, data 0x%&quot;PRIx64&quot;) -&gt; (addr 0x%&quot;PRIx64&quot;, data 0x%&quot;PRIx64&quot;)&quot;
vtd_ir_remap_msi_req(uint64_t addr, uint64_t data) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64
vtd_fsts_ppf(bool set) &quot;FSTS PPF bit set to %d&quot;
vtd_fsts_clear_ip(void) &quot;&quot;
vtd_frr_new(int index, uint64_t hi, uint64_t lo) &quot;index %d high 0x%&quot;PRIx64&quot; low 0x%&quot;PRIx64
vtd_warn_invalid_qi_tail(uint16_t tail) &quot;tail 0x%&quot;PRIx16
vtd_warn_ir_vector(uint16_t sid, int index, int vec, int target) &quot;sid 0x%&quot;PRIx16&quot; index %d vec %d (should be: %d)&quot;
vtd_warn_ir_trigger(uint16_t sid, int index, int trig, int target) &quot;sid 0x%&quot;PRIx16&quot; index %d trigger %d (should be: %d)&quot;

# amd_iommu.c
amdvi_evntlog_fail(uint64_t addr, uint32_t head) &quot;error: fail to write at addr 0x%&quot;PRIx64&quot; +  offset 0x%&quot;PRIx32
amdvi_cache_update(uint16_t domid, uint8_t bus, uint8_t slot, uint8_t func, uint64_t gpa, uint64_t txaddr) &quot; update iotlb domid 0x%&quot;PRIx16&quot; devid: %02x:%02x.%x gpa 0x%&quot;PRIx64&quot; hpa 0x%&quot;PRIx64
amdvi_completion_wait_fail(uint64_t addr) &quot;error: fail to write at address 0x%&quot;PRIx64
amdvi_mmio_write(const char *reg, uint64_t addr, unsigned size, uint64_t val, uint64_t offset) &quot;%s write addr 0x%&quot;PRIx64&quot;, size %u, val 0x%&quot;PRIx64&quot;, offset 0x%&quot;PRIx64
amdvi_mmio_read(const char *reg, uint64_t addr, unsigned size, uint64_t offset) &quot;%s read addr 0x%&quot;PRIx64&quot;, size %u offset 0x%&quot;PRIx64
amdvi_mmio_read_invalid(int max, uint64_t addr, unsigned size) &quot;error: addr outside region (max 0x%x): read addr 0x%&quot; PRIx64 &quot;, size %u&quot;
amdvi_command_error(uint64_t status) &quot;error: Executing commands with command buffer disabled 0x%&quot;PRIx64
amdvi_command_read_fail(uint64_t addr, uint32_t head) &quot;error: fail to access memory at 0x%&quot;PRIx64&quot; + 0x%&quot;PRIx32
amdvi_command_exec(uint32_t head, uint32_t tail, uint64_t buf) &quot;command buffer head at 0x%&quot;PRIx32&quot; command buffer tail at 0x%&quot;PRIx32&quot; command buffer base at 0x%&quot;PRIx64
amdvi_unhandled_command(uint8_t type) &quot;unhandled command 0x%&quot;PRIx8
amdvi_intr_inval(void) &quot;Interrupt table invalidated&quot;
amdvi_iotlb_inval(void) &quot;IOTLB pages invalidated&quot;
amdvi_prefetch_pages(void) &quot;Pre-fetch of AMD-Vi pages requested&quot;
amdvi_pages_inval(uint16_t domid) &quot;AMD-Vi pages for domain 0x%&quot;PRIx16 &quot; invalidated&quot;
amdvi_all_inval(void) &quot;Invalidation of all AMD-Vi cache requested &quot;
amdvi_ppr_exec(void) &quot;Execution of PPR queue requested &quot;
amdvi_devtab_inval(uint8_t bus, uint8_t slot, uint8_t func) &quot;device table entry for devid: %02x:%02x.%x invalidated&quot;
amdvi_completion_wait(uint64_t addr, uint64_t data) &quot;completion wait requested with store address 0x%&quot;PRIx64&quot; and store data 0x%&quot;PRIx64
amdvi_control_status(uint64_t val) &quot;MMIO_STATUS state 0x%&quot;PRIx64
amdvi_iotlb_reset(void) &quot;IOTLB exceed size limit - reset &quot;
amdvi_dte_get_fail(uint64_t addr, uint32_t offset) &quot;error: failed to access Device Entry devtab 0x%&quot;PRIx64&quot; offset 0x%&quot;PRIx32
amdvi_invalid_dte(uint64_t addr) &quot;PTE entry at 0x%&quot;PRIx64&quot; is invalid &quot;
amdvi_get_pte_hwerror(uint64_t addr) &quot;hardware error eccessing PTE at addr 0x%&quot;PRIx64
amdvi_mode_invalid(uint8_t level, uint64_t addr)&quot;error: translation level 0x%&quot;PRIx8&quot; translating addr 0x%&quot;PRIx64
amdvi_page_fault(uint64_t addr) &quot;error: page fault accessing guest physical address 0x%&quot;PRIx64
amdvi_iotlb_hit(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) &quot;hit iotlb devid %02x:%02x.%x gpa 0x%&quot;PRIx64&quot; hpa 0x%&quot;PRIx64
amdvi_translation_result(uint8_t bus, uint8_t slot, uint8_t func, uint64_t addr, uint64_t txaddr) &quot;devid: %02x:%02x.%x gpa 0x%&quot;PRIx64&quot; hpa 0x%&quot;PRIx64
amdvi_mem_ir_write_req(uint64_t addr, uint64_t val, uint32_t size) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx32
amdvi_mem_ir_write(uint64_t addr, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64
amdvi_ir_remap_msi_req(uint64_t addr, uint64_t data, uint8_t devid) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64&quot; devid 0x%&quot;PRIx8
amdvi_ir_remap_msi(uint64_t addr, uint64_t data, uint64_t addr2, uint64_t data2) &quot;(addr 0x%&quot;PRIx64&quot;, data 0x%&quot;PRIx64&quot;) -&gt; (addr 0x%&quot;PRIx64&quot;, data 0x%&quot;PRIx64&quot;)&quot;
amdvi_err(const char *str) &quot;%s&quot;
amdvi_ir_irte(uint64_t addr, uint64_t data) &quot;addr 0x%&quot;PRIx64&quot; offset 0x%&quot;PRIx64
amdvi_ir_irte_val(uint32_t data) &quot;data 0x%&quot;PRIx32
amdvi_ir_err(const char *str) &quot;%s&quot;
amdvi_ir_intctl(uint8_t val) &quot;int_ctl 0x%&quot;PRIx8
amdvi_ir_target_abort(const char *str) &quot;%s&quot;
amdvi_ir_delivery_mode(const char *str) &quot;%s&quot;
amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) &quot;hi 0x%&quot;PRIx64&quot; lo 0x%&quot;PRIx64

# vmport.c
vmport_register(unsigned char command, void *func, void *opaque) &quot;command: 0x%02x func: %p opaque: %p&quot;
vmport_command(unsigned char command) &quot;command: 0x%02x&quot;

# x86.c
x86_gsi_interrupt(int irqn, int level) &quot;GSI interrupt #%d level:%d&quot;
x86_pic_interrupt(int irqn, int level) &quot;PIC interrupt #%d level:%d&quot;

# port92.c
port92_read(uint8_t val) &quot;port92: read 0x%02x&quot;
port92_write(uint8_t val) &quot;port92: write 0x%02x&quot;

# vmmouse.c
vmmouse_get_status(void) &quot;&quot;
vmmouse_mouse_event(int x, int y, int dz, int buttons_state) &quot;event: x=%d y=%d dz=%d state=%d&quot;
vmmouse_init(void) &quot;&quot;
vmmouse_read_id(void) &quot;&quot;
vmmouse_request_relative(void) &quot;&quot;
vmmouse_request_absolute(void) &quot;&quot;
vmmouse_disable(void) &quot;&quot;
vmmouse_data(uint32_t size) &quot;data: size=%&quot; PRIu32
# See docs/devel/tracing.rst for syntax documentation.

# xen_platform.c
xen_platform_log(char *s) &quot;xen platform: %s&quot;

# xen_pvdevice.c
xen_pv_mmio_read(uint64_t addr) &quot;WARNING: read from Xen PV Device MMIO space (address 0x%&quot;PRIx64&quot;)&quot;
xen_pv_mmio_write(uint64_t addr) &quot;WARNING: write to Xen PV Device MMIO space (address 0x%&quot;PRIx64&quot;)&quot;

kvm_xen_map_pirq(int pirq, int gsi) &quot;pirq %d gsi %d&quot;
kvm_xen_unmap_pirq(int pirq, int gsi) &quot;pirq %d gsi %d&quot;
kvm_xen_get_free_pirq(int pirq, int type) &quot;pirq %d type %d&quot;
kvm_xen_bind_pirq(int pirq, int port) &quot;pirq %d port %d&quot;
kvm_xen_unmask_pirq(int pirq, char *dev, int vector) &quot;pirq %d dev %s vector %d&quot;
xenstore_error(unsigned int id, unsigned int tx_id, const char *err) &quot;req %u tx %u err %s&quot;
xenstore_read(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_write(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_mkdir(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_directory(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_directory_part(unsigned int tx_id, const char *path, unsigned int offset) &quot;tx %u path %s offset %u&quot;
xenstore_transaction_start(unsigned int new_tx) &quot;new_tx %u&quot;
xenstore_transaction_end(unsigned int tx_id, bool commit) &quot;tx %u commit %d&quot;
xenstore_rm(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_get_perms(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_set_perms(unsigned int tx_id, const char *path) &quot;tx %u path %s&quot;
xenstore_watch(const char *path, const char *token) &quot;path %s token %s&quot;
xenstore_unwatch(const char *path, const char *token) &quot;path %s token %s&quot;
xenstore_reset_watches(void) &quot;&quot;
xenstore_watch_event(const char *path, const char *token) &quot;path %s token %s&quot;
xen_primary_console_create(void) &quot;&quot;
xen_primary_console_reset(int port) &quot;port %u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# core.c
# portio
ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s)  &quot;IDE PIO rd @ 0x%&quot;PRIx32&quot; (%s); val 0x%02&quot;PRIx32&quot;; bus %p IDEState %p&quot;
ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) &quot;IDE PIO wr @ 0x%&quot;PRIx32&quot; (%s); val 0x%02&quot;PRIx32&quot;; bus %p IDEState %p&quot;
ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s)                   &quot;IDE PIO rd @ 0x%&quot;PRIx32&quot; (Alt Status); val 0x%02&quot;PRIx32&quot;; bus %p; IDEState %p&quot;
ide_ctrl_write(uint32_t addr, uint32_t val, void *bus)                             &quot;IDE PIO wr @ 0x%&quot;PRIx32&quot; (Device Control); val 0x%02&quot;PRIx32&quot;; bus %p&quot;
# Warning: verbose
ide_data_readw(uint32_t addr, uint32_t val, void *bus, void *s)                    &quot;IDE PIO rd @ 0x%&quot;PRIx32&quot; (Data: Word); val 0x%04&quot;PRIx32&quot;; bus %p; IDEState %p&quot;
ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s)                   &quot;IDE PIO wr @ 0x%&quot;PRIx32&quot; (Data: Word); val 0x%04&quot;PRIx32&quot;; bus %p; IDEState %p&quot;
ide_data_readl(uint32_t addr, uint32_t val, void *bus, void *s)                    &quot;IDE PIO rd @ 0x%&quot;PRIx32&quot; (Data: Long); val 0x%08&quot;PRIx32&quot;; bus %p; IDEState %p&quot;
ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s)                   &quot;IDE PIO wr @ 0x%&quot;PRIx32&quot; (Data: Long); val 0x%08&quot;PRIx32&quot;; bus %p; IDEState %p&quot;
# misc
ide_bus_exec_cmd(void *bus, void *state, uint32_t cmd) &quot;IDE exec cmd: bus %p; state %p; cmd 0x%02x&quot;
ide_cancel_dma_sync_buffered(void *fn, void *req) &quot;invoking cb %p of buffered request %p with -ECANCELED&quot;
ide_cancel_dma_sync_remaining(void) &quot;draining all remaining requests&quot;
ide_sector_read(int64_t sector_num, int nsectors) &quot;sector=%&quot;PRId64&quot; nsectors=%d&quot;
ide_sector_write(int64_t sector_num, int nsectors) &quot;sector=%&quot;PRId64&quot; nsectors=%d&quot;
ide_reset(void *s) &quot;IDEstate %p&quot;
ide_bus_reset_aio(void) &quot;aio_cancel&quot;
ide_dma_cb(void *s, int64_t sector_num, int n, const char *dma) &quot;IDEState %p; sector_num=%&quot;PRId64&quot; n=%d cmd=%s&quot;

# BMDMA HBAs:

# cmd646.c
bmdma_read_cmd646(uint64_t addr, uint32_t val) &quot;bmdma: readb 0x%&quot;PRIx64&quot; : 0x%02x&quot;
bmdma_write_cmd646(uint64_t addr, uint64_t val) &quot;bmdma: writeb 0x%&quot;PRIx64&quot; : 0x%02&quot;PRIx64

# pci.c
bmdma_reset(void) &quot;&quot;
bmdma_cmd_writeb(uint32_t val) &quot;val: 0x%08x&quot;
bmdma_addr_read(uint64_t data) &quot;data: 0x%016&quot;PRIx64
bmdma_addr_write(uint64_t data) &quot;data: 0x%016&quot;PRIx64

# piix.c
bmdma_read(uint64_t addr, uint8_t val) &quot;bmdma: readb 0x%&quot;PRIx64&quot; : 0x%02x&quot;
bmdma_write(uint64_t addr, uint64_t val) &quot;bmdma: writeb 0x%&quot;PRIx64&quot; : 0x%02&quot;PRIx64

# sii3112.c
sii3112_read(int size, uint64_t addr, uint64_t val) &quot;bmdma: read (size %d) 0x%&quot;PRIx64&quot; : 0x%02&quot;PRIx64
sii3112_write(int size, uint64_t addr, uint64_t val) &quot;bmdma: write (size %d) 0x%&quot;PRIx64&quot; : 0x%02&quot;PRIx64
sii3112_set_irq(int channel, int level) &quot;channel %d level %d&quot;

# via.c
bmdma_read_via(uint64_t addr, uint32_t val) &quot;bmdma: readb 0x%&quot;PRIx64&quot; : 0x%02x&quot;
bmdma_write_via(uint64_t addr, uint64_t val) &quot;bmdma: writeb 0x%&quot;PRIx64&quot; : 0x%02&quot;PRIx64

# atapi.c
cd_read_sector_sync(int lba) &quot;lba=%d&quot;
cd_read_sector_cb(int lba, int ret) &quot;lba=%d ret=%d&quot;
cd_read_sector(int lba) &quot;lba=%d&quot;
ide_atapi_cmd_error(void *s, int sense_key, int asc) &quot;IDEState: %p; sense=0x%x asc=0x%x&quot;
ide_atapi_cmd_reply_end(void *s, int tx_size, int elem_tx_size, int32_t index) &quot;IDEState %p; reply: tx_size=%d elem_tx_size=%d index=%&quot;PRId32
ide_atapi_cmd_reply_end_eot(void *s, int status) &quot;IDEState: %p; end of transfer, status=0x%x&quot;
ide_atapi_cmd_reply_end_bcl(void *s, int bcl) &quot;IDEState: %p; byte_count_limit=%d&quot;
ide_atapi_cmd_reply_end_new(void *s, int status) &quot;IDEState: %p; new transfer started, status=0x%x&quot;
ide_atapi_cmd_check_status(void *s) &quot;IDEState: %p&quot;
ide_atapi_cmd_read(void *s, const char *method, int lba, int nb_sectors) &quot;IDEState: %p; read %s: LBA=%d nb_sectors=%d&quot;
ide_atapi_cmd(void *s, uint8_t cmd) &quot;IDEState: %p; cmd: 0x%02x&quot;
ide_atapi_cmd_read_dma_cb_aio(void *s, int lba, int n) &quot;IDEState: %p; aio read: lba=%d n=%d&quot;
# Warning: Verbose
ide_atapi_cmd_packet(void *s, uint16_t limit, const char *packet) &quot;IDEState: %p; limit=0x%x packet: %s&quot;

# ahci.c
ahci_port_read(void *s, int port, const char *reg, int offset, uint32_t ret) &quot;ahci(%p)[%d]: port read [reg:%s] @ 0x%x: 0x%08x&quot;
ahci_port_read_default(void *s, int port, const char *reg, int offset) &quot;ahci(%p)[%d]: unimplemented port read [reg:%s] @ 0x%x&quot;
ahci_irq_raise(void *s) &quot;ahci(%p): raise irq&quot;
ahci_irq_lower(void *s) &quot;ahci(%p): lower irq&quot;
ahci_check_irq(void *s, uint32_t old, uint32_t new) &quot;ahci(%p): check irq 0x%08x --&gt; 0x%08x&quot;
ahci_trigger_irq(void *s, int port, const char *name, uint32_t val, uint32_t old, uint32_t new, uint32_t effective) &quot;ahci(%p)[%d]: trigger irq +%s (0x%08x); irqstat: 0x%08x --&gt; 0x%08x; effective: 0x%08x&quot;
ahci_port_write(void *s, int port, const char *reg, int offset, uint32_t val) &quot;ahci(%p)[%d]: port write [reg:%s] @ 0x%x: 0x%08x&quot;
ahci_port_write_unimpl(void *s, int port, const char *reg, int offset, uint32_t val) &quot;ahci(%p)[%d]: unimplemented port write [reg:%s] @ 0x%x: 0x%08x&quot;
ahci_mem_read_32(void *s, uint64_t addr, uint32_t val) &quot;ahci(%p): mem read @ 0x%&quot;PRIx64&quot;: 0x%08x&quot;
ahci_mem_read_32_default(void *s, uint64_t addr, uint32_t val) &quot;ahci(%p): mem read @ 0x%&quot;PRIx64&quot;: 0x%08x&quot;
ahci_mem_read_32_host(void *s, const char *reg, uint64_t addr, uint32_t val) &quot;ahci(%p): mem read [reg:%s] @ 0x%&quot;PRIx64&quot;: 0x%08x&quot;
ahci_mem_read_32_host_default(void *s, const char *reg, uint64_t addr) &quot;ahci(%p): unimplemented mem read [reg:%s] @ 0x%&quot;PRIx64
ahci_mem_read(void *s, unsigned size, uint64_t addr, uint64_t val) &quot;ahci(%p): read%u @ 0x%&quot;PRIx64&quot;: 0x%016&quot;PRIx64
ahci_mem_write(void *s, unsigned size, uint64_t addr, uint64_t val) &quot;ahci(%p): write%u @ 0x%&quot;PRIx64&quot;: 0x%016&quot;PRIx64
ahci_mem_write_host_unimpl(void *s, unsigned size, const char *reg, uint64_t addr) &quot;ahci(%p) unimplemented write%u [reg:%s] @ 0x%&quot;PRIx64
ahci_mem_write_host(void *s, unsigned size, const char *reg, uint64_t addr, uint64_t val) &quot;ahci(%p) write%u [reg:%s] @ 0x%&quot;PRIx64&quot;: 0x%016&quot;PRIx64
ahci_mem_write_unimpl(void *s, unsigned size, uint64_t addr, uint64_t val) &quot;ahci(%p): write%u to unknown register 0x%&quot;PRIx64&quot;: 0x%016&quot;PRIx64
ahci_set_signature(void *s, int port, uint8_t nsector, uint8_t sector, uint8_t lcyl, uint8_t hcyl, uint32_t sig) &quot;ahci(%p)[%d]: set signature sector:0x%02x nsector:0x%02x lcyl:0x%02x hcyl:0x%02x (cumulatively: 0x%08x)&quot;
ahci_reset_port(void *s, int port) &quot;ahci(%p)[%d]: reset port&quot;
ahci_unmap_fis_address_null(void *s, int port) &quot;ahci(%p)[%d]: Attempt to unmap NULL FIS address&quot;
ahci_unmap_clb_address_null(void *s, int port) &quot;ahci(%p)[%d]: Attempt to unmap NULL CLB address&quot;
ahci_populate_sglist(void *s, int port) &quot;ahci(%p)[%d]&quot;
ahci_populate_sglist_no_prdtl(void *s, int port, uint16_t opts) &quot;ahci(%p)[%d]: no sg list given by guest: 0x%04x&quot;
ahci_populate_sglist_no_map(void *s, int port) &quot;ahci(%p)[%d]: DMA mapping failed&quot;
ahci_populate_sglist_short_map(void *s, int port) &quot;ahci(%p)[%d]: mapped less than expected&quot;
ahci_populate_sglist_bad_offset(void *s, int port, int off_idx, int64_t off_pos) &quot;ahci(%p)[%d]: Incorrect offset! off_idx: %d, off_pos: %&quot;PRId64
ncq_finish(void *s, int port, uint8_t tag) &quot;ahci(%p)[%d][tag:%d]: NCQ transfer finished&quot;
execute_ncq_command_read(void *s, int port, uint8_t tag, int count, int64_t lba) &quot;ahci(%p)[%d][tag:%d]: NCQ reading %d sectors from LBA %&quot;PRId64
execute_ncq_command_write(void *s, int port, uint8_t tag, int count, int64_t lba) &quot;ahci(%p)[%d][tag:%d]: NCQ writing %d sectors to LBA %&quot;PRId64
execute_ncq_command_unsup(void *s, int port, uint8_t tag, uint8_t cmd) &quot;ahci(%p)[%d][tag:%d]: error: unsupported NCQ command (0x%02x) received&quot;
process_ncq_command_mismatch(void *s, int port, uint8_t tag, uint8_t slot) &quot;ahci(%p)[%d][tag:%d]: Warning: NCQ slot (%d) did not match the given tag&quot;
process_ncq_command_aux(void *s, int port, uint8_t tag) &quot;ahci(%p)[%d][tag:%d]: Warn: Attempt to use NCQ auxiliary fields&quot;
process_ncq_command_prioicc(void *s, int port, uint8_t tag) &quot;ahci(%p)[%d][tag:%d]: Warn: Unsupported attempt to use PRIO/ICC fields&quot;
process_ncq_command_fua(void *s, int port, uint8_t tag) &quot;ahci(%p)[%d][tag:%d]: Warn: Unsupported attempt to use Force Unit Access&quot;
process_ncq_command_rarc(void *s, int port, uint8_t tag) &quot;ahci(%p)[%d][tag:%d]: Warn: Unsupported attempt to use Rebuild Assist&quot;
process_ncq_command_large(void *s, int port, uint8_t tag, size_t prdtl, size_t size) &quot;ahci(%p)[%d][tag:%d]: Warn: PRDTL (0x%zx) does not match requested size (0x%zx)&quot;
process_ncq_command(void *s, int port, uint8_t tag, uint8_t cmd, uint64_t lba, uint64_t end) &quot;ahci(%p)[%d][tag:%d]: NCQ op 0x%02x on sectors [%&quot;PRId64&quot;,%&quot;PRId64&quot;]&quot;
handle_reg_h2d_fis_pmp(void *s, int port, char b0, char b1, char b2) &quot;ahci(%p)[%d]: Port Multiplier not supported, FIS: 0x%02x-%02x-%02x&quot;
handle_reg_h2d_fis_res(void *s, int port, char b0, char b1, char b2) &quot;ahci(%p)[%d]: Reserved flags set in H2D Register FIS, FIS: 0x%02x-%02x-%02x&quot;
handle_cmd_busy(void *s, int port) &quot;ahci(%p)[%d]: engine busy&quot;
handle_cmd_nolist(void *s, int port) &quot;ahci(%p)[%d]: handle_cmd called without s-&gt;dev[port].lst&quot;
handle_cmd_badport(void *s, int port) &quot;ahci(%p)[%d]: guest accessed unused port&quot;
handle_cmd_badfis(void *s, int port) &quot;ahci(%p)[%d]: guest provided an invalid cmd FIS&quot;
handle_cmd_badmap(void *s, int port, uint64_t len) &quot;ahci(%p)[%d]: dma_memory_map failed, 0x%02&quot;PRIx64&quot; != 0x80&quot;
handle_cmd_unhandled_fis(void *s, int port, uint8_t b0, uint8_t b1, uint8_t b2) &quot;ahci(%p)[%d]: unhandled FIS type. cmd_fis: 0x%02x-%02x-%02x&quot;
ahci_pio_transfer(void *s, int port, const char *rw, uint32_t size, const char *tgt, const char *sgl) &quot;ahci(%p)[%d]: %sing %d bytes on %s w/%s sglist&quot;
ahci_start_dma(void *s, int port) &quot;ahci(%p)[%d]: start dma&quot;
ahci_dma_prepare_buf(void *s, int port, int32_t io_buffer_size, int32_t limit) &quot;ahci(%p)[%d]: prepare buf limit=%&quot;PRId32&quot; prepared=%&quot;PRId32
ahci_dma_prepare_buf_fail(void *s, int port) &quot;ahci(%p)[%d]: sglist population failed&quot;
ahci_dma_rw_buf(void *s, int port, int l) &quot;ahci(%p)[%d] len=0x%x&quot;
ahci_cmd_done(void *s, int port) &quot;ahci(%p)[%d]: cmd done&quot;
ahci_reset(void *s) &quot;ahci(%p): HBA reset&quot;

# Warning: Verbose
handle_reg_h2d_fis_dump(void *s, int port, const char *fis) &quot;ahci(%p)[%d]: %s&quot;
handle_cmd_fis_dump(void *s, int port, const char *fis) &quot;ahci(%p)[%d]: %s&quot;

# ahci-allwinner.c
allwinner_ahci_mem_read(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) &quot;ahci(%p): read a=%p addr=0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64&quot;, size=%d&quot;
allwinner_ahci_mem_write(void *s, void *a, uint64_t addr, uint64_t val, unsigned size) &quot;ahci(%p): write a=%p addr=0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64&quot;, size=%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# adb-kbd.c
adb_device_kbd_no_key(void) &quot;Ignoring NO_KEY&quot;
adb_device_kbd_writereg(int reg, uint8_t val) &quot;reg %d val 0x%2.2x&quot;
adb_device_kbd_readreg(int reg, uint8_t val0, uint8_t val1) &quot;reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x&quot;
adb_device_kbd_request_change_addr(int devaddr) &quot;change addr to 0x%x&quot;
adb_device_kbd_request_change_addr_and_handler(int devaddr, int handler) &quot;change addr and handler to 0x%x, 0x%x&quot;

# adb-mouse.c
adb_device_mouse_flush(void) &quot;flush&quot;
adb_device_mouse_writereg(int reg, uint8_t val) &quot;reg %d val 0x%2.2x&quot;
adb_device_mouse_readreg(int reg, uint8_t val0, uint8_t val1) &quot;reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x&quot;
adb_device_mouse_request_change_addr(int devaddr) &quot;change addr to 0x%x&quot;
adb_device_mouse_request_change_addr_and_handler(int devaddr, int handler) &quot;change addr and handler to 0x%x, 0x%x&quot;

# adb.c
adb_bus_request(uint8_t addr, const char *cmd, int size) &quot;device 0x%x %s cmdsize=%d&quot;
adb_bus_request_done(uint8_t addr, const char *cmd, int size) &quot;device 0x%x %s replysize=%d&quot;
adb_bus_autopoll_block(bool blocked) &quot;blocked: %d&quot;
adb_bus_autopoll_cb(uint16_t mask) &quot;executing autopoll_cb with autopoll mask 0x%x&quot;
adb_bus_autopoll_cb_done(uint16_t mask) &quot;done executing autopoll_cb with autopoll mask 0x%x&quot;

# pckbd.c
pckbd_kbd_read_data(uint32_t val) &quot;0x%02x&quot;
pckbd_kbd_read_status(int status) &quot;0x%02x&quot;
pckbd_outport_write(uint32_t val) &quot;0x%02x&quot;
pckbd_kbd_write_command(uint64_t val) &quot;0x%02&quot;PRIx64
pckbd_kbd_write_data(uint64_t val) &quot;0x%02&quot;PRIx64

# ps2.c
ps2_put_keycode(void *opaque, int keycode) &quot;%p keycode 0x%02x&quot;
ps2_keyboard_event(void *opaque, int qcode, int down, unsigned int modifier, unsigned int modifiers, int set, int xlate) &quot;%p qcode %d down %d modifier 0x%x modifiers 0x%x set %d xlate %d&quot;
ps2_read_data(void *opaque) &quot;%p&quot;
ps2_set_ledstate(void *s, int ledstate) &quot;%p ledstate %d&quot;
ps2_reset_keyboard(void *s) &quot;%p&quot;
ps2_write_keyboard(void *opaque, int val) &quot;%p val %d&quot;
ps2_keyboard_set_translation(void *opaque, int mode) &quot;%p mode %d&quot;
ps2_mouse_send_packet(void *s, int dx1, int dy1, int dz1, int b) &quot;%p x %d y %d z %d bs 0x%x&quot;
ps2_mouse_fake_event(void *opaque) &quot;%p&quot;
ps2_write_mouse(void *opaque, int val) &quot;%p val %d&quot;
ps2_kbd_reset(void *opaque) &quot;%p&quot;
ps2_mouse_reset(void *opaque) &quot;%p&quot;

# hid.c
hid_kbd_queue_full(void) &quot;queue full&quot;
hid_kbd_queue_empty(void) &quot;queue empty&quot;

# tsc2005.c
tsc2005_sense(const char *state) &quot;touchscreen sense %s&quot;

# virtio-input.c
virtio_input_queue_full(void) &quot;queue full&quot;

# lasips2.c
lasips2_reg_read(unsigned int size, int id, uint64_t addr, const char *name, uint64_t val) &quot;%u %d addr 0x%&quot;PRIx64 &quot;%s -&gt; 0x%&quot;PRIx64
lasips2_reg_write(unsigned int size, int id, uint64_t addr, const char *name, uint64_t val) &quot;%u %d addr 0x%&quot;PRIx64 &quot;%s &lt;- 0x%&quot;PRIx64
lasips2_intr(unsigned int val) &quot;%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# i8259.c
pic_update_irq(bool master, uint8_t imr, uint8_t irr, uint8_t padd) &quot;master %d imr %&quot;PRIu8&quot; irr %&quot;PRIu8&quot; padd %&quot;PRIu8
pic_set_irq(bool master, int irq, int level) &quot;master %d irq %d level %d&quot;
pic_interrupt(int irq, int intno) &quot;irq %d intno %d&quot;
pic_ioport_write(bool master, uint64_t addr, uint64_t val) &quot;master %d addr 0x%&quot;PRIx64&quot; val 0x%&quot;PRIx64
pic_ioport_read(bool master, uint64_t addr, int val) &quot;master %d addr 0x%&quot;PRIx64&quot; val 0x%x&quot;

# apic_common.c
cpu_set_apic_base(uint64_t val) &quot;0x%016&quot;PRIx64
cpu_get_apic_base(uint64_t val) &quot;0x%016&quot;PRIx64

# apic.c
apic_local_deliver(int vector, uint32_t lvt) &quot;vector %d delivery mode %d&quot;
apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) &quot;dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d&quot;
apic_mem_readl(uint64_t addr, uint32_t val)  &quot;0x%&quot;PRIx64&quot; = 0x%08x&quot;
apic_mem_writel(uint64_t addr, uint32_t val) &quot;0x%&quot;PRIx64&quot; = 0x%08x&quot;

# ioapic.c
ioapic_set_remote_irr(int n) &quot;set remote irr for pin %d&quot;
ioapic_clear_remote_irr(int n, int vector) &quot;clear remote irr for pin %d vector %d&quot;
ioapic_eoi_broadcast(int vector) &quot;EOI broadcast for vector %d&quot;
ioapic_eoi_delayed_reassert(int vector) &quot;delayed reassert on EOI broadcast for vector %d&quot;
ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) &quot;ioapic mem read addr 0x%&quot;PRIx8&quot; regsel: 0x%&quot;PRIx8&quot; size 0x%&quot;PRIx8&quot; retval 0x%&quot;PRIx32
ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) &quot;ioapic mem write addr 0x%&quot;PRIx8&quot; regsel: 0x%&quot;PRIx8&quot; size 0x%&quot;PRIx8&quot; val 0x%&quot;PRIx32
ioapic_set_irq(int vector, int level) &quot;vector: %d level: %d&quot;

# kvm_irqcount.c
kvm_report_irq_delivered(int irq_delivered) &quot;coalescing %d&quot;
kvm_reset_irq_delivered(int irq_delivered) &quot;old coalescing %d&quot;
kvm_get_irq_delivered(int irq_delivered) &quot;returning coalescing %d&quot;

# slavio_intctl.c
slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) &quot;read cpu %d reg 0x%&quot;PRIx64&quot; = 0x%x&quot;
slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) &quot;write cpu %d reg 0x%&quot;PRIx64&quot; = 0x%x&quot;
slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) &quot;Cleared cpu %d irq mask 0x%x, curmask 0x%x&quot;
slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) &quot;Set cpu %d irq mask 0x%x, curmask 0x%x&quot;
slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) &quot;read system reg 0x%&quot;PRIx64&quot; = 0x%x&quot;
slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) &quot;write system reg 0x%&quot;PRIx64&quot; = 0x%x&quot;
slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) &quot;Enabled master irq mask 0x%x, curmask 0x%x&quot;
slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) &quot;Disabled master irq mask 0x%x, curmask 0x%x&quot;
slavio_intctlm_mem_writel_target(uint32_t cpu) &quot;Set master irq cpu %d&quot;
slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) &quot;pending 0x%x disabled 0x%x&quot;
slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) &quot;Set cpu %d irq %d -&gt; pil %d level %d&quot;
slavio_set_timer_irq_cpu(int cpu, int level) &quot;Set cpu %d local timer level %d&quot;

# grlib_irqmp.c
grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) &quot;pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x&quot;
grlib_irqmp_ack(int intno) &quot;interrupt:%d&quot;
grlib_irqmp_set_irq(int irq) &quot;Raise CPU IRQ %d&quot;
grlib_irqmp_readl_unknown(uint64_t addr) &quot;addr 0x%&quot;PRIx64
grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%x&quot;

# xics.c
xics_icp_check_ipi(int server, uint8_t mfrr) &quot;CPU %d can take IPI mfrr=0x%x&quot;
xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) &quot;icp_accept: XIRR 0x%&quot;PRIx32&quot;-&gt;0x%&quot;PRIx32
xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) &quot;icp_eoi: server %d given XIRR 0x%&quot;PRIx32&quot; new XIRR 0x%&quot;PRIx32
xics_icp_irq(int server, int nr, uint8_t priority) &quot;cpu %d trying to deliver irq 0x%&quot;PRIx32&quot; priority 0x%x&quot;
xics_icp_raise(uint32_t xirr, uint8_t pending_priority) &quot;raising IRQ new XIRR=0x%x new pending priority=0x%x&quot;
xics_ics_set_irq_msi(int srcno, int nr) &quot;set_irq_msi: srcno %d [irq 0x%x]&quot;
xics_masked_pending(void) &quot;set_irq_msi: masked pending&quot;
xics_ics_set_irq_lsi(int srcno, int nr) &quot;set_irq_lsi: srcno %d [irq 0x%x]&quot;
xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) &quot;ics_write_xive: irq 0x%x [src %d] server 0x%x prio 0x%x&quot;
xics_ics_reject(int nr, int srcno) &quot;reject irq 0x%x [src %d]&quot;
xics_ics_eoi(int nr) &quot;ics_eoi: irq 0x%x&quot;

# s390_flic_kvm.c
flic_create_device(int err) &quot;flic: create device failed %d&quot;
flic_reset_failed(int err) &quot;flic: reset failed %d&quot;

# s390_flic.c
qemu_s390_airq_suppressed(uint8_t type, uint8_t isc) &quot;flic: adapter I/O interrupt suppressed (type 0x%x isc 0x%x)&quot;
qemu_s390_suppress_airq(uint8_t isc, const char *from, const char *to) &quot;flic: for isc 0x%x, suppress airq by modifying ais mode from %s to %s&quot;

# aspeed_vic.c
aspeed_vic_set_irq(int irq, int level) &quot;Enabling IRQ %d: %d&quot;
aspeed_vic_update_fiq(int flags) &quot;Raising FIQ: %d&quot;
aspeed_vic_update_irq(int flags) &quot;Raising IRQ: %d&quot;
aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) &quot;From 0x%&quot; PRIx64 &quot; of size %u: 0x%&quot; PRIx32
aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) &quot;To 0x%&quot; PRIx64 &quot; of size %u: 0x%&quot; PRIx32

# arm_gic.c
gic_enable_irq(int irq) &quot;irq %d enabled&quot;
gic_disable_irq(int irq) &quot;irq %d disabled&quot;
gic_set_irq(int irq, int level, int cpumask, int target) &quot;irq %d level %d cpumask 0x%x target 0x%x&quot;
gic_update_bestirq(const char *s, int cpu, int irq, int prio, int priority_mask, int running_priority) &quot;%s %d irq %d priority %d cpu priority mask %d cpu running priority %d&quot;
gic_update_set_irq(int cpu, const char *name, int level) &quot;cpu[%d]: %s = %d&quot;
gic_acknowledge_irq(const char *s, int cpu, int irq) &quot;%s %d acknowledged irq %d&quot;
gic_cpu_write(const char *s, int cpu, int addr, uint32_t val) &quot;%s %d iface write at 0x%08x 0x%08&quot; PRIx32
gic_cpu_read(const char *s, int cpu, int addr, uint32_t val) &quot;%s %d iface read at 0x%08x: 0x%08&quot; PRIx32
gic_hyp_read(int addr, uint32_t val) &quot;hyp read at 0x%08x: 0x%08&quot; PRIx32
gic_hyp_write(int addr, uint32_t val) &quot;hyp write at 0x%08x: 0x%08&quot; PRIx32
gic_dist_read(int addr, unsigned int size, uint32_t val) &quot;dist read at 0x%08x size %u: 0x%08&quot; PRIx32
gic_dist_write(int addr, unsigned int size, uint32_t val) &quot;dist write at 0x%08x size %u: 0x%08&quot; PRIx32
gic_lr_entry(int cpu, int entry, uint32_t val) &quot;cpu %d: new lr entry %d: 0x%08&quot; PRIx32
gic_update_maintenance_irq(int cpu, int val) &quot;cpu %d: maintenance = %d&quot;

# arm_gicv3_cpuif.c
gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_PMR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_PMR write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_bpr_read(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_BPR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_bpr_write(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_BPR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_AP%dR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_AP%dR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_igrpen_read(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_IGRPEN%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_igrpen_write(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_IGRPEN%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_igrpen1_el3_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_IGRPEN1_EL3 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_igrpen1_el3_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_IGRPEN1_EL3 write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_ctlr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_CTLR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_ctlr_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_CTLR write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_ctlr_el3_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_CTLR_EL3 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_ctlr_el3_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_CTLR_EL3 write cpu 0x%x value 0x%&quot; PRIx64
gicv3_cpuif_update(uint32_t cpuid, int irq, int grp, int prio) &quot;GICv3 CPU i/f 0x%x HPPI update: irq %d group %d prio %d&quot;
gicv3_cpuif_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) &quot;GICv3 CPU i/f 0x%x HPPI update: setting FIQ %d IRQ %d&quot;
gicv3_icc_generate_sgi(uint32_t cpuid, int irq, int irm, uint32_t aff, uint32_t targetlist) &quot;GICv3 CPU i/f 0x%x generating SGI %d IRM %d target affinity 0x%xxx targetlist 0x%x&quot;
gicv3_icc_iar0_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_IAR0 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_iar1_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_IAR1 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_eoir_write(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICC_EOIR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_hppir0_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_HPPIR0 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_hppir1_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_HPPIR1 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_dir_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_DIR write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icc_rpr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICC_RPR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICH_AP%dR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICH_AP%dR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_hcr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_HCR_EL2 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_hcr_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_HCR_EL2 write cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_vmcr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_VMCR_EL2 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_vmcr_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_VMCR_EL2 write cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_lr_read(int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICH_LR%d_EL2 read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_lr32_read(int regno, uint32_t cpu, uint32_t val) &quot;GICv3 ICH_LR%d read cpu 0x%x value 0x%&quot; PRIx32
gicv3_ich_lrc_read(int regno, uint32_t cpu, uint32_t val) &quot;GICv3 ICH_LRC%d read cpu 0x%x value 0x%&quot; PRIx32
gicv3_ich_lr_write(int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICH_LR%d_EL2 write cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_lr32_write(int regno, uint32_t cpu, uint32_t val) &quot;GICv3 ICH_LR%d write cpu 0x%x value 0x%&quot; PRIx32
gicv3_ich_lrc_write(int regno, uint32_t cpu, uint32_t val) &quot;GICv3 ICH_LRC%d write cpu 0x%x value 0x%&quot; PRIx32
gicv3_ich_vtr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_VTR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_misr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_MISR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_eisr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_EISR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_ich_elrsr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICH_ELRSR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_ap_read(int grp, int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_AP%dR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_ap_write(int grp, int regno, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_AP%dR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_bpr_read(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_BPR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_bpr_write(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_BPR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_pmr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICV_PMR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_pmr_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICV_PMR write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_igrpen_read(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_IGRPEN%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_igrpen_write(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_IGRPEN%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_ctlr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICV_CTLR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_ctlr_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICV_CTLR write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_rpr_read(uint32_t cpu, uint64_t val) &quot;GICv3 ICV_RPR read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_hppir_read(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_HPPIR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_dir_write(uint32_t cpu, uint64_t val) &quot;GICv3 ICV_DIR write cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_iar_read(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_IAR%d read cpu 0x%x value 0x%&quot; PRIx64
gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) &quot;GICv3 ICV_EOIR%d write cpu 0x%x value 0x%&quot; PRIx64
gicv3_cpuif_virt_update(uint32_t cpuid, int idx, int hppvlpi, int grp, int prio) &quot;GICv3 CPU i/f 0x%x virt HPPI update LR index %d HPPVLPI %d grp %d prio %d&quot;
gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel) &quot;GICv3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d&quot;
gicv3_cpuif_virt_set_maint_irq(uint32_t cpuid, int maintlevel) &quot;GICv3 CPU i/f 0x%x virt HPPI update: setting maintenance-irq %d&quot;

# arm_gicv3_dist.c
gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure) &quot;GICv3 distributor read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d&quot;
gicv3_dist_badread(uint64_t offset, unsigned size, bool secure) &quot;GICv3 distributor read: offset 0x%&quot; PRIx64 &quot; size %u secure %d: error&quot;
gicv3_dist_write(uint64_t offset, uint64_t data, unsigned size, bool secure) &quot;GICv3 distributor write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d&quot;
gicv3_dist_badwrite(uint64_t offset, uint64_t data, unsigned size, bool secure) &quot;GICv3 distributor write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d: error&quot;
gicv3_dist_set_irq(int irq, int level) &quot;GICv3 distributor interrupt %d level changed to %d&quot;

# arm_gicv3_redist.c
gicv3_redist_read(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) &quot;GICv3 redistributor 0x%x read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d&quot;
gicv3_redist_badread(uint32_t cpu, uint64_t offset, unsigned size, bool secure) &quot;GICv3 redistributor 0x%x read: offset 0x%&quot; PRIx64 &quot; size %u secure %d: error&quot;
gicv3_redist_write(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) &quot;GICv3 redistributor 0x%x write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d&quot;
gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) &quot;GICv3 redistributor 0x%x write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d: error&quot;
gicv3_redist_set_irq(uint32_t cpu, int irq, int level) &quot;GICv3 redistributor 0x%x interrupt %d level changed to %d&quot;
gicv3_redist_send_sgi(uint32_t cpu, int irq) &quot;GICv3 redistributor 0x%x pending SGI %d&quot;

# arm_gicv3_its.c
gicv3_its_read(uint64_t offset, uint64_t data, unsigned size) &quot;GICv3 ITS read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
gicv3_its_badread(uint64_t offset, unsigned size) &quot;GICv3 ITS read: offset 0x%&quot; PRIx64 &quot; size %u: error&quot;
gicv3_its_write(uint64_t offset, uint64_t data, unsigned size) &quot;GICv3 ITS write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
gicv3_its_badwrite(uint64_t offset, uint64_t data, unsigned size) &quot;GICv3 ITS write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u: error&quot;
gicv3_its_translation_write(uint64_t offset, uint64_t data, unsigned size, uint32_t requester_id) &quot;GICv3 ITS TRANSLATER write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u requester_id 0x%x&quot;
gicv3_its_process_command(uint32_t rd_offset, uint8_t cmd) &quot;GICv3 ITS: processing command at offset 0x%x: 0x%x&quot;
gicv3_its_cmd_int(uint32_t devid, uint32_t eventid) &quot;GICv3 ITS: command INT DeviceID 0x%x EventID 0x%x&quot;
gicv3_its_cmd_clear(uint32_t devid, uint32_t eventid) &quot;GICv3 ITS: command CLEAR DeviceID 0x%x EventID 0x%x&quot;
gicv3_its_cmd_discard(uint32_t devid, uint32_t eventid) &quot;GICv3 ITS: command DISCARD DeviceID 0x%x EventID 0x%x&quot;
gicv3_its_cmd_sync(void) &quot;GICv3 ITS: command SYNC&quot;
gicv3_its_cmd_mapd(uint32_t devid, uint32_t size, uint64_t ittaddr, int valid) &quot;GICv3 ITS: command MAPD DeviceID 0x%x Size 0x%x ITT_addr 0x%&quot; PRIx64 &quot; V %d&quot;
gicv3_its_cmd_mapc(uint32_t icid, uint64_t rdbase, int valid) &quot;GICv3 ITS: command MAPC ICID 0x%x RDbase 0x%&quot; PRIx64 &quot; V %d&quot;
gicv3_its_cmd_mapi(uint32_t devid, uint32_t eventid, uint32_t icid) &quot;GICv3 ITS: command MAPI DeviceID 0x%x EventID 0x%x ICID 0x%x&quot;
gicv3_its_cmd_mapti(uint32_t devid, uint32_t eventid, uint32_t icid, uint32_t intid) &quot;GICv3 ITS: command MAPTI DeviceID 0x%x EventID 0x%x ICID 0x%x pINTID 0x%x&quot;
gicv3_its_cmd_inv(uint32_t devid, uint32_t eventid) &quot;GICv3 ITS: command INV DeviceID 0x%x EventID 0x%x&quot;
gicv3_its_cmd_invall(void) &quot;GICv3 ITS: command INVALL&quot;
gicv3_its_cmd_movall(uint64_t rd1, uint64_t rd2) &quot;GICv3 ITS: command MOVALL RDbase1 0x%&quot; PRIx64 &quot; RDbase2 0x%&quot; PRIx64
gicv3_its_cmd_movi(uint32_t devid, uint32_t eventid, uint32_t icid) &quot;GICv3 ITS: command MOVI DeviceID 0x%x EventID 0x%x ICID 0x%x&quot;
gicv3_its_cmd_vmapi(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint32_t doorbell) &quot;GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0x%x Dbell_pINTID 0x%x&quot;
gicv3_its_cmd_vmapti(uint32_t devid, uint32_t eventid, uint32_t vpeid, uint32_t vintid, uint32_t doorbell) &quot;GICv3 ITS: command VMAPI DeviceID 0x%x EventID 0x%x vPEID 0x%x vINTID 0x%x Dbell_pINTID 0x%x&quot;
gicv3_its_cmd_vmapp(uint32_t vpeid, uint64_t rdbase, int valid, uint64_t vptaddr, uint32_t vptsize) &quot;GICv3 ITS: command VMAPP vPEID 0x%x RDbase 0x%&quot; PRIx64 &quot; V %d VPT_addr 0x%&quot; PRIx64 &quot; VPT_size 0x%x&quot;
gicv3_its_cmd_vmovp(uint32_t vpeid, uint64_t rdbase) &quot;GICv3 ITS: command VMOVP vPEID 0x%x RDbase 0x%&quot; PRIx64
gicv3_its_cmd_vsync(void) &quot;GICv3 ITS: command VSYNC&quot;
gicv3_its_cmd_vmovi(uint32_t devid,  uint32_t eventid, uint32_t vpeid, int dbvalid, uint32_t doorbell) &quot;GICv3 ITS: command VMOVI DeviceID 0x%x EventID 0x%x vPEID 0x%x D %d Dbell_pINTID 0x%x&quot;
gicv3_its_cmd_vinvall(uint32_t vpeid) &quot;GICv3 ITS: command VINVALL vPEID 0x%x&quot;
gicv3_its_cmd_unknown(unsigned cmd) &quot;GICv3 ITS: unknown command 0x%x&quot;
gicv3_its_cte_read(uint32_t icid, int valid, uint32_t rdbase) &quot;GICv3 ITS: Collection Table read for ICID 0x%x: valid %d RDBase 0x%x&quot;
gicv3_its_cte_write(uint32_t icid, int valid, uint32_t rdbase) &quot;GICv3 ITS: Collection Table write for ICID 0x%x: valid %d RDBase 0x%x&quot;
gicv3_its_cte_read_fault(uint32_t icid) &quot;GICv3 ITS: Collection Table read for ICID 0x%x: faulted&quot;
gicv3_its_ite_read(uint64_t ittaddr, uint32_t eventid, int valid, int inttype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) &quot;GICv3 ITS: Interrupt Table read for ITTaddr 0x%&quot; PRIx64 &quot; EventID 0x%x: valid %d inttype %d intid 0x%x ICID 0x%x vPEID 0x%x doorbell 0x%x&quot;
gicv3_its_ite_read_fault(uint64_t ittaddr, uint32_t eventid) &quot;GICv3 ITS: Interrupt Table read for ITTaddr 0x%&quot; PRIx64 &quot; EventID 0x%x: faulted&quot;
gicv3_its_ite_write(uint64_t ittaddr, uint32_t eventid, int valid, int inttype, uint32_t intid, uint32_t icid, uint32_t vpeid, uint32_t doorbell) &quot;GICv3 ITS: Interrupt Table write for ITTaddr 0x%&quot; PRIx64 &quot; EventID 0x%x: valid %d inttype %d intid 0x%x ICID 0x%x vPEID 0x%x doorbell 0x%x&quot;
gicv3_its_dte_read(uint32_t devid, int valid, uint32_t size, uint64_t ittaddr) &quot;GICv3 ITS: Device Table read for DeviceID 0x%x: valid %d size 0x%x ITTaddr 0x%&quot; PRIx64
gicv3_its_dte_write(uint32_t devid, int valid, uint32_t size, uint64_t ittaddr) &quot;GICv3 ITS: Device Table write for DeviceID 0x%x: valid %d size 0x%x ITTaddr 0x%&quot; PRIx64
gicv3_its_dte_read_fault(uint32_t devid) &quot;GICv3 ITS: Device Table read for DeviceID 0x%x: faulted&quot;
gicv3_its_vte_read(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t vptaddr, uint32_t rdbase) &quot;GICv3 ITS: vPE Table read for vPEID 0x%x: valid %d VPTsize 0x%x VPTaddr 0x%&quot; PRIx64 &quot; RDbase 0x%x&quot;
gicv3_its_vte_read_fault(uint32_t vpeid) &quot;GICv3 ITS: vPE Table read for vPEID 0x%x: faulted&quot;
gicv3_its_vte_write(uint32_t vpeid, int valid, uint32_t vptsize, uint64_t vptaddr, uint32_t rdbase) &quot;GICv3 ITS: vPE Table write for vPEID 0x%x: valid %d VPTsize 0x%x VPTaddr 0x%&quot; PRIx64 &quot; RDbase 0x%x&quot;

# armv7m_nvic.c
nvic_recompute_state(int vectpending, int vectpending_prio, int exception_prio) &quot;NVIC state recomputed: vectpending %d vectpending_prio %d exception_prio %d&quot;
nvic_recompute_state_secure(int vectpending, bool vectpending_is_s_banked, int vectpending_prio, int exception_prio) &quot;NVIC state recomputed: vectpending %d is_s_banked %d vectpending_prio %d exception_prio %d&quot;
nvic_set_prio(int irq, bool secure, uint8_t prio) &quot;NVIC set irq %d secure-bank %d priority %d&quot;
nvic_irq_update(int vectpending, int pendprio, int exception_prio, int level) &quot;NVIC vectpending %d pending prio %d exception_prio %d: setting irq line to %d&quot;
nvic_escalate_prio(int irq, int irqprio, int runprio) &quot;NVIC escalating irq %d to HardFault: insufficient priority %d &gt;= %d&quot;
nvic_escalate_disabled(int irq) &quot;NVIC escalating irq %d to HardFault: disabled&quot;
nvic_set_pending(int irq, bool secure, bool targets_secure, bool derived, int en, int prio) &quot;NVIC set pending irq %d secure-bank %d targets_secure %d derived %d (enabled: %d priority %d)&quot;
nvic_clear_pending(int irq, bool secure, int en, int prio) &quot;NVIC clear pending irq %d secure-bank %d (enabled: %d priority %d)&quot;
nvic_acknowledge_irq(int irq, int prio) &quot;NVIC acknowledge IRQ: %d now active (prio %d)&quot;
nvic_get_pending_irq_info(int irq, bool secure) &quot;NVIC next IRQ %d: targets_secure: %d&quot;
nvic_complete_irq(int irq, bool secure) &quot;NVIC complete IRQ %d (secure %d)&quot;
nvic_set_irq_level(int irq, int level) &quot;NVIC external irq %d level set to %d&quot;
nvic_set_nmi_level(int level) &quot;NVIC external NMI level set to %d&quot;
nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) &quot;NVIC sysreg read addr 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; size %u&quot;
nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) &quot;NVIC sysreg write addr 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; size %u&quot;

# heathrow_pic.c
heathrow_write(uint64_t addr, unsigned int n, uint64_t value) &quot;0x%&quot;PRIx64&quot; %u: 0x%&quot;PRIx64
heathrow_read(uint64_t addr, unsigned int n, uint64_t value) &quot;0x%&quot;PRIx64&quot; %u: 0x%&quot;PRIx64
heathrow_set_irq(int num, int level) &quot;set_irq: num=0x%02x level=%d&quot;

# bcm2835_ic.c
bcm2835_ic_set_gpu_irq(int irq, int level) &quot;GPU irq #%d level %d&quot;
bcm2835_ic_set_cpu_irq(int irq, int level) &quot;CPU irq #%d level %d&quot;

# spapr_xive.c
spapr_xive_claim_irq(uint32_t lisn, bool lsi) &quot;lisn=0x%x lsi=%d&quot;
spapr_xive_free_irq(uint32_t lisn) &quot;lisn=0x%x&quot;
spapr_xive_set_irq(uint32_t lisn, uint32_t val) &quot;lisn=0x%x val=%d&quot;
spapr_xive_get_source_info(uint64_t flags, uint64_t lisn) &quot;flags=0x%&quot;PRIx64&quot; lisn=0x%&quot;PRIx64
spapr_xive_set_source_config(uint64_t flags, uint64_t lisn, uint64_t target, uint64_t priority, uint64_t eisn) &quot;flags=0x%&quot;PRIx64&quot; lisn=0x%&quot;PRIx64&quot; target=0x%&quot;PRIx64&quot; priority=0x%&quot;PRIx64&quot; eisn=0x%&quot;PRIx64
spapr_xive_get_source_config(uint64_t flags, uint64_t lisn) &quot;flags=0x%&quot;PRIx64&quot; lisn=0x%&quot;PRIx64
spapr_xive_get_queue_info(uint64_t flags, uint64_t target, uint64_t priority) &quot;flags=0x%&quot;PRIx64&quot; target=0x%&quot;PRIx64&quot; priority=0x%&quot;PRIx64
spapr_xive_set_queue_config(uint64_t flags, uint64_t target, uint64_t priority, uint64_t qpage, uint64_t qsize) &quot;flags=0x%&quot;PRIx64&quot; target=0x%&quot;PRIx64&quot; priority=0x%&quot;PRIx64&quot; qpage=0x%&quot;PRIx64&quot; qsize=0x%&quot;PRIx64
spapr_xive_get_queue_config(uint64_t flags, uint64_t target, uint64_t priority) &quot;flags=0x%&quot;PRIx64&quot; target=0x%&quot;PRIx64&quot; priority=0x%&quot;PRIx64
spapr_xive_set_os_reporting_line(uint64_t flags) &quot;flags=0x%&quot;PRIx64
spapr_xive_get_os_reporting_line(uint64_t flags) &quot;flags=0x%&quot;PRIx64
spapr_xive_esb(uint64_t flags, uint64_t lisn, uint64_t offset, uint64_t data) &quot;flags=0x%&quot;PRIx64&quot; lisn=0x%&quot;PRIx64&quot; offset=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64
spapr_xive_sync(uint64_t flags, uint64_t lisn) &quot;flags=0x%&quot;PRIx64&quot; lisn=0x%&quot;PRIx64
spapr_xive_reset(uint64_t flags) &quot;flags=0x%&quot;PRIx64

# spapr_xive_kvm.c
kvm_xive_cpu_connect(uint32_t id) &quot;connect CPU%d to KVM device&quot;
kvm_xive_source_reset(uint32_t srcno) &quot;IRQ 0x%x&quot;

# xive.c
xive_tctx_accept(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) &quot;target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x CPPR=0x%02x NSR=0x%02x ACK&quot;
xive_tctx_notify(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) &quot;target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x CPPR=0x%02x NSR=0x%02x raise !&quot;
xive_tctx_set_cppr(uint32_t index, uint8_t ring, uint8_t ipb, uint8_t pipr, uint8_t cppr, uint8_t nsr) &quot;target=%d ring=0x%x IBP=0x%02x PIPR=0x%02x new CPPR=0x%02x NSR=0x%02x&quot;
xive_source_esb_read(uint64_t addr, uint32_t srcno, uint64_t value) &quot;@0x%&quot;PRIx64&quot; IRQ 0x%x val=0x%&quot;PRIx64
xive_source_esb_write(uint64_t addr, uint32_t srcno, uint64_t value) &quot;@0x%&quot;PRIx64&quot; IRQ 0x%x val=0x%&quot;PRIx64
xive_router_end_notify(uint8_t end_blk, uint32_t end_idx, uint32_t end_data) &quot;END 0x%02x/0x%04x -&gt; enqueue 0x%08x&quot;
xive_router_end_escalate(uint8_t end_blk, uint32_t end_idx, uint8_t esc_blk, uint32_t esc_idx, uint32_t end_data) &quot;END 0x%02x/0x%04x -&gt; escalate END 0x%02x/0x%04x data 0x%08x&quot;
xive_tctx_tm_write(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) &quot;target=%d @0x%&quot;PRIx64&quot; sz=%d val=0x%&quot; PRIx64
xive_tctx_tm_read(uint32_t index, uint64_t offset, unsigned int size, uint64_t value) &quot;target=%d @0x%&quot;PRIx64&quot; sz=%d val=0x%&quot; PRIx64
xive_presenter_notify(uint8_t nvt_blk, uint32_t nvt_idx, uint8_t ring) &quot;found NVT 0x%x/0x%x ring=0x%x&quot;
xive_end_source_read(uint8_t end_blk, uint32_t end_idx, uint64_t addr) &quot;END 0x%x/0x%x @0x%&quot;PRIx64

# pnv_xive.c
pnv_xive_ic_hw_trigger(uint64_t addr, uint64_t val) &quot;@0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64

# goldfish_pic.c
goldfish_irq_request(void *dev, int idx, int irq, int level) &quot;pic: %p goldfish-irq.%d irq: %d level: %d&quot;
goldfish_pic_read(void *dev, int idx, unsigned int addr, unsigned int size, uint64_t value) &quot;pic: %p goldfish-irq.%d reg: 0x%02x size: %d value: 0x%&quot;PRIx64
goldfish_pic_write(void *dev, int idx, unsigned int addr, unsigned int size, uint64_t value) &quot;pic: %p goldfish-irq.%d reg: 0x%02x size: %d value: 0x%&quot;PRIx64
goldfish_pic_reset(void *dev, int idx) &quot;pic: %p goldfish-irq.%d&quot;
goldfish_pic_realize(void *dev, int idx) &quot;pic: %p goldfish-irq.%d&quot;
goldfish_pic_instance_init(void *dev) &quot;pic: %p goldfish-irq&quot;

# sh_intc.c
sh_intc_sources(int p, int a, int c, int m, unsigned short v, const char *s1, const char *s2, const char *s3) &quot;(%d/%d/%d/%d) interrupt source 0x%x %s%s%s&quot;
sh_intc_pending(int p, unsigned short v) &quot;(%d) returning interrupt source 0x%x&quot;
sh_intc_register(const char *s, int id, unsigned short v, int c, int m) &quot;%s %u -&gt; 0x%04x (%d/%d)&quot;
sh_intc_read(unsigned size, uint64_t offset, unsigned long val) &quot;size %u 0x%&quot; PRIx64 &quot; -&gt; 0x%lx&quot;
sh_intc_write(unsigned size, uint64_t offset, unsigned long val) &quot;size %u 0x%&quot; PRIx64 &quot; &lt;- 0x%lx&quot;
sh_intc_set(int id, int enable) &quot;setting interrupt group %d to %d&quot;

# loongarch_ipi.c
loongarch_ipi_read(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot;PRIx64
loongarch_ipi_write(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot;PRIx64
loongarch_ipi_unsupported_cpuid(const char *s, uint32_t cpuid) &quot;%s unsupported cpuid 0x%&quot; PRIx32

# loongarch_pch_pic.c
loongarch_pch_pic_irq_handler(int irq, int level) &quot;irq %d level %d&quot;
loongarch_pch_pic_low_readw(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
loongarch_pch_pic_low_writew(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
loongarch_pch_pic_high_readw(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
loongarch_pch_pic_high_writew(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
loongarch_pch_pic_readb(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
loongarch_pch_pic_writeb(unsigned size, uint64_t addr, uint64_t val) &quot;size: %u addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64

# loongarch_pch_msi.c
loongarch_msi_set_irq(int irq_num) &quot;set msi irq %d&quot;

# loongarch_extioi.c
loongarch_extioi_setirq(int irq, int level) &quot;set extirq irq %d level %d&quot;
loongarch_extioi_readw(uint64_t addr, uint64_t val) &quot;addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
loongarch_extioi_writew(uint64_t addr, uint64_t val) &quot;addr: 0x%&quot;PRIx64 &quot;val: 0x%&quot; PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# isa-superio.c
superio_create_parallel(int id, uint16_t base, unsigned int irq) &quot;id=%d, base 0x%03x, irq %u&quot;
superio_create_serial(int id, uint16_t base, unsigned int irq) &quot;id=%d, base 0x%03x, irq %u&quot;
superio_create_floppy(int id, uint16_t base, unsigned int irq) &quot;id=%d, base 0x%03x, irq %u&quot;
superio_create_ide(int id, uint16_t base, unsigned int irq) &quot;id=%d, base 0x%03x, irq %u&quot;

# pc87312.c
pc87312_io_read(uint32_t addr, uint32_t val) &quot;read addr=0x%x val=0x%x&quot;
pc87312_io_write(uint32_t addr, uint32_t val) &quot;write addr=0x%x val=0x%x&quot;

# apm.c
apm_io_read(uint8_t addr, uint8_t val) &quot;read addr=0x%x val=0x%02x&quot;
apm_io_write(uint8_t addr, uint8_t val) &quot;write addr=0x%x val=0x%02x&quot;

# vt82c686.c
via_isa_write(uint32_t addr, uint32_t val, int len) &quot;addr 0x%x val 0x%x len 0x%x&quot;
via_pm_read(uint32_t addr, uint32_t val, int len) &quot;addr 0x%x val 0x%x len 0x%x&quot;
via_pm_write(uint32_t addr, uint32_t val, int len) &quot;addr 0x%x val 0x%x len 0x%x&quot;
via_pm_io_read(uint32_t addr, uint32_t val, int len) &quot;addr 0x%x val 0x%x len 0x%x&quot;
via_pm_io_write(uint32_t addr, uint32_t val, int len) &quot;addr 0x%x val 0x%x len 0x%x&quot;
via_superio_read(uint8_t addr, uint8_t val) &quot;addr 0x%x val 0x%x&quot;
via_superio_write(uint8_t addr, uint32_t val) &quot;addr 0x%x val 0x%x&quot;

# lpc_ich9.c
ich9_cc_write(uint64_t addr, uint64_t val, unsigned len) &quot;addr=0x%&quot;PRIx64 &quot; val=0x%&quot;PRIx64 &quot; len=%u&quot;
ich9_cc_read(uint64_t addr, uint64_t val, unsigned len) &quot;addr=0x%&quot;PRIx64 &quot; val=0x%&quot;PRIx64 &quot; len=%u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# pc-dimm.c
mhp_pc_dimm_assigned_slot(int slot) &quot;%d&quot;
# memory-device.c
memory_device_pre_plug(const char *id, uint64_t addr) &quot;id=%s addr=0x%&quot;PRIx64
memory_device_plug(const char *id, uint64_t addr) &quot;id=%s addr=0x%&quot;PRIx64
memory_device_unplug(const char *id, uint64_t addr) &quot;id=%s addr=0x%&quot;PRIx64
# malta.c
malta_fpga_leds(const char *text) &quot;LEDs %s&quot;
malta_fpga_display(const char *text) &quot;ASCII &#039;%s&#039;&quot;
# See docs/devel/tracing.rst for syntax documentation.

# allwinner-cpucfg.c
allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) &quot;id %u, reset_addr 0x%&quot; PRIx32
allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32

# allwinner-h3-dramc.c
allwinner_h3_dramc_rowmirror_disable(void) &quot;Disable row mirror&quot;
allwinner_h3_dramc_rowmirror_enable(uint64_t addr) &quot;Enable row mirror: addr 0x%&quot; PRIx64
allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) &quot;Read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) &quot;Write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) &quot;Read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) &quot;Write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) &quot;Read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) &quot;write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32

# allwinner-r40-dramc.c
allwinner_r40_dramc_detect_cells_disable(void) &quot;Disable detect cells&quot;
allwinner_r40_dramc_detect_cells_enable(void) &quot;Enable detect cells&quot;
allwinner_r40_dramc_map_rows(uint8_t row_bits, uint8_t bank_bits, uint8_t col_bits) &quot;DRAM layout: row_bits %d, bank_bits %d, col_bits %d&quot;
allwinner_r40_dramc_offset_to_cell(uint64_t offset, int row, int bank, int col) &quot;offset 0x%&quot; PRIx64 &quot; row %d bank %d col %d&quot;
allwinner_r40_dramc_detect_cell_write(uint64_t offset, uint64_t data) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot;&quot;
allwinner_r40_dramc_detect_cell_read(uint64_t offset, uint64_t data) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot;&quot;
allwinner_r40_dramcom_read(uint64_t offset, uint64_t data, unsigned size) &quot;Read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_r40_dramcom_write(uint64_t offset, uint64_t data, unsigned size) &quot;Write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_r40_dramctl_read(uint64_t offset, uint64_t data, unsigned size) &quot;Read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_r40_dramctl_write(uint64_t offset, uint64_t data, unsigned size) &quot;Write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_r40_dramphy_read(uint64_t offset, uint64_t data, unsigned size) &quot;Read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_r40_dramphy_write(uint64_t offset, uint64_t data, unsigned size) &quot;write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32

# allwinner-sid.c
allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32

# allwinner-sramc.c
allwinner_sramc_read(uint64_t offset, uint64_t data) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
allwinner_sramc_write(uint64_t offset, uint64_t data) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64

# avr_power.c
avr_power_read(uint8_t value) &quot;power_reduc read value:%u&quot;
avr_power_write(uint8_t value) &quot;power_reduc write value:%u&quot;

# axp2xx
axp2xx_rx(uint8_t reg, uint8_t data) &quot;Read reg 0x%&quot; PRIx8 &quot; : 0x%&quot; PRIx8
axp2xx_select(uint8_t reg) &quot;Accessing reg 0x%&quot; PRIx8
axp2xx_tx(uint8_t reg, uint8_t data) &quot;Write reg 0x%&quot; PRIx8 &quot; : 0x%&quot; PRIx8

# eccmemctl.c
ecc_mem_writel_mer(uint32_t val) &quot;Write memory enable 0x%08x&quot;
ecc_mem_writel_mdr(uint32_t val) &quot;Write memory delay 0x%08x&quot;
ecc_mem_writel_mfsr(uint32_t val) &quot;Write memory fault status 0x%08x&quot;
ecc_mem_writel_vcr(uint32_t val) &quot;Write slot configuration 0x%08x&quot;
ecc_mem_writel_dr(uint32_t val) &quot;Write diagnostic 0x%08x&quot;
ecc_mem_writel_ecr0(uint32_t val) &quot;Write event count 1 0x%08x&quot;
ecc_mem_writel_ecr1(uint32_t val) &quot;Write event count 2 0x%08x&quot;
ecc_mem_readl_mer(uint32_t ret) &quot;Read memory enable 0x%08x&quot;
ecc_mem_readl_mdr(uint32_t ret) &quot;Read memory delay 0x%08x&quot;
ecc_mem_readl_mfsr(uint32_t ret) &quot;Read memory fault status 0x%08x&quot;
ecc_mem_readl_vcr(uint32_t ret) &quot;Read slot configuration 0x%08x&quot;
ecc_mem_readl_mfar0(uint32_t ret) &quot;Read memory fault address 0 0x%08x&quot;
ecc_mem_readl_mfar1(uint32_t ret) &quot;Read memory fault address 1 0x%08x&quot;
ecc_mem_readl_dr(uint32_t ret) &quot;Read diagnostic 0x%08x&quot;
ecc_mem_readl_ecr0(uint32_t ret) &quot;Read event count 1 0x%08x&quot;
ecc_mem_readl_ecr1(uint32_t ret) &quot;Read event count 2 0x%08x&quot;
ecc_diag_mem_writeb(uint64_t addr, uint32_t val) &quot;Write diagnostic %&quot;PRId64&quot; = 0x%02x&quot;
ecc_diag_mem_readb(uint64_t addr, uint32_t ret) &quot;Read diagnostic %&quot;PRId64&quot;= 0x%02x&quot;

# empty_slot.c
empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) &quot;wr addr:0x%04&quot;PRIx64&quot; data:0x%0*&quot;PRIx64&quot; size %u [%s]&quot;

# slavio_misc.c
slavio_misc_update_irq_raise(void) &quot;Raise IRQ&quot;
slavio_misc_update_irq_lower(void) &quot;Lower IRQ&quot;
slavio_set_power_fail(int power_failing, uint8_t config) &quot;Power fail: %d, config: %d&quot;
slavio_cfg_mem_writeb(uint32_t val) &quot;Write config 0x%02x&quot;
slavio_cfg_mem_readb(uint32_t ret) &quot;Read config 0x%02x&quot;
slavio_diag_mem_writeb(uint32_t val) &quot;Write diag 0x%02x&quot;
slavio_diag_mem_readb(uint32_t ret) &quot;Read diag 0x%02x&quot;
slavio_mdm_mem_writeb(uint32_t val) &quot;Write modem control 0x%02x&quot;
slavio_mdm_mem_readb(uint32_t ret) &quot;Read modem control 0x%02x&quot;
slavio_aux1_mem_writeb(uint32_t val) &quot;Write aux1 0x%02x&quot;
slavio_aux1_mem_readb(uint32_t ret) &quot;Read aux1 0x%02x&quot;
slavio_aux2_mem_writeb(uint32_t val) &quot;Write aux2 0x%02x&quot;
slavio_aux2_mem_readb(uint32_t ret) &quot;Read aux2 0x%02x&quot;
apc_mem_writeb(uint32_t val) &quot;Write power management 0x%02x&quot;
apc_mem_readb(uint32_t ret) &quot;Read power management 0x%02x&quot;
slavio_sysctrl_mem_writel(uint32_t val) &quot;Write system control 0x%08x&quot;
slavio_sysctrl_mem_readl(uint32_t ret) &quot;Read system control 0x%08x&quot;
slavio_led_mem_writew(uint32_t val) &quot;Write diagnostic LED 0x%04x&quot;
slavio_led_mem_readw(uint32_t ret) &quot;Read diagnostic LED 0x%04x&quot;

# aspeed_scu.c
aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) &quot;To 0x%&quot; PRIx64 &quot; of size %u: 0x%&quot; PRIx32
aspeed_scu_read(uint64_t offset, unsigned size, uint32_t data) &quot;To 0x%&quot; PRIx64 &quot; of size %u: 0x%&quot; PRIx32

# mps2-scc.c
mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) &quot;MPS2 SCC read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) &quot;MPS2 SCC write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
mps2_scc_reset(void) &quot;MPS2 SCC: reset&quot;
mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) &quot;MPS2 SCC config write: function %d device %d data 0x%&quot; PRIx32
mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) &quot;MPS2 SCC config read: function %d device %d data 0x%&quot; PRIx32

# mps2-fpgaio.c
mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) &quot;MPS2 FPGAIO read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) &quot;MPS2 FPGAIO write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
mps2_fpgaio_reset(void) &quot;MPS2 FPGAIO: reset&quot;

# msf2-sysreg.c
msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) &quot;msf2-sysreg write: addr 0x%08&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; prev 0x%&quot; PRIx32
msf2_sysreg_read(uint64_t offset, uint32_t val) &quot;msf2-sysreg read: addr 0x%08&quot; PRIx64 &quot; data 0x%08&quot; PRIx32
msf2_sysreg_write_pll_status(void) &quot;Invalid write to read only PLL status register&quot;

# imx7_gpr.c
imx7_gpr_read(uint64_t offset) &quot;addr 0x%08&quot; PRIx64
imx7_gpr_write(uint64_t offset, uint64_t value) &quot;addr 0x%08&quot; PRIx64 &quot;value 0x%08&quot; PRIx64

# imx7_snvs.c
imx7_snvs_read(uint64_t offset, uint32_t value) &quot;addr 0x%08&quot; PRIx64 &quot;value 0x%08&quot; PRIx32
imx7_snvs_write(uint64_t offset, uint32_t value) &quot;addr 0x%08&quot; PRIx64 &quot;value 0x%08&quot; PRIx32

# mos6522.c
mos6522_set_counter(int index, unsigned int val) &quot;T%d.counter=%d&quot;
mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) &quot;latch=%d counter=0x%&quot;PRIx64 &quot; delta_next=0x%&quot;PRIx64
mos6522_set_sr_int(void) &quot;set sr_int&quot;
mos6522_write(uint64_t addr, const char *name, uint64_t val) &quot;reg=0x%&quot;PRIx64 &quot; [%s] val=0x%&quot;PRIx64
mos6522_read(uint64_t addr, const char *name, unsigned val) &quot;reg=0x%&quot;PRIx64 &quot; [%s] val=0x%x&quot;

# npcm7xx_clk.c
npcm7xx_clk_read(uint64_t offset, uint32_t value) &quot; offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32
npcm7xx_clk_write(uint64_t offset, uint32_t value) &quot;offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32

# npcm7xx_gcr.c
npcm7xx_gcr_read(uint64_t offset, uint32_t value) &quot; offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32
npcm7xx_gcr_write(uint64_t offset, uint32_t value) &quot;offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32

# npcm7xx_mft.c
npcm7xx_mft_read(const char *name, uint64_t offset, uint16_t value) &quot;%s: offset: 0x%04&quot; PRIx64 &quot; value: 0x%04&quot; PRIx16
npcm7xx_mft_write(const char *name, uint64_t offset, uint16_t value) &quot;%s: offset: 0x%04&quot; PRIx64 &quot; value: 0x%04&quot; PRIx16
npcm7xx_mft_rpm(const char *clock, uint32_t clock_hz, int state, int32_t cnt, uint32_t rpm, uint32_t duty) &quot; fan clk: %s clock_hz: %&quot; PRIu32 &quot;, state: %d, cnt: %&quot; PRIi32 &quot;, rpm: %&quot; PRIu32 &quot;, duty: %&quot; PRIu32
npcm7xx_mft_capture(const char *name, int irq_level) &quot;%s: level: %d&quot;
npcm7xx_mft_update_clock(const char *name, uint16_t sel, uint64_t clock_period, uint64_t prescaled_clock_period) &quot;%s: sel: 0x%02&quot; PRIx16 &quot;, period: %&quot; PRIu64 &quot;, prescaled: %&quot; PRIu64
npcm7xx_mft_set_duty(const char *name, int n, int value) &quot;%s[%d]: %d&quot;

# npcm7xx_rng.c
npcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) &quot;offset: 0x%04&quot; PRIx64 &quot; value: 0x%02&quot; PRIx64 &quot; size: %u&quot;
npcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) &quot;offset: 0x%04&quot; PRIx64 &quot; value: 0x%02&quot; PRIx64 &quot; size: %u&quot;

# npcm7xx_pwm.c
npcm7xx_pwm_read(const char *id, uint64_t offset, uint32_t value) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32
npcm7xx_pwm_write(const char *id, uint64_t offset, uint32_t value) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32
npcm7xx_pwm_update_freq(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) &quot;%s pwm[%u] Update Freq: old_freq: %u, new_freq: %u&quot;
npcm7xx_pwm_update_duty(const char *id, uint8_t index, uint32_t old_value, uint32_t new_value) &quot;%s pwm[%u] Update Duty: old_duty: %u, new_duty: %u&quot;

# stm32f4xx_syscfg.c
stm32f4xx_syscfg_set_irq(int gpio, int line, int level) &quot;Interrupt: GPIO: %d, Line: %d; Level: %d&quot;
stm32f4xx_pulse_exti(int irq) &quot;Pulse EXTI: %d&quot;
stm32f4xx_syscfg_read(uint64_t addr) &quot;reg read: addr: 0x%&quot; PRIx64 &quot; &quot;
stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) &quot;reg write: addr: 0x%&quot; PRIx64 &quot; val: 0x%&quot; PRIx64 &quot;&quot;

# stm32f4xx_exti.c
stm32f4xx_exti_set_irq(int irq, int level) &quot;Set EXTI: %d to %d&quot;
stm32f4xx_exti_read(uint64_t addr) &quot;reg read: addr: 0x%&quot; PRIx64 &quot; &quot;
stm32f4xx_exti_write(uint64_t addr, uint64_t data) &quot;reg write: addr: 0x%&quot; PRIx64 &quot; val: 0x%&quot; PRIx64 &quot;&quot;

# tz-mpc.c
tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) &quot;TZ MPC regs read: offset 0x%x data 0x%&quot; PRIx64 &quot; size %u&quot;
tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) &quot;TZ MPC regs write: offset 0x%x data 0x%&quot; PRIx64 &quot; size %u&quot;
tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) &quot;TZ MPC blocked read: offset 0x%&quot; PRIx64 &quot; size %u secure %d&quot;
tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) &quot;TZ MPC blocked write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u secure %d&quot;
tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) &quot;TZ MPC translate: addr 0x%&quot; PRIx64 &quot; flags 0x%x iommu_idx %s: %s&quot;
tz_mpc_iommu_notify(uint64_t addr) &quot;TZ MPC iommu: notifying UNMAP/MAP for 0x%&quot; PRIx64

# tz-msc.c
tz_msc_reset(void) &quot;TZ MSC: reset&quot;
tz_msc_cfg_nonsec(int level) &quot;TZ MSC: cfg_nonsec = %d&quot;
tz_msc_cfg_sec_resp(int level) &quot;TZ MSC: cfg_sec_resp = %d&quot;
tz_msc_irq_clear(int level) &quot;TZ MSC: int_clear = %d&quot;
tz_msc_update_irq(int level) &quot;TZ MSC: setting irq line to %d&quot;
tz_msc_access_blocked(uint64_t offset) &quot;TZ MSC: offset 0x%&quot; PRIx64 &quot; access blocked&quot;

# tz-ppc.c
tz_ppc_reset(void) &quot;TZ PPC: reset&quot;
tz_ppc_cfg_nonsec(int n, int level) &quot;TZ PPC: cfg_nonsec[%d] = %d&quot;
tz_ppc_cfg_ap(int n, int level) &quot;TZ PPC: cfg_ap[%d] = %d&quot;
tz_ppc_cfg_sec_resp(int level) &quot;TZ PPC: cfg_sec_resp = %d&quot;
tz_ppc_irq_enable(int level) &quot;TZ PPC: int_enable = %d&quot;
tz_ppc_irq_clear(int level) &quot;TZ PPC: int_clear = %d&quot;
tz_ppc_update_irq(int level) &quot;TZ PPC: setting irq line to %d&quot;
tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) &quot;TZ PPC: port %d offset 0x%&quot; PRIx64 &quot; read (secure %d user %d) blocked&quot;
tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) &quot;TZ PPC: port %d offset 0x%&quot; PRIx64 &quot; write (secure %d user %d) blocked&quot;

# iotkit-secctl.c
iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) &quot;IoTKit SecCtl S regs read: offset 0x%x data 0x%&quot; PRIx64 &quot; size %u&quot;
iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) &quot;IoTKit SecCtl S regs write: offset 0x%x data 0x%&quot; PRIx64 &quot; size %u&quot;
iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) &quot;IoTKit SecCtl NS regs read: offset 0x%x data 0x%&quot; PRIx64 &quot; size %u&quot;
iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) &quot;IoTKit SecCtl NS regs write: offset 0x%x data 0x%&quot; PRIx64 &quot; size %u&quot;

# imx6_ccm.c
imx6_analog_get_periph_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_analog_get_pll2_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_analog_get_pll2_pfd0_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_analog_get_pll2_pfd2_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_analog_read(const char *reg, uint32_t value) &quot;reg[%s] =&gt; 0x%&quot; PRIx32
imx6_analog_write(const char *reg, uint32_t value) &quot;reg[%s] &lt;= 0x%&quot; PRIx32
imx6_ccm_get_ahb_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_ccm_get_ipg_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_ccm_get_per_clk(uint32_t freq) &quot;freq = %u Hz&quot;
imx6_ccm_get_clock_frequency(unsigned clock, uint32_t freq) &quot;(Clock = %d) = %u&quot;
imx6_ccm_read(const char *reg, uint32_t value) &quot;reg[%s] =&gt; 0x%&quot; PRIx32
imx6_ccm_reset(void) &quot;&quot;
imx6_ccm_write(const char *reg, uint32_t value) &quot;reg[%s] &lt;= 0x%&quot; PRIx32

# imx6ul_ccm.c
ccm_entry(void) &quot;&quot;
ccm_freq(uint32_t freq) &quot;freq = %d&quot;
ccm_clock_freq(uint32_t clock, uint32_t freq) &quot;(Clock = %d) = %d&quot;
ccm_read_reg(const char *reg_name, uint32_t value) &quot;reg[%s] &lt;= 0x%&quot; PRIx32
ccm_write_reg(const char *reg_name, uint32_t value) &quot;reg[%s] =&gt; 0x%&quot; PRIx32

# imx7_src.c
imx7_src_read(const char *reg_name, uint32_t value) &quot;reg[%s] =&gt; 0x%&quot; PRIx32
imx7_src_write(const char *reg_name, uint32_t value) &quot;reg[%s] &lt;= 0x%&quot; PRIx32

# iotkit-sysinfo.c
iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) &quot;IoTKit SysInfo read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) &quot;IoTKit SysInfo write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;

# iotkit-sysctl.c
iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) &quot;IoTKit SysCtl read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) &quot;IoTKit SysCtl write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
iotkit_sysctl_reset(void) &quot;IoTKit SysCtl: reset&quot;

# armsse-cpu-pwrctrl.c
armsse_cpu_pwrctrl_read(uint64_t offset, uint64_t data, unsigned size) &quot;SSE-300 CPU_PWRCTRL read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
armsse_cpu_pwrctrl_write(uint64_t offset, uint64_t data, unsigned size) &quot;SSE-300 CPU_PWRCTRL write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;

# armsse-cpuid.c
armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) &quot;SSE-200 CPU_IDENTITY read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) &quot;SSE-200 CPU_IDENTITY write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;

# armsse-mhu.c
armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) &quot;SSE-200 MHU read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) &quot;SSE-200 MHU write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;

# aspeed_xdma.c
aspeed_xdma_write(uint64_t offset, uint64_t data) &quot;XDMA write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64

# aspeed_i3c.c
aspeed_i3c_read(uint64_t offset, uint64_t data) &quot;I3C read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
aspeed_i3c_write(uint64_t offset, uint64_t data) &quot;I3C write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
aspeed_i3c_device_read(uint32_t deviceid, uint64_t offset, uint64_t data) &quot;I3C Dev[%u] read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
aspeed_i3c_device_write(uint32_t deviceid, uint64_t offset, uint64_t data) &quot;I3C Dev[%u] write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64

# aspeed_sdmc.c
aspeed_sdmc_write(uint64_t reg, uint64_t data) &quot;reg @0x%&quot; PRIx64 &quot; data: 0x%&quot; PRIx64
aspeed_sdmc_read(uint64_t reg, uint64_t data) &quot;reg @0x%&quot; PRIx64 &quot; data: 0x%&quot; PRIx64

# aspeed_peci.c
aspeed_peci_read(uint64_t offset, uint64_t data) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
aspeed_peci_write(uint64_t offset, uint64_t data) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
aspeed_peci_raise_interrupt(uint32_t ctrl, uint32_t status) &quot;ctrl 0x%&quot; PRIx32 &quot; status 0x%&quot; PRIx32

# bcm2835_property.c
bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) &quot;mbox property tag:0x%08x in_sz:%u out_sz:%zu&quot;

# bcm2835_mbox.c
bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) &quot;mbox write sz:%u addr:0x%&quot;PRIx64&quot; data:0x%&quot;PRIx64
bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) &quot;mbox read sz:%u addr:0x%&quot;PRIx64&quot; data:0x%&quot;PRIx64
bcm2835_mbox_irq(unsigned level) &quot;mbox irq:ARM level:%u&quot;

# mac_via.c
via1_rtc_update_data_out(int count, int value) &quot;count=%d value=0x%02x&quot;
via1_rtc_update_data_in(int count, int value) &quot;count=%d value=0x%02x&quot;
via1_rtc_internal_status(int cmd, int alt, int value) &quot;cmd=0x%02x alt=0x%02x value=0x%02x&quot;
via1_rtc_internal_cmd(int cmd) &quot;cmd=0x%02x&quot;
via1_rtc_cmd_invalid(int value) &quot;value=0x%02x&quot;
via1_rtc_internal_time(uint32_t time) &quot;time=0x%08x&quot;
via1_rtc_internal_set_cmd(int cmd) &quot;cmd=0x%02x&quot;
via1_rtc_internal_ignore_cmd(int cmd) &quot;cmd=0x%02x&quot;
via1_rtc_internal_set_alt(int alt, int sector, int offset) &quot;alt=0x%02x sector=%u offset=%u&quot;
via1_rtc_cmd_seconds_read(int reg, int value) &quot;reg=%d value=0x%02x&quot;
via1_rtc_cmd_seconds_write(int reg, int value) &quot;reg=%d value=0x%02x&quot;
via1_rtc_cmd_test_write(int value) &quot;value=0x%02x&quot;
via1_rtc_cmd_wprotect_write(int value) &quot;value=0x%02x&quot;
via1_rtc_cmd_pram_read(int addr, int value) &quot;addr=%u value=0x%02x&quot;
via1_rtc_cmd_pram_write(int addr, int value) &quot;addr=%u value=0x%02x&quot;
via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) &quot;sector=%u offset=%u addr=0x%x value=0x%02x&quot;
via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) &quot;sector=%u offset=%u addr=0x%x value=0x%02x&quot;
via1_adb_send(const char *state, uint8_t data, const char *vadbint) &quot;state %s data=0x%02x vADBInt=%s&quot;
via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) &quot;state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d&quot;
via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) &quot;data=0x%02x vADBInt=%s status=0x%x index=%d size=%d&quot;
via1_adb_netbsd_enum_hack(void) &quot;using NetBSD enum hack&quot;
via1_auxmode(int mode) &quot;setting auxmode to %d&quot;
via1_timer_hack_state(int state) &quot;setting timer_hack_state to %d&quot;

# grlib_ahb_apb_pnp.c
grlib_ahb_pnp_read(uint64_t addr, unsigned size, uint32_t value) &quot;AHB PnP read addr:0x%03&quot;PRIx64&quot; size:%u data:0x%08x&quot;
grlib_apb_pnp_read(uint64_t addr, unsigned size, uint32_t value) &quot;APB PnP read addr:0x%03&quot;PRIx64&quot; size:%u data:0x%08x&quot;

# led.c
led_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) &quot;LED desc:&#039;%s&#039; color:%s intensity: %u%%&quot;
led_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) &quot;LED desc:&#039;%s&#039; color:%s intensity %u%% -&gt; %u%%&quot;

# pca9552.c
pca955x_gpio_status(const char *description, const char *buf) &quot;%s GPIOs 0-15 [%s]&quot;
pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) &quot;%s GPIO id:%u status: %u -&gt; %u&quot;

# bcm2835_cprman.c
bcm2835_cprman_read(uint64_t offset, uint64_t value) &quot;offset:0x%&quot; PRIx64 &quot; value:0x%&quot; PRIx64
bcm2835_cprman_write(uint64_t offset, uint64_t value) &quot;offset:0x%&quot; PRIx64 &quot; value:0x%&quot; PRIx64
bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) &quot;offset:0x%&quot; PRIx64 &quot; value:0x%&quot; PRIx64

# virt_ctrl.c
virt_ctrl_read(void *dev, unsigned int addr, unsigned int size, uint64_t value) &quot;ctrl: %p reg: 0x%02x size: %d value: 0x%&quot;PRIx64
virt_ctrl_write(void *dev, unsigned int addr, unsigned int size, uint64_t value) &quot;ctrl: %p reg: 0x%02x size: %d value: 0x%&quot;PRIx64
virt_ctrl_reset(void *dev) &quot;ctrl: %p&quot;
virt_ctrl_realize(void *dev) &quot;ctrl: %p&quot;
virt_ctrl_instance_init(void *dev) &quot;ctrl: %p&quot;

# lasi.c
lasi_chip_mem_valid(uint64_t addr, uint32_t val) &quot;access to addr 0x%&quot;PRIx64&quot; is %d&quot;
lasi_chip_read(uint64_t addr, uint32_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%08x&quot;
lasi_chip_write(uint64_t addr, uint32_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%08x&quot;

# djmemc.c
djmemc_read(int reg, uint64_t value, unsigned int size) &quot;reg=0x%x value=0x%&quot;PRIx64&quot; size=%u&quot;
djmemc_write(int reg, uint64_t value, unsigned int size) &quot;reg=0x%x value=0x%&quot;PRIx64&quot; size=%u&quot;

# iosb.c
iosb_read(int reg, uint64_t value, unsigned int size) &quot;reg=0x%x value=0x%&quot;PRIx64&quot; size=%u&quot;
iosb_write(int reg, uint64_t value, unsigned int size) &quot;reg=0x%x value=0x%&quot;PRIx64&quot; size=%u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# cuda.c
cuda_delay_set_sr_int(void) &quot;&quot;
cuda_data_send(uint8_t data) &quot;send: 0x%02x&quot;
cuda_data_recv(uint8_t data) &quot;recv: 0x%02x&quot;
cuda_receive_packet_cmd(const char *cmd) &quot;handling command %s&quot;
cuda_packet_receive(int len) &quot;length %d&quot;
cuda_packet_receive_data(int i, const uint8_t data) &quot;[%d] 0x%02x&quot;
cuda_packet_send(int len) &quot;length %d&quot;
cuda_packet_send_data(int i, const uint8_t data) &quot;[%d] 0x%02x&quot;

# macio.c
macio_timer_write(uint64_t addr, unsigned len, uint64_t val) &quot;write addr 0x%&quot;PRIx64 &quot; len %d val 0x%&quot;PRIx64
macio_timer_read(uint64_t addr, unsigned len, uint32_t val) &quot;read addr 0x%&quot;PRIx64 &quot; len %d val 0x%&quot;PRIx32

# gpio.c
macio_set_gpio(int gpio, bool state) &quot;setting GPIO %d to %d&quot;
macio_gpio_irq_assert(int gpio) &quot;asserting GPIO %d&quot;
macio_gpio_irq_deassert(int gpio) &quot;deasserting GPIO %d&quot;
macio_gpio_write(uint64_t addr, uint64_t val) &quot;addr: 0x%&quot;PRIx64&quot; value: 0x%&quot;PRIx64

# pmu.c
pmu_adb_poll(int olen) &quot;ADB autopoll, olen=%d&quot;
pmu_one_sec_timer(void) &quot;PMU one sec...&quot;
pmu_cmd_set_int_mask(int intmask) &quot;Setting PMU int mask to 0x%02x&quot;
pmu_cmd_set_adb_autopoll(int mask) &quot;ADB set autopoll, mask=0x%04x&quot;
pmu_cmd_adb_nobus(void) &quot;ADB PACKET with no ADB bus!&quot;
pmu_cmd_adb_request(int inlen, int indata0, int indata1, int indata2, int indata3, int indata4) &quot;ADB request: len=%d, cmd=0x%02x, pflags=0x%02x, adblen=%d: 0x%02x 0x%02x...&quot;
pmu_cmd_adb_reply(int len) &quot;ADB reply is %d bytes&quot;
pmu_dispatch_cmd(const char *name) &quot;handling command %s&quot;
pmu_dispatch_unknown_cmd(int cmd) &quot;Unknown PMU command 0x%02x&quot;
pmu_debug_protocol_string(const char *str) &quot;%s&quot;
pmu_debug_protocol_resp_size(int size) &quot;sending %d resp bytes&quot;
pmu_debug_protocol_error(int portB) &quot;protocol error! portB=0x%02x&quot;
pmu_debug_protocol_clear_treq(int state) &quot;TREQ cleared, clearing TACK, state: %d&quot;
pmu_debug_protocol_cmd(int cmd, int cmdlen, int rsplen) &quot;Got command byte 0x%02x, clen=%d, rlen=%d&quot;
pmu_debug_protocol_cmdlen(int len) &quot;got cmd length byte: %d&quot;
pmu_debug_protocol_cmd_toobig(int len) &quot;command too big (%d bytes)&quot;
pmu_debug_protocol_cmd_send_resp_size(int len) &quot;sending length byte: %d&quot;
pmu_debug_protocol_cmd_send_resp(int pos, int len) &quot;sending byte: %d/%d&quot;
pmu_debug_protocol_cmd_resp_complete(int ier) &quot;Response send complete. IER=0x%02x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# allwinner-sun8i-emac.c
allwinner_sun8i_emac_mii_write_reg(uint32_t reg, uint32_t value) &quot;MII write: reg=0x%&quot; PRIx32 &quot; value=0x%&quot; PRIx32
allwinner_sun8i_emac_mii_read_reg(uint32_t reg, uint32_t value) &quot;MII read: reg=0x%&quot; PRIx32 &quot; value=0x%&quot; PRIx32
allwinner_sun8i_emac_receive(uint32_t desc, uint32_t paddr, uint32_t bytes) &quot;RX packet: desc=0x%&quot; PRIx32 &quot; paddr=0x%&quot; PRIx32 &quot; bytes=%&quot; PRIu32
allwinner_sun8i_emac_transmit(uint32_t desc, uint32_t paddr, uint32_t bytes) &quot;TX packet: desc=0x%&quot; PRIx32 &quot; paddr=0x%&quot; PRIx32 &quot; bytes=%&quot; PRIu32
allwinner_sun8i_emac_reset(void) &quot;HW reset&quot;
allwinner_sun8i_emac_set_link(bool active) &quot;Set link: active=%u&quot;
allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) &quot;MMIO read: offset=0x%&quot; PRIx64 &quot; value=0x%&quot; PRIx64
allwinner_sun8i_emac_write(uint64_t offset, uint64_t val) &quot;MMIO write: offset=0x%&quot; PRIx64 &quot; value=0x%&quot; PRIx64

# etraxfs_eth.c
mdio_phy_read(int regnum, uint16_t value) &quot;read phy_reg:%d value:0x%04x&quot;
mdio_phy_write(int regnum, uint16_t value) &quot;write phy_reg:%d value:0x%04x&quot;
mdio_bitbang(bool mdc, bool mdio, int state, uint16_t cnt, unsigned int drive) &quot;bitbang mdc=%u mdio=%u state=%d cnt=%u drv=%d&quot;

# lance.c
lance_mem_readw(uint64_t addr, uint32_t ret) &quot;addr=0x%&quot;PRIx64&quot;val=0x%04x&quot;
lance_mem_writew(uint64_t addr, uint32_t val) &quot;addr=0x%&quot;PRIx64&quot;val=0x%04x&quot;

# mipsnet.c
mipsnet_send(uint32_t size) &quot;sending len=%u&quot;
mipsnet_receive(uint32_t size) &quot;receiving len=%u&quot;
mipsnet_read(uint64_t addr, uint32_t val) &quot;read addr=0x%&quot; PRIx64 &quot; val=0x%x&quot;
mipsnet_write(uint64_t addr, uint64_t val) &quot;write addr=0x%&quot; PRIx64 &quot; val=0x%&quot; PRIx64
mipsnet_irq(uint32_t isr, uint32_t intctl) &quot;set irq to %d (0x%02x)&quot;

# ne2000.c
ne2000_read(uint64_t addr, uint64_t val) &quot;read addr=0x%&quot; PRIx64 &quot; val=0x%&quot; PRIx64
ne2000_write(uint64_t addr, uint64_t val) &quot;write addr=0x%&quot; PRIx64 &quot; val=0x%&quot; PRIx64
ne2000_ioport_read(uint64_t addr, uint64_t val) &quot;io read addr=0x%02&quot; PRIx64 &quot; val=0x%02&quot; PRIx64
ne2000_ioport_write(uint64_t addr, uint64_t val) &quot;io write addr=0x%02&quot; PRIx64 &quot; val=0x%02&quot; PRIx64

# opencores_eth.c
open_eth_mii_write(unsigned idx, uint16_t v) &quot;MII[0x%02x] &lt;- 0x%04x&quot;
open_eth_mii_read(unsigned idx, uint16_t v) &quot;MII[0x%02x] -&gt; 0x%04x&quot;
open_eth_update_irq(uint32_t v) &quot;IRQ &lt;- 0x%x&quot;
open_eth_receive(unsigned len) &quot;RX: len: %u&quot;
open_eth_receive_mcast(unsigned idx, uint32_t h0, uint32_t h1) &quot;MCAST: idx = %u, hash: %08x:%08x&quot;
open_eth_receive_reject(void) &quot;RX: rejected&quot;
open_eth_receive_desc(uint32_t addr, uint32_t len_flags) &quot;RX: 0x%08x, len_flags: 0x%08x&quot;
open_eth_start_xmit(uint32_t addr, unsigned len, unsigned tx_len) &quot;TX: 0x%08x, len: %u, tx_len: %u&quot;
open_eth_reg_read(uint32_t addr, uint32_t v) &quot;MAC[0x%02x] -&gt; 0x%08x&quot;
open_eth_reg_write(uint32_t addr, uint32_t v) &quot;MAC[0x%02x] &lt;- 0x%08x&quot;
open_eth_desc_read(uint32_t addr, uint32_t v) &quot;DESC[0x%04x] -&gt; 0x%08x&quot;
open_eth_desc_write(uint32_t addr, uint32_t v) &quot;DESC[0x%04x] &lt;- 0x%08x&quot;

# pcnet.c
pcnet_s_reset(void *s) &quot;s=%p&quot;
pcnet_user_int(void *s) &quot;s=%p&quot;
pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) &quot;s=%p INTA=%d&lt;=%d&quot;
pcnet_init(void *s, uint64_t init_addr) &quot;s=%p init_addr=0x%&quot;PRIx64
pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) &quot;s=%p rlen=%d tlen=%d&quot;
pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) &quot;s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]&quot;

# pcnet-pci.c
pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) &quot;opaque=%p addr=0x%08x val=0x%02x&quot;
pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) &quot;opaque=%p addr=0x%08x val=0x%02x&quot;
pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) &quot;opaque=%p addr=0x%&quot;PRIx64&quot; size=%d&quot;
pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) &quot;opaque=%p addr=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64&quot; size=%d&quot;

# net_rx_pkt.c
net_rx_pkt_parsed(bool ip4, bool ip6, int l4proto, size_t l3o, size_t l4o, size_t l5o) &quot;RX packet parsed: ip4: %d, ip6: %d, l4 protocol: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu&quot;
net_rx_pkt_l4_csum_validate_entry(void) &quot;Starting L4 checksum validation&quot;
net_rx_pkt_l4_csum_validate_not_xxp(void) &quot;Not a TCP/UDP packet&quot;
net_rx_pkt_l4_csum_validate_udp_with_no_checksum(void) &quot;UDP packet without checksum&quot;
net_rx_pkt_l4_csum_validate_ip4_fragment(void) &quot;IP4 fragment&quot;
net_rx_pkt_l4_csum_validate_csum(bool csum_valid) &quot;Checksum valid: %d&quot;

net_rx_pkt_l4_csum_calc_entry(void) &quot;Starting L4 checksum calculation&quot;
net_rx_pkt_l4_csum_calc_ip4_udp(void) &quot;IP4/UDP packet&quot;
net_rx_pkt_l4_csum_calc_ip4_tcp(void) &quot;IP4/TCP packet&quot;
net_rx_pkt_l4_csum_calc_ip6_udp(void) &quot;IP6/UDP packet&quot;
net_rx_pkt_l4_csum_calc_ip6_tcp(void) &quot;IP6/TCP packet&quot;
net_rx_pkt_l4_csum_calc_ph_csum(uint32_t cntr, uint16_t csl) &quot;Pseudo-header: checksum counter %u, length %u&quot;
net_rx_pkt_l4_csum_calc_csum(size_t l4hdr_off, uint16_t csl, uint32_t cntr, uint16_t csum) &quot;L4 Checksum: L4 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X&quot;

net_rx_pkt_l4_csum_fix_entry(void) &quot;Starting L4 checksum correction&quot;
net_rx_pkt_l4_csum_fix_tcp(uint32_t l4_cso) &quot;TCP packet, L4 cso: %u&quot;
net_rx_pkt_l4_csum_fix_udp(uint32_t l4_cso) &quot;UDP packet, L4 cso: %u&quot;
net_rx_pkt_l4_csum_fix_not_xxp(void) &quot;Not an IP4 packet&quot;
net_rx_pkt_l4_csum_fix_ip4_fragment(void) &quot;IP4 fragment&quot;
net_rx_pkt_l4_csum_fix_udp_with_no_checksum(void) &quot;UDP packet without checksum&quot;
net_rx_pkt_l4_csum_fix_csum(uint32_t cso, uint16_t csum) &quot;L4 Checksum: Offset: %u, value 0x%X&quot;

net_rx_pkt_l3_csum_validate_entry(void) &quot;Starting L3 checksum validation&quot;
net_rx_pkt_l3_csum_validate_not_ip4(void) &quot;Not an IP4 packet&quot;
net_rx_pkt_l3_csum_validate_csum(size_t l3hdr_off, uint32_t csl, uint32_t cntr, uint16_t csum, bool csum_valid) &quot;L3 Checksum: L3 header offset: %zu, length: %u, counter: 0x%X, final checksum: 0x%X, valid: %d&quot;

net_rx_pkt_rss_ip4(void) &quot;Calculating IPv4 RSS  hash&quot;
net_rx_pkt_rss_ip4_tcp(void) &quot;Calculating IPv4/TCP RSS  hash&quot;
net_rx_pkt_rss_ip4_udp(void) &quot;Calculating IPv4/UDP RSS  hash&quot;
net_rx_pkt_rss_ip6_tcp(void) &quot;Calculating IPv6/TCP RSS  hash&quot;
net_rx_pkt_rss_ip6_udp(void) &quot;Calculating IPv6/UDP RSS  hash&quot;
net_rx_pkt_rss_ip6(void) &quot;Calculating IPv6 RSS  hash&quot;
net_rx_pkt_rss_ip6_ex(void) &quot;Calculating IPv6/EX RSS  hash&quot;
net_rx_pkt_rss_ip6_ex_tcp(void) &quot;Calculating IPv6/EX/TCP RSS  hash&quot;
net_rx_pkt_rss_ip6_ex_udp(void) &quot;Calculating IPv6/EX/UDP RSS  hash&quot;
net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) &quot;RSS hash for %zu bytes: 0x%X&quot;
net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) &quot;Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes&quot;

# e1000.c
e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) &quot;Receiver overrun: dropped packet of %zu bytes, RDH=%u, RDT=%u&quot;

# e1000x_common.c
e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) &quot;link_up: %d, rx_enabled %d, pci_master %d&quot;
e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) &quot;Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X&quot;
e1000x_rx_flt_vlan_mismatch(uint16_t vid) &quot;VID mismatch: 0x%X&quot;
e1000x_rx_flt_vlan_match(uint16_t vid) &quot;VID match: 0x%X&quot;
e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) &quot;unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x&quot;
e1000x_rx_flt_ucast_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) &quot;unicast mismatch: %02x:%02x:%02x:%02x:%02x:%02x&quot;
e1000x_rx_flt_inexact_mismatch(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5, uint32_t mo, uint32_t mta, uint32_t mta_val) &quot;inexact mismatch: %02x:%02x:%02x:%02x:%02x:%02x MO %d MTA[%d] 0x%x&quot;
e1000x_rx_link_down(uint32_t status_reg) &quot;Received packet dropped because the link is down STATUS = %u&quot;
e1000x_rx_disabled(uint32_t rctl_reg) &quot;Received packet dropped because receive is disabled RCTL = %u&quot;
e1000x_rx_oversized(size_t size) &quot;Received packet dropped because it was oversized (%zu bytes)&quot;
e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) &quot;Indicating MAC to guest: %02x:%02x:%02x:%02x:%02x:%02x&quot;
e1000x_link_negotiation_start(void) &quot;Start link auto negotiation&quot;
e1000x_link_negotiation_done(void) &quot;Auto negotiation is completed&quot;

# e1000e_core.c
e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) &quot;Write to register 0x%&quot;PRIx64&quot;, %d byte(s), value: 0x%&quot;PRIx64
e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) &quot;Read from register 0x%&quot;PRIx64&quot;, %d byte(s), value: 0x%&quot;PRIx64
e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) &quot;MDIC READ: PHY[%u][%u] = 0x%x&quot;
e1000e_core_mdic_read_unhandled(uint8_t page, uint32_t addr) &quot;MDIC READ: PHY[%u][%u] UNHANDLED&quot;
e1000e_core_mdic_write(uint8_t page, uint32_t addr, uint32_t data) &quot;MDIC WRITE: PHY[%u][%u] = 0x%x&quot;
e1000e_core_mdic_write_unhandled(uint8_t page, uint32_t addr) &quot;MDIC WRITE: PHY[%u][%u] UNHANDLED&quot;
e1000e_core_ctrl_write(uint64_t index, uint32_t val) &quot;Write CTRL register 0x%&quot;PRIx64&quot;, value: 0x%X&quot;
e1000e_core_ctrl_sw_reset(void) &quot;Doing SW reset&quot;
e1000e_core_ctrl_phy_reset(void) &quot;Doing PHY reset&quot;

e1000e_link_autoneg_flowctl(bool enabled) &quot;Auto-negotiated flow control state is %d&quot;
e1000e_link_set_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) &quot;Set link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d&quot;
e1000e_link_read_params(bool autodetect, uint32_t speed, bool force_spd, bool force_dplx, bool rx_fctl, bool tx_fctl) &quot;Get link params: Autodetect: %d, Speed: %d, Force speed: %d, Force duplex: %d, RX flow control %d, TX flow control %d&quot;
e1000e_link_set_ext_params(bool asd_check, bool speed_select_bypass) &quot;Set extended link params: ASD check: %d, Speed select bypass: %d&quot;
e1000e_link_status(bool link_up, bool full_dplx, uint32_t speed, uint32_t asdv) &quot;Link up: %d, Duplex: %d, Speed: %d, ASDV: %d&quot;
e1000e_link_status_changed(bool status) &quot;New link status: %d&quot;

e1000e_wrn_regs_write_ro(uint64_t index, uint32_t size, uint64_t val) &quot;WARNING: Write to RO register 0x%&quot;PRIx64&quot;, %d byte(s), value: 0x%&quot;PRIx64
e1000e_wrn_regs_write_unknown(uint64_t index, uint32_t size, uint64_t val) &quot;WARNING: Write to unknown register 0x%&quot;PRIx64&quot;, %d byte(s), value: 0x%&quot;PRIx64
e1000e_wrn_regs_read_unknown(uint64_t index, uint32_t size) &quot;WARNING: Read from unknown register 0x%&quot;PRIx64&quot;, %d byte(s)&quot;
e1000e_wrn_regs_read_trivial(uint32_t index) &quot;WARNING: Reading register at offset: 0x%05x. It is not fully implemented.&quot;
e1000e_wrn_regs_write_trivial(uint32_t index) &quot;WARNING: Writing to register at offset: 0x%05x. It is not fully implemented.&quot;
e1000e_wrn_no_ts_support(void) &quot;WARNING: Guest requested TX timestamping which is not supported&quot;
e1000e_wrn_no_snap_support(void) &quot;WARNING: Guest requested TX SNAP header update which is not supported&quot;
e1000e_wrn_iscsi_filtering_not_supported(void) &quot;WARNING: Guest requested iSCSI filtering  which is not supported&quot;
e1000e_wrn_nfsw_filtering_not_supported(void) &quot;WARNING: Guest requested NFS write filtering  which is not supported&quot;
e1000e_wrn_nfsr_filtering_not_supported(void) &quot;WARNING: Guest requested NFS read filtering  which is not supported&quot;

e1000e_tx_disabled(void) &quot;TX Disabled&quot;
e1000e_tx_descr(void *addr, uint32_t lower, uint32_t upper) &quot;%p : %x %x&quot;

e1000e_ring_free_space(int ridx, uint32_t rdlen, uint32_t rdh, uint32_t rdt) &quot;ring #%d: LEN: %u, DH: %u, DT: %u&quot;

e1000e_rx_can_recv_rings_full(void) &quot;Cannot receive: all rings are full&quot;
e1000e_rx_can_recv(void) &quot;Can receive&quot;
e1000e_rx_has_buffers(int ridx, uint32_t free_desc, size_t total_size, uint32_t desc_buf_size) &quot;ring #%d: free descr: %u, packet size %zu, descr buffer size %u&quot;
e1000e_rx_null_descriptor(void) &quot;Null RX descriptor!!&quot;
e1000e_rx_desc_ps_read(uint64_t a0, uint64_t a1, uint64_t a2, uint64_t a3) &quot;buffers: [0x%&quot;PRIx64&quot;, 0x%&quot;PRIx64&quot;, 0x%&quot;PRIx64&quot;, 0x%&quot;PRIx64&quot;]&quot;
e1000e_rx_desc_ps_write(uint16_t a0, uint16_t a1, uint16_t a2, uint16_t a3) &quot;bytes written: [%u, %u, %u, %u]&quot;
e1000e_rx_desc_buff_sizes(uint32_t b0, uint32_t b1, uint32_t b2, uint32_t b3) &quot;buffer sizes: [%u, %u, %u, %u]&quot;
e1000e_rx_desc_len(uint8_t rx_desc_len) &quot;RX descriptor length: %u&quot;
e1000e_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) &quot;buffer #%u, addr: 0x%&quot;PRIx64&quot;, offset: %u, from: %p, length: %u&quot;
e1000e_rx_descr(int ridx, uint64_t base, uint8_t len) &quot;Next RX descriptor: ring #%d, PA: 0x%&quot;PRIx64&quot;, length: %u&quot;
e1000e_rx_set_rctl(uint32_t rctl) &quot;RCTL = 0x%x&quot;
e1000e_rx_receive_iov(int iovcnt) &quot;Received vector of %d fragments&quot;
e1000e_rx_flt_dropped(void) &quot;Received packet dropped by RX filter&quot;
e1000e_rx_written_to_guest(int queue_idx) &quot;Received packet written to guest (queue %d)&quot;
e1000e_rx_not_written_to_guest(int queue_idx) &quot;Received packet NOT written to guest (queue %d)&quot;
e1000e_rx_interrupt_set(uint32_t causes) &quot;Receive interrupt set (ICR causes %u)&quot;
e1000e_rx_interrupt_delayed(uint32_t causes) &quot;Receive interrupt delayed (ICR causes %u)&quot;
e1000e_rx_set_cso(int cso_state) &quot;RX CSO state set to %d&quot;
e1000e_rx_set_rdt(int queue_idx, uint32_t val) &quot;Setting RDT[%d] = %u&quot;
e1000e_rx_set_rfctl(uint32_t val) &quot;Setting RFCTL = 0x%X&quot;
e1000e_rx_start_recv(void)

e1000e_rx_rss_started(void) &quot;Starting RSS processing&quot;
e1000e_rx_rss_disabled(void) &quot;RSS is disabled&quot;
e1000e_rx_rss_type(uint32_t type) &quot;RSS type is %u&quot;
e1000e_rx_rss_ip4(int l4hdr_proto, uint32_t mrqc, bool tcpipv4_enabled, bool ipv4_enabled) &quot;RSS IPv4: L4 header protocol %d, mrqc 0x%X, tcpipv4 enabled %d, ipv4 enabled %d&quot;
e1000e_rx_rss_ip6_rfctl(uint32_t rfctl) &quot;RSS IPv6: rfctl 0x%X&quot;
e1000e_rx_rss_ip6(bool ex_dis, bool new_ex_dis, int l4hdr_proto, bool has_ext_headers, bool ex_dst_valid, bool ex_src_valid, uint32_t mrqc, bool tcpipv6ex_enabled, bool ipv6ex_enabled, bool ipv6_enabled) &quot;RSS IPv6: ex_dis: %d, new_ex_dis: %d, L4 header protocol %d, has_ext_headers %d, ex_dst_valid %d, ex_src_valid %d, mrqc 0x%X, tcpipv6ex enabled %d, ipv6ex enabled %d, ipv6 enabled %d&quot;

e1000e_rx_metadata_protocols(bool hasip4, bool hasip6, int l4hdr_protocol) &quot;protocols: ip4: %d, ip6: %d, l4hdr: %d&quot;
e1000e_rx_metadata_vlan(uint16_t vlan_tag) &quot;VLAN tag is 0x%X&quot;
e1000e_rx_metadata_rss(uint32_t rss, uint32_t mrq) &quot;RSS data: rss: 0x%X, mrq: 0x%X&quot;
e1000e_rx_metadata_ip_id(uint16_t ip_id) &quot;the IPv4 ID is 0x%X&quot;
e1000e_rx_metadata_ack(void) &quot;the packet is TCP ACK&quot;
e1000e_rx_metadata_pkt_type(uint32_t pkt_type) &quot;the packet type is %u&quot;
e1000e_rx_metadata_virthdr_no_csum_info(void) &quot;virt-header does not contain checksum info&quot;
e1000e_rx_metadata_l3_cso_disabled(void) &quot;IP4 CSO is disabled&quot;
e1000e_rx_metadata_l4_cso_disabled(void) &quot;TCP/UDP CSO is disabled&quot;
e1000e_rx_metadata_l3_csum_validation_failed(void) &quot;Cannot validate L3 checksum&quot;
e1000e_rx_metadata_l4_csum_validation_failed(void) &quot;Cannot validate L4 checksum&quot;
e1000e_rx_metadata_status_flags(uint32_t status_flags) &quot;status_flags is 0x%X&quot;
e1000e_rx_metadata_ipv6_sum_disabled(void) &quot;IPv6 RX checksummimg disabled by RFCTL&quot;
e1000e_rx_metadata_ipv6_filtering_disabled(void) &quot;IPv6 RX filtering disabled by RFCTL&quot;

e1000e_vlan_vet(uint16_t vet) &quot;Setting VLAN ethernet type 0x%X&quot;

e1000e_irq_msi_notify(uint32_t cause) &quot;MSI notify 0x%x&quot;
e1000e_irq_msi_notify_postponed(void) &quot;Sending MSI postponed by ITR&quot;
e1000e_irq_legacy_notify_postponed(void) &quot;Raising legacy IRQ postponed by ITR&quot;
e1000e_irq_msix_notify_postponed_vec(int idx) &quot;Sending MSI-X postponed by EITR[%d]&quot;
e1000e_irq_legacy_notify(bool level) &quot;IRQ line state: %d&quot;
e1000e_irq_msix_notify_vec(uint32_t vector) &quot;MSI-X notify vector 0x%x&quot;
e1000e_irq_postponed_by_xitr(uint32_t reg) &quot;Interrupt postponed by [E]ITR register 0x%x&quot;
e1000e_irq_clear(uint32_t offset, uint32_t old, uint32_t new) &quot;Clearing interrupt register 0x%x: 0x%x --&gt; 0x%x&quot;
e1000e_irq_set(uint32_t offset, uint32_t old, uint32_t new) &quot;Setting interrupt register 0x%x: 0x%x --&gt; 0x%x&quot;
e1000e_irq_fix_icr_asserted(uint32_t new_val) &quot;ICR_ASSERTED bit fixed: 0x%x&quot;
e1000e_irq_add_msi_other(uint32_t new_val) &quot;ICR_OTHER bit added: 0x%x&quot;
e1000e_irq_pending_interrupts(uint32_t pending, uint32_t icr, uint32_t ims) &quot;ICR PENDING: 0x%x (ICR: 0x%x, IMS: 0x%x)&quot;
e1000e_irq_write_ics(uint32_t val) &quot;Adding ICR bits 0x%x&quot;
e1000e_irq_icr_process_iame(void) &quot;Clearing IMS bits due to IAME&quot;
e1000e_irq_read_ics(uint32_t ics) &quot;Current ICS: 0x%x&quot;
e1000e_irq_read_ims(uint32_t ims) &quot;Current IMS: 0x%x&quot;
e1000e_irq_icr_clear_nonmsix_icr_read(void) &quot;Clearing ICR on read due to non MSI-X int&quot;
e1000e_irq_icr_clear_zero_ims(void) &quot;Clearing ICR on read due to zero IMS&quot;
e1000e_irq_icr_clear_iame(void) &quot;Clearing ICR on read due to IAME&quot;
e1000e_irq_icr_clear_icr_bit_ims(uint32_t icr, uint32_t ims) &quot;Clearing ICR on read due corresponding IMS bit: 0x%x &amp; 0x%x&quot;
e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) &quot;Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X&quot;
e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) &quot;Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X&quot;
e1000e_irq_ims_clear_set_imc(uint32_t val) &quot;Clearing IMS bits due to IMC write 0x%x&quot;
e1000e_irq_fire_delayed_interrupts(void) &quot;Firing delayed interrupts&quot;
e1000e_irq_rearm_timer(uint32_t reg, int64_t delay_ns) &quot;Mitigation timer armed for register 0x%X, delay %&quot;PRId64&quot; ns&quot;
e1000e_irq_throttling_timer(uint32_t reg) &quot;Mitigation timer shot for register 0x%X&quot;
e1000e_irq_rdtr_fpd_running(void) &quot;FPD written while RDTR was running&quot;
e1000e_irq_rdtr_fpd_not_running(void) &quot;FPD written while RDTR was not running&quot;
e1000e_irq_tidv_fpd_running(void) &quot;FPD written while TIDV was running&quot;
e1000e_irq_tidv_fpd_not_running(void) &quot;FPD written while TIDV was not running&quot;
e1000e_irq_eitr_set(uint32_t eitr_num, uint32_t val) &quot;EITR[%u] = %u&quot;
e1000e_irq_itr_set(uint32_t val) &quot;ITR = %u&quot;
e1000e_irq_fire_all_timers(uint32_t val) &quot;Firing all delay/throttling timers on all interrupts enable (0x%X written to IMS)&quot;
e1000e_irq_msix_pending_clearing(uint32_t cause, uint32_t int_cfg, uint32_t vec) &quot;Clearing MSI-X pending bit for cause 0x%x, IVAR config 0x%x, vector %u&quot;

e1000e_wrn_msix_vec_wrong(uint32_t cause, uint32_t cfg) &quot;Invalid configuration for cause 0x%x: 0x%x&quot;
e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) &quot;Invalid entry for cause 0x%x: 0x%x&quot;

e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) &quot;Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x&quot;

e1000e_vm_state_running(void) &quot;VM state is running&quot;
e1000e_vm_state_stopped(void) &quot;VM state is stopped&quot;

# e1000e.c
e1000e_cb_pci_realize(void) &quot;E1000E PCI realize entry&quot;
e1000e_cb_pci_uninit(void) &quot;E1000E PCI unit entry&quot;
e1000e_cb_qdev_reset_hold(void) &quot;E1000E qdev reset hold&quot;
e1000e_cb_pre_save(void) &quot;E1000E pre save entry&quot;
e1000e_cb_post_load(void) &quot;E1000E post load entry&quot;

e1000e_io_write_addr(uint64_t addr) &quot;IOADDR write 0x%&quot;PRIx64
e1000e_io_write_data(uint64_t addr, uint64_t val) &quot;IODATA write 0x%&quot;PRIx64&quot;, value: 0x%&quot;PRIx64
e1000e_io_read_addr(uint64_t addr) &quot;IOADDR read 0x%&quot;PRIx64
e1000e_io_read_data(uint64_t addr, uint64_t val) &quot;IODATA read 0x%&quot;PRIx64&quot;, value: 0x%&quot;PRIx64
e1000e_wrn_io_write_unknown(uint64_t addr) &quot;IO write unknown address 0x%&quot;PRIx64
e1000e_wrn_io_read_unknown(uint64_t addr) &quot;IO read unknown address 0x%&quot;PRIx64
e1000e_wrn_io_addr_undefined(uint64_t addr) &quot;IO undefined register 0x%&quot;PRIx64
e1000e_wrn_io_addr_flash(uint64_t addr) &quot;IO flash access (0x%&quot;PRIx64&quot;) not implemented&quot;
e1000e_wrn_io_addr_unknown(uint64_t addr) &quot;IO unknown register 0x%&quot;PRIx64

e1000e_msi_init_fail(int32_t res) &quot;Failed to initialize MSI, error %d&quot;
e1000e_msix_init_fail(int32_t res) &quot;Failed to initialize MSI-X, error %d&quot;
e1000e_msix_use_vector_fail(uint32_t vec, int32_t res) &quot;Failed to use MSI-X vector %d, error %d&quot;

e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) &quot;Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x&quot;
e1000e_cfg_support_virtio(bool support) &quot;Virtio header supported: %d&quot;

# igb.c
igb_write_config(uint32_t address, uint32_t val, int len) &quot;CONFIG write 0x%&quot;PRIx32&quot;, value: 0x%&quot;PRIx32&quot;, len: %&quot;PRId32
igbvf_write_config(uint32_t address, uint32_t val, int len) &quot;CONFIG write 0x%&quot;PRIx32&quot;, value: 0x%&quot;PRIx32&quot;, len: %&quot;PRId32

# igb_core.c
igb_core_mdic_read(uint32_t addr, uint32_t data) &quot;MDIC READ: PHY[%u] = 0x%x&quot;
igb_core_mdic_read_unhandled(uint32_t addr) &quot;MDIC READ: PHY[%u] UNHANDLED&quot;
igb_core_mdic_write(uint32_t addr, uint32_t data) &quot;MDIC WRITE: PHY[%u] = 0x%x&quot;
igb_core_mdic_write_unhandled(uint32_t addr) &quot;MDIC WRITE: PHY[%u] UNHANDLED&quot;
igb_core_vf_reset(uint16_t vfn) &quot;VF%d&quot;

igb_link_set_ext_params(bool asd_check, bool speed_select_bypass, bool pfrstd) &quot;Set extended link params: ASD check: %d, Speed select bypass: %d, PF reset done: %d&quot;

igb_rx_desc_buff_size(uint32_t b) &quot;buffer size: %u&quot;
igb_rx_desc_buff_write(uint8_t idx, uint64_t addr, uint16_t offset, const void* source, uint32_t len) &quot;buffer %u, addr: 0x%&quot;PRIx64&quot;, offset: %u, from: %p, length: %u&quot;

igb_rx_metadata_rss(uint32_t rss, uint16_t rss_pkt_type) &quot;RSS data: rss: 0x%X, rss_pkt_type: 0x%X&quot;

igb_irq_icr_clear_gpie_nsicr(void) &quot;Clearing ICR on read due to GPIE.NSICR enabled&quot;
igb_irq_set_iam(uint32_t icr) &quot;Update IAM: 0x%x&quot;
igb_irq_read_iam(uint32_t icr) &quot;Current IAM: 0x%x&quot;
igb_irq_write_eics(uint32_t val, bool msix) &quot;Update EICS: 0x%x MSI-X: %d&quot;
igb_irq_write_eims(uint32_t val, bool msix) &quot;Update EIMS: 0x%x MSI-X: %d&quot;
igb_irq_write_eimc(uint32_t val, bool msix) &quot;Update EIMC: 0x%x MSI-X: %d&quot;
igb_irq_write_eiac(uint32_t val) &quot;Update EIAC: 0x%x&quot;
igb_irq_write_eiam(uint32_t val, bool msix) &quot;Update EIAM: 0x%x MSI-X: %d&quot;
igb_irq_write_eicr(uint32_t val, bool msix) &quot;Update EICR: 0x%x MSI-X: %d&quot;
igb_irq_eitr_set(uint32_t eitr_num, uint32_t val) &quot;EITR[%u] = 0x%x&quot;
igb_set_pfmailbox(uint32_t vf_num, uint32_t val) &quot;PFMailbox[%d]: 0x%x&quot;
igb_set_vfmailbox(uint32_t vf_num, uint32_t val) &quot;VFMailbox[%d]: 0x%x&quot;

igb_wrn_rx_desc_modes_not_supp(int desc_type) &quot;Not supported descriptor type: %d&quot;

# igbvf.c
igbvf_wrn_io_addr_unknown(uint64_t addr) &quot;IO unknown register 0x%&quot;PRIx64

# spapr_llan.c
spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) &quot;pool=%d count=%&quot;PRId32&quot; rxbufs=%&quot;PRIu32
spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) &quot;use_buf_ptr=%d bd=0x%016&quot;PRIx64
spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) &quot;ptr=%&quot;PRIu32&quot; rxbufs=%&quot;PRIu32
spapr_vlan_receive(const char *id, uint32_t rx_bufs) &quot;[%s] rx_bufs=%&quot;PRIu32
spapr_vlan_receive_dma_completed(void) &quot;DMA write completed&quot;
spapr_vlan_receive_wrote(uint64_t ptr, uint64_t hi, uint64_t lo) &quot;rxq entry (ptr=0x%&quot;PRIx64&quot;): 0x%016&quot;PRIx64&quot; 0x%016&quot;PRIx64
spapr_vlan_add_rxbuf_to_pool_create(int pool, uint64_t len) &quot;created RX pool %d for size %&quot;PRIu64
spapr_vlan_add_rxbuf_to_pool(int pool, uint64_t len, int32_t count) &quot;add buf using pool %d (size %&quot;PRIu64&quot;, count=%&quot;PRId32&quot;)&quot;
spapr_vlan_add_rxbuf_to_page(uint32_t ptr, uint32_t rx_bufs, uint64_t bd) &quot;added buf ptr=%&quot;PRIu32&quot;  rx_bufs=%&quot;PRIu32&quot; bd=0x%016&quot;PRIx64
spapr_vlan_h_add_logical_lan_buffer(uint64_t reg, uint64_t buf) &quot;H_ADD_LOGICAL_LAN_BUFFER(0x%&quot;PRIx64&quot;, 0x%&quot;PRIx64&quot;)&quot;
spapr_vlan_h_send_logical_lan(uint64_t reg, uint64_t continue_token) &quot;H_SEND_LOGICAL_LAN(0x%&quot;PRIx64&quot;, &lt;bufs&gt;, 0x%&quot;PRIx64&quot;)&quot;
spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) &quot;rxbufs = %&quot;PRIu32
spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) &quot;   buf desc: 0x%&quot;PRIx64
spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) &quot;%d buffers, total length 0x%x&quot;

# sungem.c
sungem_tx_checksum(uint16_t start, uint16_t off) &quot;TX checksumming from byte %d, inserting at %d&quot;
sungem_tx_checksum_oob(void) &quot;TX checksum out of packet bounds&quot;
sungem_tx_unfinished(void) &quot;TX packet started without finishing the previous one&quot;
sungem_tx_overflow(void) &quot;TX packet queue overflow&quot;
sungem_tx_finished(uint32_t size) &quot;TX completing %&quot;PRIu32 &quot; bytes packet&quot;
sungem_tx_kick(void) &quot;TX Kick...&quot;
sungem_tx_disabled(void) &quot;TX not enabled&quot;
sungem_tx_process(uint32_t comp, uint32_t kick, uint32_t size) &quot;TX processing comp=%&quot;PRIu32&quot;, kick=%&quot;PRIu32&quot; out of %&quot;PRIu32
sungem_tx_desc(uint32_t comp, uint64_t control, uint64_t buffer) &quot;TX desc %&quot;PRIu32 &quot;: 0x%&quot;PRIx64&quot; 0x%&quot;PRIx64
sungem_tx_reset(void) &quot;TX reset&quot;
sungem_rx_mac_disabled(void) &quot;Check RX MAC disabled&quot;
sungem_rx_txdma_disabled(void) &quot;Check RX TXDMA disabled&quot;
sungem_rx_check(bool full, uint32_t kick, uint32_t done) &quot;Check RX %d (kick=%&quot;PRIu32&quot;, done=%&quot;PRIu32&quot;)&quot;
sungem_rx_mac_check(uint32_t mac0, uint32_t mac1, uint32_t mac2) &quot;Word MAC: 0x%&quot;PRIx32&quot; 0x%&quot;PRIx32&quot; 0x%&quot;PRIx32
sungem_rx_mac_multicast(void) &quot;Multicast&quot;
sungem_rx_mac_compare(uint32_t mac0, uint32_t mac1, uint32_t mac2) &quot;Compare MAC to 0x%&quot;PRIx32&quot; 0x%&quot;PRIx32&quot; 0x%&quot;PRIx32&quot;..&quot;
sungem_rx_packet(size_t size) &quot;RX got %zu bytes packet&quot;
sungem_rx_disabled(void) &quot;RX not enabled&quot;
sungem_rx_bad_frame_size(size_t size) &quot;RX bad frame size %zu, dropped&quot;
sungem_rx_unmatched(void) &quot;No match, dropped&quot;
sungem_rx_process(uint32_t done, uint32_t kick, uint32_t size) &quot;RX processing done=%&quot;PRIu32&quot;, kick=%&quot;PRIu32&quot; out of %&quot;PRIu32
sungem_rx_ringfull(void) &quot;RX ring full&quot;
sungem_rx_desc(uint64_t control, uint64_t buffer) &quot;RX desc: 0x%&quot;PRIx64&quot; 0x%&quot;PRIx64
sungem_rx_reset(void) &quot;RX reset&quot;
sungem_rx_kick(uint64_t val) &quot;RXDMA_KICK written to %&quot;PRIu64
sungem_reset(bool pci_reset) &quot;Full reset (PCI:%d)&quot;
sungem_mii_write(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) &quot;MII write addr 0x%x reg 0x%02x val 0x%04x&quot;
sungem_mii_read(uint8_t phy_addr, uint8_t reg_addr, uint16_t val) &quot;MII read addr 0x%x reg 0x%02x val 0x%04x&quot;
sungem_mii_invalid_sof(uint32_t val) &quot;MII op, invalid SOF field 0x%&quot;PRIx32
sungem_mii_invalid_op(uint8_t op) &quot;MII op, invalid op field 0x%x&quot;
sungem_mmio_greg_write(uint64_t addr, uint64_t val) &quot;MMIO greg write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_greg_read(uint64_t addr, uint64_t val) &quot;MMIO greg read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_txdma_write(uint64_t addr, uint64_t val) &quot;MMIO txdma write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_txdma_read(uint64_t addr, uint64_t val) &quot;MMIO txdma read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_rxdma_write(uint64_t addr, uint64_t val) &quot;MMIO rxdma write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_rxdma_read(uint64_t addr, uint64_t val) &quot;MMIO rxdma read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_wol_write(uint64_t addr, uint64_t val) &quot;MMIO wol write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_wol_read(uint64_t addr, uint64_t val) &quot;MMIO wol read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_mac_write(uint64_t addr, uint64_t val) &quot;MMIO mac write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_mac_read(uint64_t addr, uint64_t val) &quot;MMIO mac read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_mif_write(uint64_t addr, uint64_t val) &quot;MMIO mif write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_mif_read(uint64_t addr, uint64_t val) &quot;MMIO mif read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_pcs_write(uint64_t addr, uint64_t val) &quot;MMIO pcs write to 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64
sungem_mmio_pcs_read(uint64_t addr, uint64_t val) &quot;MMIO pcs read from 0x%&quot;PRIx64&quot; val=0x%&quot;PRIx64

# sunhme.c
sunhme_seb_write(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_seb_read(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_etx_write(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_etx_read(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_erx_write(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_erx_read(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_mac_write(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_mac_read(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_mii_write(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_mii_read(uint8_t addr, uint16_t value) &quot;addr 0x%x value 0x%x&quot;
sunhme_mif_write(uint8_t addr, uint16_t value) &quot;addr 0x%x value 0x%x&quot;
sunhme_mif_read(uint64_t addr, uint64_t value) &quot;addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64
sunhme_tx_desc(uint64_t buffer, uint32_t status, int cr, int nr) &quot;addr 0x%&quot;PRIx64&quot; status 0x%&quot;PRIx32 &quot; (ring %d/%d)&quot;
sunhme_tx_xsum_add(int offset, int len) &quot;adding xsum at offset %d, len %d&quot;
sunhme_tx_xsum_stuff(uint16_t xsum, int offset) &quot;stuffing xsum 0x%x at offset %d&quot;
sunhme_tx_done(int len) &quot;successfully transmitted frame with len %d&quot;
sunhme_rx_incoming(size_t len) &quot;received incoming frame with len %zu&quot;
sunhme_rx_filter_destmac(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) &quot;received frame for MAC: %02x:%02x:%02x:%02x:%02x:%02x&quot;
sunhme_rx_filter_local_match(void) &quot;incoming frame matches local MAC address&quot;
sunhme_rx_filter_bcast_match(void) &quot;incoming frame matches broadcast MAC address&quot;
sunhme_rx_filter_hash_nomatch(void) &quot;incoming MAC address not in hash table&quot;
sunhme_rx_filter_hash_match(void) &quot;incoming MAC address found in hash table&quot;
sunhme_rx_filter_promisc_match(void) &quot;incoming frame accepted due to promiscuous mode&quot;
sunhme_rx_filter_reject(void) &quot;rejecting incoming frame&quot;
sunhme_rx_filter_accept(void) &quot;accepting incoming frame&quot;
sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) &quot;addr 0x%&quot;PRIx32&quot;(+0x%x) status 0x%&quot;PRIx32 &quot; len %d (ring %d/%d)&quot;
sunhme_rx_xsum_calc(uint16_t xsum) &quot;calculated incoming xsum as 0x%x&quot;
sunhme_rx_norxd(void) &quot;no free rx descriptors available&quot;
sunhme_update_irq(uint32_t mifmask, uint32_t mif, uint32_t sebmask, uint32_t seb, int level) &quot;mifmask: 0x%x  mif: 0x%x  sebmask: 0x%x  seb: 0x%x  level: %d&quot;

# virtio-net.c
virtio_net_announce_notify(void) &quot;&quot;
virtio_net_announce_timer(int round) &quot;%d&quot;
virtio_net_handle_announce(int round) &quot;%d&quot;
virtio_net_post_load_device(void)
virtio_net_rss_disable(void)
virtio_net_rss_error(const char *msg, uint32_t value) &quot;%s, value 0x%08x&quot;
virtio_net_rss_enable(uint32_t p1, uint16_t p2, uint8_t p3) &quot;hashes 0x%x, table of %d, key of %d&quot;

# tulip.c
tulip_reg_write(uint64_t addr, const char *name, int size, uint64_t val) &quot;addr 0x%02&quot;PRIx64&quot; (%s) size %d value 0x%08&quot;PRIx64
tulip_reg_read(uint64_t addr, const char *name, int size, uint64_t val) &quot;addr 0x%02&quot;PRIx64&quot; (%s) size %d value 0x%08&quot;PRIx64
tulip_receive(const uint8_t *buf, size_t len) &quot;buf %p size %zu&quot;
tulip_descriptor(const char *prefix, uint32_t addr, uint32_t status, uint32_t control, uint32_t len1, uint32_t len2, uint32_t buf1, uint32_t buf2) &quot;%s 0x%08x: status 0x%08x control 0x%03x len1 %4d len2 %4d buf1 0x%08x buf2 0x%08x&quot;
tulip_rx_state(const char *state) &quot;RX %s&quot;
tulip_tx_state(const char *state) &quot;TX %s&quot;
tulip_irq(uint32_t mask, uint32_t en, const char *state) &quot;mask 0x%08x ie 0x%08x %s&quot;
tulip_mii_write(int phy, int reg, uint16_t data) &quot;phy 0x%x reg 0x%x data 0x%04x&quot;
tulip_mii_read(int phy, int reg, uint16_t data) &quot;phy 0x%x, reg 0x%x data 0x%04x&quot;
tulip_reset(void) &quot;&quot;
tulip_setup_frame(void) &quot;&quot;
tulip_setup_filter(int n, uint8_t a, uint8_t b, uint8_t c, uint8_t d, uint8_t e, uint8_t f) &quot;%d: %02x:%02x:%02x:%02x:%02x:%02x&quot;

# lasi_i82596.c
lasi_82596_mem_readw(uint64_t addr, uint32_t ret) &quot;addr=0x%&quot;PRIx64&quot; val=0x%04x&quot;
lasi_82596_mem_writew(uint64_t addr, uint32_t val) &quot;addr=0x%&quot;PRIx64&quot; val=0x%04x&quot;

# i82596.c
i82596_s_reset(void *s) &quot;%p Reset chip&quot;
i82596_transmit(uint32_t size, uint32_t addr) &quot;size %u from addr 0x%04x&quot;
i82596_receive_analysis(const char *s) &quot;%s&quot;
i82596_receive_packet(size_t sz) &quot;len=%zu&quot;
i82596_new_mac(const char *id_with_mac) &quot;New MAC for: %s&quot;
i82596_set_multicast(uint16_t count) &quot;Added %d multicast entries&quot;
i82596_channel_attention(void *s) &quot;%p: Received CHANNEL ATTENTION&quot;

# imx_fec.c
imx_phy_read(uint32_t val, int phy, int reg) &quot;0x%04&quot;PRIx32&quot; &lt;= phy[%d].reg[%d]&quot;
imx_phy_read_num(int phy, int configured) &quot;read request from unconfigured phy %d (configured %d)&quot;
imx_phy_write(uint32_t val, int phy, int reg) &quot;0x%04&quot;PRIx32&quot; =&gt; phy[%d].reg[%d]&quot;
imx_phy_write_num(int phy, int configured) &quot;write request to unconfigured phy %d (configured %d)&quot;
imx_phy_update_link(const char *s) &quot;%s&quot;
imx_phy_reset(void) &quot;&quot;
imx_fec_read_bd(uint64_t addr, int flags, int len, int data) &quot;tx_bd 0x%&quot;PRIx64&quot; flags 0x%04x len %d data 0x%08x&quot;
imx_enet_read_bd(uint64_t addr, int flags, int len, int data, int options, int status) &quot;tx_bd 0x%&quot;PRIx64&quot; flags 0x%04x len %d data 0x%08x option 0x%04x status 0x%04x&quot;
imx_eth_tx_bd_busy(void) &quot;tx_bd ran out of descriptors to transmit&quot;
imx_eth_rx_bd_full(void) &quot;RX buffer is full&quot;
imx_eth_read(int reg, const char *reg_name, uint32_t value) &quot;reg[%d:%s] =&gt; 0x%08&quot;PRIx32
imx_eth_write(int reg, const char *reg_name, uint64_t value) &quot;reg[%d:%s] &lt;= 0x%08&quot;PRIx64
imx_fec_receive(size_t size) &quot;len %zu&quot;
imx_fec_receive_len(uint64_t addr, int len) &quot;rx_bd 0x%&quot;PRIx64&quot; length %d&quot;
imx_fec_receive_last(int last) &quot;rx frame flags 0x%04x&quot;
imx_enet_receive(size_t size) &quot;len %zu&quot;
imx_enet_receive_len(uint64_t addr, int len) &quot;rx_bd 0x%&quot;PRIx64&quot; length %d&quot;
imx_enet_receive_last(int last) &quot;rx frame flags 0x%04x&quot;

# npcm7xx_emc.c
npcm7xx_emc_reset(int emc_num) &quot;Resetting emc%d&quot;
npcm7xx_emc_update_tx_irq(int level) &quot;Setting tx irq to %d&quot;
npcm7xx_emc_update_rx_irq(int level) &quot;Setting rx irq to %d&quot;
npcm7xx_emc_set_mista(uint32_t flags) &quot;ORing 0x%x into MISTA&quot;
npcm7xx_emc_cpu_owned_desc(uint32_t addr) &quot;Can&#039;t process cpu-owned descriptor @0x%x&quot;
npcm7xx_emc_sent_packet(uint32_t len) &quot;Sent %u byte packet&quot;
npcm7xx_emc_tx_done(uint32_t ctxdsa) &quot;TX done, CTXDSA=0x%x&quot;
npcm7xx_emc_can_receive(int can_receive) &quot;Can receive: %d&quot;
npcm7xx_emc_packet_filtered_out(const char* fail_reason) &quot;Packet filtered out: %s&quot;
npcm7xx_emc_packet_dropped(uint32_t len) &quot;%u byte packet dropped&quot;
npcm7xx_emc_receiving_packet(uint32_t len) &quot;Receiving %u byte packet&quot;
npcm7xx_emc_received_packet(uint32_t len) &quot;Received %u byte packet&quot;
npcm7xx_emc_rx_done(uint32_t crxdsa) &quot;RX done, CRXDSA=0x%x&quot;
npcm7xx_emc_reg_read(int emc_num, uint32_t result, const char *name, int regno) &quot;emc%d: 0x%x = reg[%s/%d]&quot;
npcm7xx_emc_reg_write(int emc_num, const char *name, int regno, uint32_t value) &quot;emc%d: reg[%s/%d] = 0x%x&quot;

# dp8398x.c
dp8393x_raise_irq(int isr) &quot;raise irq, isr is 0x%04x&quot;
dp8393x_lower_irq(void) &quot;lower irq&quot;
dp8393x_load_cam(int idx, int cam0, int cam1, int cam2, int cam3, int cam4, int cam5) &quot;load cam[%d] with 0x%02x0x%02x0x%02x0x%02x0x%02x0x%02x&quot;
dp8393x_load_cam_done(int cen) &quot;load cam done. cam enable mask 0x%04x&quot;
dp8393x_read_rra_regs(int crba0, int crba1, int rbwc0, int rbwc1) &quot;CRBA0/1: 0x%04x/0x%04x, RBWC0/1: 0x%04x/0x%04x&quot;
dp8393x_transmit_packet(int ttda) &quot;Transmit packet at 0x%&quot;PRIx32
dp8393x_transmit_txlen_error(int len) &quot;tx_len is %d&quot;
dp8393x_read(int reg, const char *name, int val, int size) &quot;reg=0x%x [%s] val=0x%04x size=%d&quot;
dp8393x_write(int reg, const char *name, int val, int size) &quot;reg=0x%x [%s] val=0x%04x size=%d&quot;
dp8393x_write_invalid(int reg) &quot;writing to reg %d invalid&quot;
dp8393x_write_invalid_dcr(const char *name) &quot;writing to %s invalid&quot;
dp8393x_receive_oversize(int size) &quot;oversize packet, pkt_size is %d&quot;
dp8393x_receive_not_netcard(void) &quot;packet not for netcard&quot;
dp8393x_receive_packet(int crba) &quot;Receive packet at 0x%&quot;PRIx32
dp8393x_receive_write_status(int crba) &quot;Write status at 0x%&quot;PRIx32

# xen_nic.c
xen_netdev_realize(int dev, const char *info, const char *peer) &quot;vif%u info &#039;%s&#039; peer &#039;%s&#039;&quot;
xen_netdev_unrealize(int dev) &quot;vif%u&quot;
xen_netdev_create(int dev) &quot;vif%u&quot;
xen_netdev_destroy(int dev) &quot;vif%u&quot;
xen_netdev_disconnect(int dev) &quot;vif%u&quot;
xen_netdev_connect(int dev, unsigned int tx, unsigned int rx, int port) &quot;vif%u tx %u rx %u port %u&quot;
xen_netdev_frontend_changed(const char *dev, int state) &quot;vif%s state %d&quot;
xen_netdev_tx(int dev, int ref, int off, int len, unsigned int flags, const char *c, const char *d, const char *m, const char *e) &quot;vif%u ref %u off %u len %u flags 0x%x%s%s%s%s&quot;
xen_netdev_rx(int dev, int idx, int status, int flags) &quot;vif%u idx %d status %d flags 0x%x&quot;
# xlnx-zynqmp-can.c
xlnx_can_update_irq(uint32_t isr, uint32_t ier, uint32_t irq) &quot;ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x&quot;
xlnx_can_reset(uint32_t val) &quot;Resetting controller with value = 0x%08x&quot;
xlnx_can_rx_fifo_filter_reject(uint32_t id, uint8_t dlc) &quot;Frame: ID: 0x%08x DLC: 0x%02x&quot;
xlnx_can_filter_id_pre_write(uint8_t filter_num, uint32_t value) &quot;Filter%d ID: 0x%08x&quot;
xlnx_can_filter_mask_pre_write(uint8_t filter_num, uint32_t value) &quot;Filter%d MASK: 0x%08x&quot;
xlnx_can_tx_data(uint32_t id, uint8_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) &quot;Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x&quot;
xlnx_can_rx_data(uint32_t id, uint32_t dlc, uint8_t db0, uint8_t db1, uint8_t db2, uint8_t db3, uint8_t db4, uint8_t db5, uint8_t db6, uint8_t db7) &quot;Frame: ID: 0x%08x DLC: 0x%02x DATA: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x&quot;
xlnx_can_rx_discard(uint32_t status) &quot;Controller is not enabled for bus communication. Status Register: 0x%08x&quot;

# xlnx-versal-canfd.c
xlnx_canfd_update_irq(char *path, uint32_t isr, uint32_t ier, uint32_t irq) &quot;%s: ISR: 0x%08x IER: 0x%08x IRQ: 0x%08x&quot;
xlnx_canfd_rx_fifo_filter_reject(char *path, uint32_t id, uint8_t dlc) &quot;%s: Frame: ID: 0x%08x DLC: 0x%02x&quot;
xlnx_canfd_rx_data(char *path, uint32_t id, uint8_t dlc, uint8_t flags) &quot;%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x&quot;
xlnx_canfd_tx_data(char *path, uint32_t id, uint8_t dlc, uint8_t flgas) &quot;%s: Frame: ID: 0x%08x DLC: 0x%02x CANFD Flag: 0x%02x&quot;
xlnx_canfd_reset(char *path, uint32_t val) &quot;%s: Resetting controller with value = 0x%08x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# nubus-bus.c
nubus_slot_read(uint64_t addr, int size) &quot;reading unassigned addr 0x%&quot;PRIx64 &quot; size %d&quot;
nubus_slot_write(uint64_t addr, uint64_t val, int size) &quot;writing unassigned addr 0x%&quot;PRIx64 &quot; value 0x%&quot;PRIx64 &quot; size %d&quot;
nubus_super_slot_read(uint64_t addr, int size) &quot;reading unassigned addr 0x%&quot;PRIx64 &quot; size %d&quot;
nubus_super_slot_write(uint64_t addr, uint64_t val, int size) &quot;writing unassigned addr 0x%&quot;PRIx64 &quot; value 0x%&quot;PRIx64 &quot; size %d&quot;
# successful events
pci_nvme_irq_msix(uint32_t vector) &quot;raising MSI-X IRQ vector %u&quot;
pci_nvme_irq_pin(void) &quot;pulsing IRQ pin&quot;
pci_nvme_irq_masked(void) &quot;IRQ is masked&quot;
pci_nvme_dma_read(uint64_t prp1, uint64_t prp2) &quot;DMA read, prp1=0x%&quot;PRIx64&quot; prp2=0x%&quot;PRIx64&quot;&quot;
pci_nvme_dbbuf_config(uint64_t dbs_addr, uint64_t eis_addr) &quot;dbs_addr=0x%&quot;PRIx64&quot; eis_addr=0x%&quot;PRIx64&quot;&quot;
pci_nvme_map_addr(uint64_t addr, uint64_t len) &quot;addr 0x%&quot;PRIx64&quot; len %&quot;PRIu64&quot;&quot;
pci_nvme_map_addr_cmb(uint64_t addr, uint64_t len) &quot;addr 0x%&quot;PRIx64&quot; len %&quot;PRIu64&quot;&quot;
pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2, int num_prps) &quot;trans_len %&quot;PRIu64&quot; len %&quot;PRIu32&quot; prp1 0x%&quot;PRIx64&quot; prp2 0x%&quot;PRIx64&quot; num_prps %d&quot;
pci_nvme_map_sgl(uint8_t typ, uint64_t len) &quot;type 0x%&quot;PRIx8&quot; len %&quot;PRIu64&quot;&quot;
pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) &quot;cid %&quot;PRIu16&quot; nsid 0x%&quot;PRIx32&quot; sqid %&quot;PRIu16&quot; opc 0x%&quot;PRIx8&quot; opname &#039;%s&#039;&quot;
pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) &quot;cid %&quot;PRIu16&quot; sqid %&quot;PRIu16&quot; opc 0x%&quot;PRIx8&quot; opname &#039;%s&#039;&quot;
pci_nvme_flush_ns(uint32_t nsid) &quot;nsid 0x%&quot;PRIx32&quot;&quot;
pci_nvme_format_set(uint32_t nsid, uint8_t lbaf, uint8_t mset, uint8_t pi, uint8_t pil) &quot;nsid %&quot;PRIu32&quot; lbaf %&quot;PRIu8&quot; mset %&quot;PRIu8&quot; pi %&quot;PRIu8&quot; pil %&quot;PRIu8&quot;&quot;
pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) &quot;cid %&quot;PRIu16&quot; nsid %&quot;PRIu32&quot; nlb %&quot;PRIu32&quot; count %&quot;PRIu64&quot; lba 0x%&quot;PRIx64&quot;&quot;
pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) &quot;cid %&quot;PRIu16&quot; opname &#039;%s&#039; nsid %&quot;PRIu32&quot; nlb %&quot;PRIu32&quot; count %&quot;PRIu64&quot; lba 0x%&quot;PRIx64&quot;&quot;
pci_nvme_rw_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_misc_cb(uint16_t cid) &quot;cid %&quot;PRIu16&quot;&quot;
pci_nvme_dif_rw(uint8_t pract, uint8_t prinfo) &quot;pract 0x%&quot;PRIx8&quot; prinfo 0x%&quot;PRIx8&quot;&quot;
pci_nvme_dif_rw_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_dif_rw_mdata_in_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_dif_rw_mdata_out_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_dif_rw_check_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) &quot;cid %&quot;PRIu16&quot; prinfo 0x%&quot;PRIx8&quot; apptag 0x%&quot;PRIx16&quot; appmask 0x%&quot;PRIx16&quot; reftag 0x%&quot;PRIx32&quot;&quot;
pci_nvme_dif_pract_generate_dif_crc16(size_t len, size_t lba_size, size_t chksum_len, uint16_t apptag, uint32_t reftag) &quot;len %zu lba_size %zu chksum_len %zu apptag 0x%&quot;PRIx16&quot; reftag 0x%&quot;PRIx32&quot;&quot;
pci_nvme_dif_pract_generate_dif_crc64(size_t len, size_t lba_size, size_t chksum_len, uint16_t apptag, uint64_t reftag) &quot;len %zu lba_size %zu chksum_len %zu apptag 0x%&quot;PRIx16&quot; reftag 0x%&quot;PRIx64&quot;&quot;
pci_nvme_dif_check(uint8_t prinfo, uint16_t chksum_len) &quot;prinfo 0x%&quot;PRIx8&quot; chksum_len %&quot;PRIu16&quot;&quot;
pci_nvme_dif_prchk_disabled_crc16(uint16_t apptag, uint32_t reftag) &quot;apptag 0x%&quot;PRIx16&quot; reftag 0x%&quot;PRIx32&quot;&quot;
pci_nvme_dif_prchk_disabled_crc64(uint16_t apptag, uint64_t reftag) &quot;apptag 0x%&quot;PRIx16&quot; reftag 0x%&quot;PRIx64&quot;&quot;
pci_nvme_dif_prchk_guard_crc16(uint16_t guard, uint16_t crc) &quot;guard 0x%&quot;PRIx16&quot; crc 0x%&quot;PRIx16&quot;&quot;
pci_nvme_dif_prchk_guard_crc64(uint64_t guard, uint64_t crc) &quot;guard 0x%&quot;PRIx64&quot; crc 0x%&quot;PRIx64&quot;&quot;
pci_nvme_dif_prchk_apptag(uint16_t apptag, uint16_t elbat, uint16_t elbatm) &quot;apptag 0x%&quot;PRIx16&quot; elbat 0x%&quot;PRIx16&quot; elbatm 0x%&quot;PRIx16&quot;&quot;
pci_nvme_dif_prchk_reftag_crc16(uint32_t reftag, uint32_t elbrt) &quot;reftag 0x%&quot;PRIx32&quot; elbrt 0x%&quot;PRIx32&quot;&quot;
pci_nvme_dif_prchk_reftag_crc64(uint64_t reftag, uint64_t elbrt) &quot;reftag 0x%&quot;PRIx64&quot; elbrt 0x%&quot;PRIx64&quot;&quot;
pci_nvme_copy(uint16_t cid, uint32_t nsid, uint16_t nr, uint8_t format) &quot;cid %&quot;PRIu16&quot; nsid %&quot;PRIu32&quot; nr %&quot;PRIu16&quot; format 0x%&quot;PRIx8&quot;&quot;
pci_nvme_copy_source_range(uint64_t slba, uint32_t nlb) &quot;slba 0x%&quot;PRIx64&quot; nlb %&quot;PRIu32&quot;&quot;
pci_nvme_copy_out(uint64_t slba, uint32_t nlb) &quot;slba 0x%&quot;PRIx64&quot; nlb %&quot;PRIu32&quot;&quot;
pci_nvme_verify(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) &quot;cid %&quot;PRIu16&quot; nsid %&quot;PRIu32&quot; slba 0x%&quot;PRIx64&quot; nlb %&quot;PRIu32&quot;&quot;
pci_nvme_verify_mdata_in_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_verify_cb(uint16_t cid, uint8_t prinfo, uint16_t apptag, uint16_t appmask, uint32_t reftag) &quot;cid %&quot;PRIu16&quot; prinfo 0x%&quot;PRIx8&quot; apptag 0x%&quot;PRIx16&quot; appmask 0x%&quot;PRIx16&quot; reftag 0x%&quot;PRIx32&quot;&quot;
pci_nvme_rw_complete_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) &quot;offset %&quot;PRId64&quot; bytes %&quot;PRId64&quot; pnum %&quot;PRId64&quot; ret 0x%x zeroed %d&quot;
pci_nvme_dsm(uint32_t nr, uint32_t attr) &quot;nr %&quot;PRIu32&quot; attr 0x%&quot;PRIx32&quot;&quot;
pci_nvme_dsm_deallocate(uint64_t slba, uint32_t nlb) &quot;slba %&quot;PRIu64&quot; nlb %&quot;PRIu32&quot;&quot;
pci_nvme_dsm_single_range_limit_exceeded(uint32_t nlb, uint32_t dmrsl) &quot;nlb %&quot;PRIu32&quot; dmrsl %&quot;PRIu32&quot;&quot;
pci_nvme_compare(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) &quot;cid %&quot;PRIu16&quot; nsid %&quot;PRIu32&quot; slba 0x%&quot;PRIx64&quot; nlb %&quot;PRIu32&quot;&quot;
pci_nvme_compare_data_cb(uint16_t cid) &quot;cid %&quot;PRIu16&quot;&quot;
pci_nvme_compare_mdata_cb(uint16_t cid) &quot;cid %&quot;PRIu16&quot;&quot;
pci_nvme_aio_discard_cb(uint16_t cid) &quot;cid %&quot;PRIu16&quot;&quot;
pci_nvme_aio_copy_in_cb(uint16_t cid) &quot;cid %&quot;PRIu16&quot;&quot;
pci_nvme_aio_flush_cb(uint16_t cid, const char *blkname) &quot;cid %&quot;PRIu16&quot; blk &#039;%s&#039;&quot;
pci_nvme_create_sq(uint64_t addr, uint16_t sqid, uint16_t cqid, uint16_t qsize, uint16_t qflags) &quot;create submission queue, addr=0x%&quot;PRIx64&quot;, sqid=%&quot;PRIu16&quot;, cqid=%&quot;PRIu16&quot;, qsize=%&quot;PRIu16&quot;, qflags=%&quot;PRIu16&quot;&quot;
pci_nvme_create_cq(uint64_t addr, uint16_t cqid, uint16_t vector, uint16_t size, uint16_t qflags, int ien) &quot;create completion queue, addr=0x%&quot;PRIx64&quot;, cqid=%&quot;PRIu16&quot;, vector=%&quot;PRIu16&quot;, qsize=%&quot;PRIu16&quot;, qflags=%&quot;PRIu16&quot;, ien=%d&quot;
pci_nvme_del_sq(uint16_t qid) &quot;deleting submission queue sqid=%&quot;PRIu16&quot;&quot;
pci_nvme_del_cq(uint16_t cqid) &quot;deleted completion queue, cqid=%&quot;PRIu16&quot;&quot;
pci_nvme_identify(uint16_t cid, uint8_t cns, uint16_t ctrlid, uint8_t csi) &quot;cid %&quot;PRIu16&quot; cns 0x%&quot;PRIx8&quot; ctrlid %&quot;PRIu16&quot; csi 0x%&quot;PRIx8&quot;&quot;
pci_nvme_identify_ctrl(void) &quot;identify controller&quot;
pci_nvme_identify_ctrl_csi(uint8_t csi) &quot;identify controller, csi=0x%&quot;PRIx8&quot;&quot;
pci_nvme_identify_ns(uint32_t ns) &quot;nsid %&quot;PRIu32&quot;&quot;
pci_nvme_identify_ctrl_list(uint8_t cns, uint16_t cntid) &quot;cns 0x%&quot;PRIx8&quot; cntid %&quot;PRIu16&quot;&quot;
pci_nvme_identify_pri_ctrl_cap(uint16_t cntlid) &quot;identify primary controller capabilities cntlid=%&quot;PRIu16&quot;&quot;
pci_nvme_identify_sec_ctrl_list(uint16_t cntlid, uint8_t numcntl) &quot;identify secondary controller list cntlid=%&quot;PRIu16&quot; numcntl=%&quot;PRIu8&quot;&quot;
pci_nvme_identify_ns_csi(uint32_t ns, uint8_t csi) &quot;nsid=%&quot;PRIu32&quot;, csi=0x%&quot;PRIx8&quot;&quot;
pci_nvme_identify_nslist(uint32_t ns) &quot;nsid %&quot;PRIu32&quot;&quot;
pci_nvme_identify_nslist_csi(uint16_t ns, uint8_t csi) &quot;nsid=%&quot;PRIu16&quot;, csi=0x%&quot;PRIx8&quot;&quot;
pci_nvme_identify_cmd_set(void) &quot;identify i/o command set&quot;
pci_nvme_identify_ns_descr_list(uint32_t ns) &quot;nsid %&quot;PRIu32&quot;&quot;
pci_nvme_get_log(uint16_t cid, uint8_t lid, uint8_t lsp, uint8_t rae, uint32_t len, uint64_t off) &quot;cid %&quot;PRIu16&quot; lid 0x%&quot;PRIx8&quot; lsp 0x%&quot;PRIx8&quot; rae 0x%&quot;PRIx8&quot; len %&quot;PRIu32&quot; off %&quot;PRIu64&quot;&quot;
pci_nvme_getfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t sel, uint32_t cdw11) &quot;cid %&quot;PRIu16&quot; nsid 0x%&quot;PRIx32&quot; fid 0x%&quot;PRIx8&quot; sel 0x%&quot;PRIx8&quot; cdw11 0x%&quot;PRIx32&quot;&quot;
pci_nvme_setfeat(uint16_t cid, uint32_t nsid, uint8_t fid, uint8_t save, uint32_t cdw11) &quot;cid %&quot;PRIu16&quot; nsid 0x%&quot;PRIx32&quot; fid 0x%&quot;PRIx8&quot; save 0x%&quot;PRIx8&quot; cdw11 0x%&quot;PRIx32&quot;&quot;
pci_nvme_getfeat_vwcache(const char* result) &quot;get feature volatile write cache, result=%s&quot;
pci_nvme_getfeat_numq(int result) &quot;get feature number of queues, result=%d&quot;
pci_nvme_setfeat_numq(int reqcq, int reqsq, int gotcq, int gotsq) &quot;requested cq_count=%d sq_count=%d, responding with cq_count=%d sq_count=%d&quot;
pci_nvme_setfeat_timestamp(uint64_t ts) &quot;set feature timestamp = 0x%&quot;PRIx64&quot;&quot;
pci_nvme_getfeat_timestamp(uint64_t ts) &quot;get feature timestamp = 0x%&quot;PRIx64&quot;&quot;
pci_nvme_process_aers(int queued) &quot;queued %d&quot;
pci_nvme_aer(uint16_t cid) &quot;cid %&quot;PRIu16&quot;&quot;
pci_nvme_aer_aerl_exceeded(void) &quot;aerl exceeded&quot;
pci_nvme_aer_masked(uint8_t type, uint8_t mask) &quot;type 0x%&quot;PRIx8&quot; mask 0x%&quot;PRIx8&quot;&quot;
pci_nvme_aer_post_cqe(uint8_t typ, uint8_t info, uint8_t log_page) &quot;type 0x%&quot;PRIx8&quot; info 0x%&quot;PRIx8&quot; lid 0x%&quot;PRIx8&quot;&quot;
pci_nvme_ns_attachment(uint16_t cid, uint8_t sel) &quot;cid %&quot;PRIu16&quot;, sel=0x%&quot;PRIx8&quot;&quot;
pci_nvme_ns_attachment_attach(uint16_t cntlid, uint32_t nsid) &quot;cntlid=0x%&quot;PRIx16&quot;, nsid=0x%&quot;PRIx32&quot;&quot;
pci_nvme_enqueue_event(uint8_t typ, uint8_t info, uint8_t log_page) &quot;type 0x%&quot;PRIx8&quot; info 0x%&quot;PRIx8&quot; lid 0x%&quot;PRIx8&quot;&quot;
pci_nvme_enqueue_event_noqueue(int queued) &quot;queued %d&quot;
pci_nvme_enqueue_event_masked(uint8_t typ) &quot;type 0x%&quot;PRIx8&quot;&quot;
pci_nvme_no_outstanding_aers(void) &quot;ignoring event; no outstanding AERs&quot;
pci_nvme_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint32_t dw0, uint32_t dw1, uint16_t status) &quot;cid %&quot;PRIu16&quot; cqid %&quot;PRIu16&quot; dw0 0x%&quot;PRIx32&quot; dw1 0x%&quot;PRIx32&quot; status 0x%&quot;PRIx16&quot;&quot;
pci_nvme_update_cq_eventidx(uint16_t cqid, uint16_t new_eventidx) &quot;cqid %&quot;PRIu16&quot; new_eventidx %&quot;PRIu16&quot;&quot;
pci_nvme_update_sq_eventidx(uint16_t sqid, uint16_t new_eventidx) &quot;sqid %&quot;PRIu16&quot; new_eventidx %&quot;PRIu16&quot;&quot;
pci_nvme_mmio_read(uint64_t addr, unsigned size) &quot;addr 0x%&quot;PRIx64&quot; size %d&quot;
pci_nvme_mmio_write(uint64_t addr, uint64_t data, unsigned size) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64&quot; size %d&quot;
pci_nvme_mmio_doorbell_cq(uint16_t cqid, uint16_t new_head) &quot;cqid %&quot;PRIu16&quot; new_head %&quot;PRIu16&quot;&quot;
pci_nvme_mmio_doorbell_sq(uint16_t sqid, uint16_t new_tail) &quot;sqid %&quot;PRIu16&quot; new_tail %&quot;PRIu16&quot;&quot;
pci_nvme_mmio_intm_set(uint64_t data, uint64_t new_mask) &quot;wrote MMIO, interrupt mask set, data=0x%&quot;PRIx64&quot;, new_mask=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_intm_clr(uint64_t data, uint64_t new_mask) &quot;wrote MMIO, interrupt mask clr, data=0x%&quot;PRIx64&quot;, new_mask=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_cfg(uint64_t data) &quot;wrote MMIO, config controller config=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_aqattr(uint64_t data) &quot;wrote MMIO, admin queue attributes=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_asqaddr(uint64_t data) &quot;wrote MMIO, admin submission queue address=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_acqaddr(uint64_t data) &quot;wrote MMIO, admin completion queue address=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_asqaddr_hi(uint64_t data, uint64_t new_addr) &quot;wrote MMIO, admin submission queue high half=0x%&quot;PRIx64&quot;, new_address=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_acqaddr_hi(uint64_t data, uint64_t new_addr) &quot;wrote MMIO, admin completion queue high half=0x%&quot;PRIx64&quot;, new_address=0x%&quot;PRIx64&quot;&quot;
pci_nvme_mmio_start_success(void) &quot;setting controller enable bit succeeded&quot;
pci_nvme_mmio_stopped(void) &quot;cleared controller enable bit&quot;
pci_nvme_mmio_shutdown_set(void) &quot;shutdown bit set&quot;
pci_nvme_mmio_shutdown_cleared(void) &quot;shutdown bit cleared&quot;
pci_nvme_update_cq_head(uint16_t cqid, uint16_t new_head) &quot;cqid %&quot;PRIu16&quot; new_head %&quot;PRIu16&quot;&quot;
pci_nvme_update_sq_tail(uint16_t sqid, uint16_t new_tail) &quot;sqid %&quot;PRIu16&quot; new_tail %&quot;PRIu16&quot;&quot;
pci_nvme_open_zone(uint64_t slba, uint32_t zone_idx, int all) &quot;open zone, slba=%&quot;PRIu64&quot;, idx=%&quot;PRIu32&quot;, all=%&quot;PRIi32&quot;&quot;
pci_nvme_close_zone(uint64_t slba, uint32_t zone_idx, int all) &quot;close zone, slba=%&quot;PRIu64&quot;, idx=%&quot;PRIu32&quot;, all=%&quot;PRIi32&quot;&quot;
pci_nvme_finish_zone(uint64_t slba, uint32_t zone_idx, int all) &quot;finish zone, slba=%&quot;PRIu64&quot;, idx=%&quot;PRIu32&quot;, all=%&quot;PRIi32&quot;&quot;
pci_nvme_reset_zone(uint64_t slba, uint32_t zone_idx, int all) &quot;reset zone, slba=%&quot;PRIu64&quot;, idx=%&quot;PRIu32&quot;, all=%&quot;PRIi32&quot;&quot;
pci_nvme_zns_zone_reset(uint64_t zslba) &quot;zslba 0x%&quot;PRIx64&quot;&quot;
pci_nvme_offline_zone(uint64_t slba, uint32_t zone_idx, int all) &quot;offline zone, slba=%&quot;PRIu64&quot;, idx=%&quot;PRIu32&quot;, all=%&quot;PRIi32&quot;&quot;
pci_nvme_set_descriptor_extension(uint64_t slba, uint32_t zone_idx) &quot;set zone descriptor extension, slba=%&quot;PRIu64&quot;, idx=%&quot;PRIu32&quot;&quot;
pci_nvme_zd_extension_set(uint32_t zone_idx) &quot;set descriptor extension for zone_idx=%&quot;PRIu32&quot;&quot;
pci_nvme_clear_ns_close(uint32_t state, uint64_t slba) &quot;zone state=%&quot;PRIu32&quot;, slba=%&quot;PRIu64&quot; transitioned to Closed state&quot;
pci_nvme_clear_ns_reset(uint32_t state, uint64_t slba) &quot;zone state=%&quot;PRIu32&quot;, slba=%&quot;PRIu64&quot; transitioned to Empty state&quot;
pci_nvme_zoned_zrwa_implicit_flush(uint64_t zslba, uint32_t nlb) &quot;zslba 0x%&quot;PRIx64&quot; nlb %&quot;PRIu32&quot;&quot;
pci_nvme_pci_reset(void) &quot;PCI Function Level Reset&quot;
pci_nvme_virt_mngmt(uint16_t cid, uint16_t act, uint16_t cntlid, const char* rt, uint16_t nr) &quot;cid %&quot;PRIu16&quot;, act=0x%&quot;PRIx16&quot;, ctrlid=%&quot;PRIu16&quot; %s nr=%&quot;PRIu16&quot;&quot;
pci_nvme_fdp_ruh_change(uint16_t rgid, uint16_t ruhid) &quot;change RU on RUH rgid=%&quot;PRIu16&quot;, ruhid=%&quot;PRIu16&quot;&quot;

# error conditions
pci_nvme_err_mdts(size_t len) &quot;len %zu&quot;
pci_nvme_err_zasl(size_t len) &quot;len %zu&quot;
pci_nvme_err_req_status(uint16_t cid, uint32_t nsid, uint16_t status, uint8_t opc) &quot;cid %&quot;PRIu16&quot; nsid %&quot;PRIu32&quot; status 0x%&quot;PRIx16&quot; opc 0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_addr_read(uint64_t addr) &quot;addr 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_addr_write(uint64_t addr) &quot;addr 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_cfs(void) &quot;controller fatal status&quot;
pci_nvme_err_aio(uint16_t cid, const char *errname, uint16_t status) &quot;cid %&quot;PRIu16&quot; err &#039;%s&#039; status 0x%&quot;PRIx16&quot;&quot;
pci_nvme_err_copy_invalid_format(uint8_t format) &quot;format 0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_invalid_sgld(uint16_t cid, uint8_t typ) &quot;cid %&quot;PRIu16&quot; type 0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_invalid_num_sgld(uint16_t cid, uint8_t typ) &quot;cid %&quot;PRIu16&quot; type 0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_invalid_sgl_excess_length(uint32_t residual) &quot;residual %&quot;PRIu32&quot;&quot;
pci_nvme_err_invalid_dma(void) &quot;PRP/SGL is too small for transfer size&quot;
pci_nvme_err_invalid_prplist_ent(uint64_t prplist) &quot;PRP list entry is not page aligned: 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_invalid_prp2_align(uint64_t prp2) &quot;PRP2 is not page aligned: 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_invalid_opc(uint8_t opc) &quot;invalid opcode 0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_invalid_admin_opc(uint8_t opc) &quot;invalid admin opcode 0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) &quot;Invalid LBA start=%&quot;PRIu64&quot; len=%&quot;PRIu64&quot; limit=%&quot;PRIu64&quot;&quot;
pci_nvme_err_invalid_log_page_offset(uint64_t ofs, uint64_t size) &quot;must be &lt;= %&quot;PRIu64&quot;, got %&quot;PRIu64&quot;&quot;
pci_nvme_err_cmb_invalid_cba(uint64_t cmbmsc) &quot;cmbmsc 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_cmb_not_enabled(uint64_t cmbmsc) &quot;cmbmsc 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_unaligned_zone_cmd(uint8_t action, uint64_t slba, uint64_t zslba) &quot;unaligned zone op 0x%&quot;PRIx32&quot;, got slba=%&quot;PRIu64&quot;, zslba=%&quot;PRIu64&quot;&quot;
pci_nvme_err_invalid_zone_state_transition(uint8_t action, uint64_t slba, uint8_t attrs) &quot;action=0x%&quot;PRIx8&quot;, slba=%&quot;PRIu64&quot;, attrs=0x%&quot;PRIx32&quot;&quot;
pci_nvme_err_write_not_at_wp(uint64_t slba, uint64_t zone, uint64_t wp) &quot;writing at slba=%&quot;PRIu64&quot;, zone=%&quot;PRIu64&quot;, but wp=%&quot;PRIu64&quot;&quot;
pci_nvme_err_append_not_at_start(uint64_t slba, uint64_t zone) &quot;appending at slba=%&quot;PRIu64&quot;, but zone=%&quot;PRIu64&quot;&quot;
pci_nvme_err_zone_is_full(uint64_t zslba) &quot;zslba 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_zone_is_read_only(uint64_t zslba) &quot;zslba 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_zone_is_offline(uint64_t zslba) &quot;zslba 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_zone_boundary(uint64_t slba, uint32_t nlb, uint64_t zcap) &quot;lba 0x%&quot;PRIx64&quot; nlb %&quot;PRIu32&quot; zcap 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_zone_invalid_write(uint64_t slba, uint64_t wp) &quot;lba 0x%&quot;PRIx64&quot; wp 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_zone_write_not_ok(uint64_t slba, uint32_t nlb, uint16_t status) &quot;slba=%&quot;PRIu64&quot;, nlb=%&quot;PRIu32&quot;, status=0x%&quot;PRIx16&quot;&quot;
pci_nvme_err_zone_read_not_ok(uint64_t slba, uint32_t nlb, uint16_t status) &quot;slba=%&quot;PRIu64&quot;, nlb=%&quot;PRIu32&quot;, status=0x%&quot;PRIx16&quot;&quot;
pci_nvme_err_insuff_active_res(uint32_t max_active) &quot;max_active=%&quot;PRIu32&quot; zone limit exceeded&quot;
pci_nvme_err_insuff_open_res(uint32_t max_open) &quot;max_open=%&quot;PRIu32&quot; zone limit exceeded&quot;
pci_nvme_err_zd_extension_map_error(uint32_t zone_idx) &quot;can&#039;t map descriptor extension for zone_idx=%&quot;PRIu32&quot;&quot;
pci_nvme_err_invalid_iocsci(uint32_t idx) &quot;unsupported command set combination index %&quot;PRIu32&quot;&quot;
pci_nvme_err_invalid_del_sq(uint16_t qid) &quot;invalid submission queue deletion, sid=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_sq_cqid(uint16_t cqid) &quot;failed creating submission queue, invalid cqid=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_sq_sqid(uint16_t sqid) &quot;failed creating submission queue, invalid sqid=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_sq_size(uint16_t qsize) &quot;failed creating submission queue, invalid qsize=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_sq_addr(uint64_t addr) &quot;failed creating submission queue, addr=0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_invalid_create_sq_qflags(uint16_t qflags) &quot;failed creating submission queue, qflags=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_del_cq_cqid(uint16_t cqid) &quot;failed deleting completion queue, cqid=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_del_cq_notempty(uint16_t cqid) &quot;failed deleting completion queue, it is not empty, cqid=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_cq_cqid(uint16_t cqid) &quot;failed creating completion queue, cqid=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_cq_size(uint16_t size) &quot;failed creating completion queue, size=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_cq_addr(uint64_t addr) &quot;failed creating completion queue, addr=0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_invalid_create_cq_vector(uint16_t vector) &quot;failed creating completion queue, vector=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_cq_qflags(uint16_t qflags) &quot;failed creating completion queue, qflags=%&quot;PRIu16&quot;&quot;
pci_nvme_err_invalid_create_cq_entry_size(uint8_t iosqes, uint8_t iocqes) &quot;iosqes %&quot;PRIu8&quot; iocqes %&quot;PRIu8&quot;&quot;
pci_nvme_err_invalid_identify_cns(uint16_t cns) &quot;identify, invalid cns=0x%&quot;PRIx16&quot;&quot;
pci_nvme_err_invalid_getfeat(int dw10) &quot;invalid get features, dw10=0x%&quot;PRIx32&quot;&quot;
pci_nvme_err_invalid_setfeat(uint32_t dw10) &quot;invalid set features, dw10=0x%&quot;PRIx32&quot;&quot;
pci_nvme_err_invalid_log_page(uint16_t cid, uint16_t lid) &quot;cid %&quot;PRIu16&quot; lid 0x%&quot;PRIx16&quot;&quot;
pci_nvme_err_startfail_cq(void) &quot;nvme_start_ctrl failed because there are non-admin completion queues&quot;
pci_nvme_err_startfail_sq(void) &quot;nvme_start_ctrl failed because there are non-admin submission queues&quot;
pci_nvme_err_startfail_asq_misaligned(uint64_t addr) &quot;nvme_start_ctrl failed because the admin submission queue address is misaligned: 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_startfail_acq_misaligned(uint64_t addr) &quot;nvme_start_ctrl failed because the admin completion queue address is misaligned: 0x%&quot;PRIx64&quot;&quot;
pci_nvme_err_startfail_page_too_small(uint8_t log2ps, uint8_t maxlog2ps) &quot;nvme_start_ctrl failed because the page size is too small: log2size=%u, min=%u&quot;
pci_nvme_err_startfail_page_too_large(uint8_t log2ps, uint8_t maxlog2ps) &quot;nvme_start_ctrl failed because the page size is too large: log2size=%u, max=%u&quot;
pci_nvme_err_startfail_cqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) &quot;nvme_start_ctrl failed because the completion queue entry size is too small: log2size=%u, min=%u&quot;
pci_nvme_err_startfail_cqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) &quot;nvme_start_ctrl failed because the completion queue entry size is too large: log2size=%u, max=%u&quot;
pci_nvme_err_startfail_sqent_too_small(uint8_t log2ps, uint8_t maxlog2ps) &quot;nvme_start_ctrl failed because the submission queue entry size is too small: log2size=%u, min=%u&quot;
pci_nvme_err_startfail_sqent_too_large(uint8_t log2ps, uint8_t maxlog2ps) &quot;nvme_start_ctrl failed because the submission queue entry size is too large: log2size=%u, max=%u&quot;
pci_nvme_err_startfail_css(uint8_t css) &quot;nvme_start_ctrl failed because invalid command set selected:%u&quot;
pci_nvme_err_startfail_asqent_sz_zero(void) &quot;nvme_start_ctrl failed because the admin submission queue size is zero&quot;
pci_nvme_err_startfail_acqent_sz_zero(void) &quot;nvme_start_ctrl failed because the admin completion queue size is zero&quot;
pci_nvme_err_startfail_zasl_too_small(uint32_t zasl, uint32_t pagesz) &quot;nvme_start_ctrl failed because zone append size limit %&quot;PRIu32&quot; is too small, needs to be &gt;= %&quot;PRIu32&quot;&quot;
pci_nvme_err_startfail(void) &quot;setting controller enable bit failed&quot;
pci_nvme_err_startfail_virt_state(uint16_t vq, uint16_t vi) &quot;nvme_start_ctrl failed due to ctrl state: vi=%u vq=%u&quot;
pci_nvme_err_invalid_mgmt_action(uint8_t action) &quot;action=0x%&quot;PRIx8&quot;&quot;
pci_nvme_err_ignored_mmio_vf_offline(uint64_t addr, unsigned size) &quot;addr 0x%&quot;PRIx64&quot; size %d&quot;

# undefined behavior
pci_nvme_ub_mmiowr_misaligned32(uint64_t offset) &quot;MMIO write not 32-bit aligned, offset=0x%&quot;PRIx64&quot;&quot;
pci_nvme_ub_mmiowr_toosmall(uint64_t offset, unsigned size) &quot;MMIO write smaller than 32 bits, offset=0x%&quot;PRIx64&quot;, size=%u&quot;
pci_nvme_ub_mmiowr_intmask_with_msix(void) &quot;undefined access to interrupt mask set when MSI-X is enabled&quot;
pci_nvme_ub_mmiowr_ro_csts(void) &quot;attempted to set a read only bit of controller status&quot;
pci_nvme_ub_mmiowr_ssreset_w1c_unsupported(void) &quot;attempted to W1C CSTS.NSSRO but CAP.NSSRS is zero (not supported)&quot;
pci_nvme_ub_mmiowr_ssreset_unsupported(void) &quot;attempted NVM subsystem reset but CAP.NSSRS is zero (not supported)&quot;
pci_nvme_ub_mmiowr_cmbloc_reserved(void) &quot;invalid write to reserved CMBLOC when CMBSZ is zero, ignored&quot;
pci_nvme_ub_mmiowr_cmbsz_readonly(void) &quot;invalid write to read only CMBSZ, ignored&quot;
pci_nvme_ub_mmiowr_pmrcap_readonly(void) &quot;invalid write to read only PMRCAP, ignored&quot;
pci_nvme_ub_mmiowr_pmrsts_readonly(void) &quot;invalid write to read only PMRSTS, ignored&quot;
pci_nvme_ub_mmiowr_pmrebs_readonly(void) &quot;invalid write to read only PMREBS, ignored&quot;
pci_nvme_ub_mmiowr_pmrswtp_readonly(void) &quot;invalid write to read only PMRSWTP, ignored&quot;
pci_nvme_ub_mmiowr_invalid(uint64_t offset, uint64_t data) &quot;invalid MMIO write, offset=0x%&quot;PRIx64&quot;, data=0x%&quot;PRIx64&quot;&quot;
pci_nvme_ub_mmiord_misaligned32(uint64_t offset) &quot;MMIO read not 32-bit aligned, offset=0x%&quot;PRIx64&quot;&quot;
pci_nvme_ub_mmiord_toosmall(uint64_t offset) &quot;MMIO read smaller than 32-bits, offset=0x%&quot;PRIx64&quot;&quot;
pci_nvme_ub_mmiord_invalid_ofs(uint64_t offset) &quot;MMIO read beyond last register, offset=0x%&quot;PRIx64&quot;, returning 0&quot;
pci_nvme_ub_db_wr_misaligned(uint64_t offset) &quot;doorbell write not 32-bit aligned, offset=0x%&quot;PRIx64&quot;, ignoring&quot;
pci_nvme_ub_db_wr_invalid_cq(uint32_t qid) &quot;completion queue doorbell write for nonexistent queue, cqid=%&quot;PRIu32&quot;, ignoring&quot;
pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t new_head) &quot;completion queue doorbell write value beyond queue size, cqid=%&quot;PRIu32&quot;, new_head=%&quot;PRIu16&quot;, ignoring&quot;
pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) &quot;submission queue doorbell write for nonexistent queue, sqid=%&quot;PRIu32&quot;, ignoring&quot;
pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) &quot;submission queue doorbell write value beyond queue size, sqid=%&quot;PRIu32&quot;, new_head=%&quot;PRIu16&quot;, ignoring&quot;
pci_nvme_ub_unknown_css_value(void) &quot;unknown value in cc.css field&quot;
pci_nvme_ub_too_many_mappings(void) &quot;too many prp/sgl mappings&quot;
# See docs/devel/tracing.rst for syntax documentation.

# ds1225y.c
nvram_read(uint32_t addr, uint32_t ret) &quot;read addr %d: 0x%02x&quot;
nvram_write(uint32_t addr, uint32_t old, uint32_t val) &quot;write addr %d: 0x%02x -&gt; 0x%02x&quot;

# fw_cfg.c
fw_cfg_select(void *s, uint16_t key_value, const char *key_name, int ret) &quot;%p key 0x%04&quot; PRIx16 &quot; &#039;%s&#039;, ret: %d&quot;
fw_cfg_read(void *s, uint64_t ret) &quot;%p = 0x%&quot;PRIx64
fw_cfg_add_bytes(uint16_t key_value, const char *key_name, size_t len) &quot;key 0x%04&quot; PRIx16 &quot; &#039;%s&#039;, %zu bytes&quot;
fw_cfg_add_file(void *s, int index, char *name, size_t len) &quot;%p #%d: %s (%zd bytes)&quot;
fw_cfg_add_string(uint16_t key_value, const char *key_name, const char *value) &quot;key 0x%04&quot; PRIx16 &quot; &#039;%s&#039;, value &#039;%s&#039;&quot;
fw_cfg_add_i16(uint16_t key_value, const char *key_name, uint16_t value) &quot;key 0x%04&quot; PRIx16 &quot; &#039;%s&#039;, value 0x%&quot; PRIx16
fw_cfg_add_i32(uint16_t key_value, const char *key_name, uint32_t value) &quot;key 0x%04&quot; PRIx16 &quot; &#039;%s&#039;, value 0x%&quot; PRIx32
fw_cfg_add_i64(uint16_t key_value, const char *key_name, uint64_t value) &quot;key 0x%04&quot; PRIx16 &quot; &#039;%s&#039;, value 0x%&quot; PRIx64

# mac_nvram.c
macio_nvram_read(uint32_t addr, uint8_t val) &quot;read addr=0x%04&quot;PRIx32&quot; val=0x%02x&quot;
macio_nvram_write(uint32_t addr, uint8_t val) &quot;write addr=0x%04&quot;PRIx32&quot; val=0x%02x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# pci.c
pci_update_mappings_del(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) &quot;%s %02x:%02x.%x %d,0x%&quot;PRIx64&quot;+0x%&quot;PRIx64
pci_update_mappings_add(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) &quot;%s %02x:%02x.%x %d,0x%&quot;PRIx64&quot;+0x%&quot;PRIx64
pci_route_irq(int dev_irq, const char *dev_path, int parent_irq, const char *parent_path) &quot;IRQ %d @%s -&gt; IRQ %d @%s&quot;

# pci_host.c
pci_cfg_read(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) &quot;%s %02x:%02x.%x @0x%x -&gt; 0x%x&quot;
pci_cfg_write(const char *dev, uint32_t bus, uint32_t slot, uint32_t func, unsigned offs, unsigned val) &quot;%s %02x:%02x.%x @0x%x &lt;- 0x%x&quot;

# msix.c
msix_write_config(char *name, bool enabled, bool masked) &quot;dev %s enabled %d masked %d&quot;

# hw/pci/pcie_sriov.c
sriov_register_vfs(const char *name, int slot, int function, int num_vfs) &quot;%s %02x:%x: creating %d vf devs&quot;
sriov_unregister_vfs(const char *name, int slot, int function, int num_vfs) &quot;%s %02x:%x: Unregistering %d vf devs&quot;
sriov_config_write(const char *name, int slot, int fun, uint32_t offset, uint32_t val, uint32_t len) &quot;%s %02x:%x: sriov offset 0x%x val 0x%x len %d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# bonito.c
bonito_spciconf_small_access(uint64_t addr, unsigned size) &quot;PCI config address is smaller then 32-bit, addr: 0x%&quot;PRIx64&quot;, size: %u&quot;

# grackle.c
grackle_set_irq(int irq_num, int level) &quot;set_irq num %d level %d&quot;

# gt64120.c
gt64120_read(uint64_t addr, uint64_t value) &quot;gt64120 read 0x%03&quot;PRIx64&quot; value:0x%08&quot; PRIx64
gt64120_write(uint64_t addr, uint64_t value) &quot;gt64120 write 0x%03&quot;PRIx64&quot; value:0x%08&quot; PRIx64
gt64120_read_intreg(const char *regname, unsigned size, uint64_t value) &quot;gt64120 read %s size:%u value:0x%08&quot; PRIx64
gt64120_write_intreg(const char *regname, unsigned size, uint64_t value) &quot;gt64120 write %s size:%u value:0x%08&quot; PRIx64
gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_length, uint64_t to_addr) &quot;ISD: 0x%08&quot; PRIx64 &quot;@0x%08&quot; PRIx64 &quot; -&gt; 0x%08&quot; PRIx64 &quot;@0x%08&quot; PRIx64

# mv64361.c
mv64361_region_map(const char *name, uint64_t poffs, uint64_t size, uint64_t moffs) &quot;Mapping %s 0x%&quot;PRIx64&quot;+0x%&quot;PRIx64&quot; @ 0x%&quot;PRIx64
mv64361_region_enable(const char *op, int num) &quot;Should %s region %d&quot;
mv64361_reg_read(uint64_t addr, uint32_t val) &quot;0x%&quot;PRIx64&quot; -&gt; 0x%x&quot;
mv64361_reg_write(uint64_t addr, uint64_t val) &quot;0x%&quot;PRIx64&quot; &lt;- 0x%&quot;PRIx64

# sabre.c
sabre_set_request(int irq_num) &quot;request irq %d&quot;
sabre_clear_request(int irq_num) &quot;clear request irq %d&quot;
sabre_config_write(uint64_t addr, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%&quot;PRIx64
sabre_config_read(uint64_t addr, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%&quot;PRIx64
sabre_pci_config_write(uint64_t addr, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%&quot;PRIx64
sabre_pci_config_read(uint64_t addr, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%&quot;PRIx64
sabre_pci_set_irq(int irq_num, int level) &quot;set irq_in %d level %d&quot;
sabre_pci_set_obio_irq(int irq_num, int level) &quot;set irq %d level %d&quot;

# uninorth.c
unin_set_irq(int irq_num, int level) &quot;setting INT %d = %d&quot;
unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) &quot;converted config space accessor 0x%&quot;PRIx32 &quot;/0x%&quot;PRIx32 &quot; -&gt; 0x%&quot;PRIx32
unin_data_write(uint64_t addr, unsigned len, uint64_t val) &quot;write addr 0x%&quot;PRIx64 &quot; len %d val 0x%&quot;PRIx64
unin_data_read(uint64_t addr, unsigned len, uint64_t val) &quot;read addr 0x%&quot;PRIx64 &quot; len %d val 0x%&quot;PRIx64
unin_write(uint64_t addr, uint64_t value) &quot;addr=0x%&quot; PRIx64 &quot; val=0x%&quot;PRIx64
unin_read(uint64_t addr, uint64_t value) &quot;addr=0x%&quot; PRIx64 &quot; val=0x%&quot;PRIx64

# pnv_phb4.c
pnv_phb4_xive_notify(uint64_t notif_port, uint64_t data) &quot;notif=@0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64
pnv_phb4_xive_notify_ic(uint64_t addr, uint64_t data) &quot;addr=@0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64
pnv_phb4_xive_notify_abt(uint64_t notif_port, uint64_t data) &quot;notif=@0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64

# dino.c
dino_chip_mem_valid(uint64_t addr, uint32_t val) &quot;access to addr 0x%&quot;PRIx64&quot; is %d&quot;
dino_chip_read(uint64_t addr, uint32_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%08x&quot;
dino_chip_write(uint64_t addr, uint32_t val) &quot;addr 0x%&quot;PRIx64&quot; val 0x%08x&quot;

# astro.c
astro_chip_mem_valid(uint64_t addr, uint32_t val) &quot;access to addr 0x%&quot;PRIx64&quot; is %d&quot;
astro_chip_read(uint64_t addr, int size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
astro_chip_write(uint64_t addr, int size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
elroy_read(uint64_t addr, int size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
elroy_write(uint64_t addr, int size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
elroy_pci_config_data_read(uint64_t addr, int size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
elroy_pci_config_data_write(uint64_t addr, int size, uint64_t val) &quot;addr 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
iosapic_reg_write(uint64_t reg_select, int size, uint64_t val) &quot;reg_select 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
iosapic_reg_read(uint64_t reg_select, int size, uint64_t val) &quot;reg_select 0x%&quot;PRIx64&quot; size %d val 0x%&quot;PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# spapr_pci.c
spapr_pci_msi(const char *msg, uint32_t ca) &quot;%s (cfg=0x%x)&quot;
spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) &quot;dev\&quot;%s\&quot; vector %u, addr=0x%&quot;PRIx64
spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) &quot;cfgaddr 0x%x func %u, requested %u, first irq %u&quot;
spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) &quot;queries for #%u, IRQ%u&quot;
spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) &quot;@0x%&quot;PRIx64&quot;&lt;=0x%&quot;PRIx64&quot; IRQ %u&quot;
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) &quot;%s PIN%d IRQ %u&quot;
spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) &quot;Guest device at 0x%x asked %u, have only %u&quot;

# spapr_hcall.c
spapr_cas_continue(unsigned long n) &quot;Copy changes to the guest: %ld bytes&quot;
spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) &quot;current=0x%x, explicit_match=%u, new=0x%x&quot;
spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) &quot;flags=0x%&quot;PRIx64&quot;, shift=%&quot;PRIu64
spapr_h_resize_hpt_commit(uint64_t flags, uint64_t shift) &quot;flags=0x%&quot;PRIx64&quot;, shift=%&quot;PRIu64
spapr_update_dt(unsigned cb) &quot;New blob %u bytes&quot;
spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) &quot;Old blob %u bytes, new blob %u bytes, magic 0x%x&quot;
spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) &quot;Old blob %u bytes, new blob %u bytes, magic 0x%x&quot;

# spapr_tpm_proxy.c
spapr_h_tpm_comm(const char *device_path, uint64_t operation) &quot;tpm_device_path=%s operation=0x%&quot;PRIx64
spapr_tpm_execute(uint64_t data_in, uint64_t data_in_sz, uint64_t data_out, uint64_t data_out_sz) &quot;data_in=0x%&quot;PRIx64&quot;, data_in_sz=%&quot;PRIu64&quot;, data_out=0x%&quot;PRIx64&quot;, data_out_sz=%&quot;PRIu64

# spapr_iommu.c
spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; tce=0x%&quot;PRIx64&quot; ret=%&quot;PRId64
spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; ret=%&quot;PRId64&quot; tce=0x%&quot;PRIx64
spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; tcelist=0x%&quot;PRIx64&quot; iobaN=0x%&quot;PRIx64&quot; tceN=0x%&quot;PRIx64&quot; ret=%&quot;PRId64
spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; tcevalue=0x%&quot;PRIx64&quot; npages=%&quot;PRId64&quot; ret=%&quot;PRId64
spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; tce=0x%&quot;PRIx64&quot; ret=%&quot;PRId64
spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; ret=%&quot;PRId64&quot; tce=0x%&quot;PRIx64
spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; tcelist=0x%&quot;PRIx64&quot; iobaN=0x%&quot;PRIx64&quot; tceN=0x%&quot;PRIx64&quot; ret=%&quot;PRId64
spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) &quot;liobn=0x%&quot;PRIx64&quot; ioba=0x%&quot;PRIx64&quot; tcevalue=0x%&quot;PRIx64&quot; npages=%&quot;PRId64&quot; ret=%&quot;PRId64
spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) &quot;liobn=0x%&quot;PRIx64&quot; 0x%&quot;PRIx64&quot; -&gt; 0x%&quot;PRIx64&quot; perm=%u mask=0x%x&quot;
spapr_iommu_new_table(uint64_t liobn, void *table, int fd) &quot;liobn=0x%&quot;PRIx64&quot; table=%p fd=%d&quot;
spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) &quot;liobn=%&quot;PRIx64&quot; %&quot;PRIx32&quot; bus_offset=0x%&quot;PRIx64&quot; ps=%&quot;PRIu32
spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) &quot;liobn=%&quot;PRIx64&quot; %&quot;PRIx32&quot; =&gt; 0x%&quot;PRIx32&quot; bus_offset=0x%&quot;PRIx64&quot; ps=%&quot;PRIu32

# spapr_rtas_ddw.c
spapr_iommu_ddw_query(uint64_t buid, uint32_t cfgaddr, unsigned wa, uint64_t win_size, uint32_t pgmask) &quot;buid=0x%&quot;PRIx64&quot; addr=0x%&quot;PRIx32&quot;, %u windows available, max window size=0x%&quot;PRIx64&quot;, mask=0x%&quot;PRIx32
spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, uint64_t req_size, uint64_t start, uint32_t liobn) &quot;buid=0x%&quot;PRIx64&quot; addr=0x%&quot;PRIx32&quot;, page size=0x%&quot;PRIx64&quot;, requested=0x%&quot;PRIx64&quot;, start addr=0x%&quot;PRIx64&quot;, liobn=0x%&quot;PRIx32
spapr_iommu_ddw_remove(uint32_t liobn) &quot;liobn=0x%&quot;PRIx32
spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) &quot;buid=0x%&quot;PRIx64&quot; addr=0x%&quot;PRIx32

# spapr_drc.c
spapr_drc_set_isolation_state(uint32_t index, int state) &quot;drc: 0x%&quot;PRIx32&quot;, state: 0x%&quot;PRIx32
spapr_drc_set_isolation_state_finalizing(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_set_dr_indicator(uint32_t index, int state) &quot;drc: 0x%&quot;PRIx32&quot;, state: 0x%x&quot;
spapr_drc_set_allocation_state(uint32_t index, int state) &quot;drc: 0x%&quot;PRIx32&quot;, state: 0x%x&quot;
spapr_drc_set_allocation_state_finalizing(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_set_configured(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_attach(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_unplug_request(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_awaiting_quiesce(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_reset(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_realize(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_realize_child(uint32_t index, const char *childname) &quot;drc: 0x%&quot;PRIx32&quot;, child name: %s&quot;
spapr_drc_realize_complete(uint32_t index) &quot;drc: 0x%&quot;PRIx32
spapr_drc_unrealize(uint32_t index) &quot;drc: 0x%&quot;PRIx32

# spapr_ovec.c
spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t entry) &quot;read guest vector %2d, byte %3d / %3d: 0x%.2x&quot;
spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) &quot;encoding guest vector byte %3d / %3d: 0x%.2x&quot;

# spapr_drc.c
spapr_rtas_get_sensor_state_not_supported(uint32_t index, uint32_t type) &quot;sensor index: 0x%&quot;PRIx32&quot;, type: %&quot;PRIu32
spapr_rtas_get_sensor_state_invalid(uint32_t index) &quot;sensor index: 0x%&quot;PRIx32
spapr_rtas_ibm_configure_connector_invalid(uint32_t index) &quot;DRC index: 0x%&quot;PRIx32

# spapr_vio.c
spapr_vio_h_reg_crq(uint64_t reg, uint64_t queue_addr, uint64_t queue_len) &quot;CRQ for dev 0x%&quot; PRIx64 &quot; registered at 0x%&quot; PRIx64 &quot;/0x%&quot; PRIx64
spapr_vio_free_crq(uint32_t reg) &quot;CRQ for dev 0x%&quot; PRIx32 &quot; freed&quot;

# vof.c
vof_error_str_truncated(const char *s, int len) &quot;%s truncated to %d&quot;
vof_error_param(const char *method, int nargscheck, int nretcheck, int nargs, int nret) &quot;%s takes/returns %d/%d, not %d/%d&quot;
vof_error_unknown_service(const char *service, int nargs, int nret) &quot;\&quot;%s\&quot; args=%d rets=%d&quot;
vof_error_unknown_method(const char *method) &quot;\&quot;%s\&quot;&quot;
vof_error_unknown_ihandle_close(uint32_t ih) &quot;ih=0x%x&quot;
vof_error_unknown_path(const char *path) &quot;\&quot;%s\&quot;&quot;
vof_error_write(uint32_t ih) &quot;ih=0x%x&quot;
vof_finddevice(const char *path, uint32_t ph) &quot;\&quot;%s\&quot; =&gt; ph=0x%x&quot;
vof_claim(uint32_t virt, uint32_t size, uint32_t align, uint32_t ret) &quot;virt=0x%x size=0x%x align=0x%x =&gt; 0x%x&quot;
vof_release(uint32_t virt, uint32_t size, uint32_t ret) &quot;virt=0x%x size=0x%x =&gt; 0x%x&quot;
vof_method(uint32_t ihandle, const char *method, uint32_t param, uint32_t ret, uint32_t ret2) &quot;ih=0x%x \&quot;%s\&quot;(0x%x) =&gt; 0x%x 0x%x&quot;
vof_getprop(uint32_t ph, const char *prop, uint32_t ret, const char *val) &quot;ph=0x%x \&quot;%s\&quot; =&gt; len=%d [%s]&quot;
vof_getproplen(uint32_t ph, const char *prop, uint32_t ret) &quot;ph=0x%x \&quot;%s\&quot; =&gt; len=%d&quot;
vof_setprop(uint32_t ph, const char *prop, const char *val, uint32_t vallen, uint32_t ret) &quot;ph=0x%x \&quot;%s\&quot; [%s] len=%d =&gt; ret=%d&quot;
vof_open(const char *path, uint32_t ph, uint32_t ih) &quot;%s ph=0x%x =&gt; ih=0x%x&quot;
vof_interpret(const char *cmd, uint32_t param1, uint32_t param2, uint32_t ret, uint32_t ret2) &quot;[%s] 0x%x 0x%x =&gt; 0x%x 0x%x&quot;
vof_package_to_path(uint32_t ph, const char *tmp, int ret) &quot;ph=0x%x =&gt; %s len=%d&quot;
vof_instance_to_path(uint32_t ih, uint32_t ph, const char *tmp, int ret) &quot;ih=0x%x ph=0x%x =&gt; %s len=%d&quot;
vof_instance_to_package(uint32_t ih, uint32_t ph) &quot;ih=0x%x =&gt; ph=0x%x&quot;
vof_write(uint32_t ih, unsigned cb, const char *msg) &quot;ih=0x%x [%u] \&quot;%s\&quot;&quot;
vof_avail(uint64_t start, uint64_t end, uint64_t size) &quot;0x%&quot;PRIx64&quot;..0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64
vof_claimed(uint64_t start, uint64_t end, uint64_t size) &quot;0x%&quot;PRIx64&quot;..0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64

# pnv_sbe.c
pnv_sbe_xscom_ctrl_read(uint64_t addr, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; val 0x%&quot; PRIx64
pnv_sbe_xscom_ctrl_write(uint64_t addr, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; val 0x%&quot; PRIx64
pnv_sbe_xscom_mbox_read(uint64_t addr, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; val 0x%&quot; PRIx64
pnv_sbe_xscom_mbox_write(uint64_t addr, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; val 0x%&quot; PRIx64
pnv_sbe_reg_set_host_doorbell(uint64_t val) &quot;val 0x%&quot; PRIx64
pnv_sbe_cmd_timer_start(uint64_t ns) &quot;ns 0x%&quot; PRIu64
pnv_sbe_cmd_timer_stop(void) &quot;&quot;
pnv_sbe_cmd_timer_expired(void) &quot;&quot;
pnv_sbe_msg_recv(uint16_t cmd, uint16_t seq, uint16_t ctrl_flags) &quot;cmd 0x%&quot; PRIx16 &quot; seq %&quot;PRIu16 &quot; ctrl_flags 0x%&quot; PRIx16

# ppc.c
ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) &quot;adjusted from 0x%&quot;PRIx64&quot; to 0x%&quot;PRIx64&quot;, diff %&quot;PRId64&quot; (%&quot;PRId64&quot;s)&quot;
ppc_tb_load(uint64_t tb) &quot;tb 0x%016&quot; PRIx64
ppc_tb_store(uint64_t tb, uint64_t offset) &quot;tb 0x%016&quot; PRIx64 &quot; offset 0x%08&quot; PRIx64

ppc_decr_load(uint64_t tb) &quot;decr 0x%016&quot; PRIx64
ppc_decr_excp(const char *action) &quot;%s decrementer&quot;
ppc_decr_store(uint32_t nr_bits, uint64_t decr, uint64_t value) &quot;%d-bit 0x%016&quot; PRIx64 &quot; =&gt; 0x%016&quot; PRIx64

ppc4xx_fit(uint32_t ir, uint64_t tcr, uint64_t tsr) &quot;ir %d TCR 0x%&quot; PRIx64 &quot; TSR 0x%&quot; PRIx64
ppc4xx_pit_stop(void) &quot;&quot;
ppc4xx_pit_start(uint64_t reload) &quot;PIT 0x%016&quot; PRIx64
ppc4xx_pit(uint32_t ar, uint32_t ir, uint64_t tcr, uint64_t tsr, uint64_t reload) &quot;ar %d ir %d TCR 0x%&quot; PRIx64 &quot; TSR 0x%&quot; PRIx64 &quot; PIT 0x%016&quot; PRIx64
ppc4xx_wdt(uint64_t tcr, uint64_t tsr) &quot;TCR 0x%&quot; PRIx64 &quot; TSR 0x%&quot; PRIx64
ppc40x_store_pit(uint64_t value) &quot;val 0x%&quot; PRIx64
ppc40x_store_tcr(uint64_t value) &quot;val 0x%&quot; PRIx64
ppc40x_store_tsr(uint64_t value) &quot;val 0x%&quot; PRIx64
ppc40x_set_tb_clk(uint32_t value) &quot;new frequency %&quot; PRIu32
ppc40x_timers_init(uint32_t value) &quot;frequency %&quot; PRIu32

ppc_irq_set(void *env, uint32_t pin, uint32_t level) &quot;env [%p] pin %d level %d&quot;
ppc_irq_set_exit(void *env, uint32_t irq, uint32_t level, uint32_t pending, uint32_t request) &quot;env [%p] irq 0x%05&quot; PRIx32 &quot; level %d =&gt; pending 0x%08&quot; PRIx32 &quot; req 0x%08&quot; PRIx32
ppc_irq_set_state(const char *name, uint32_t level) &quot;\&quot;%s\&quot; level %d&quot;
ppc_irq_reset(const char *name) &quot;%s&quot;
ppc_irq_cpu(const char *action) &quot;%s&quot;

ppc_dcr_read(uint32_t addr, uint32_t val) &quot;DRCN[0x%x] -&gt; 0x%x&quot;
ppc_dcr_write(uint32_t addr, uint32_t val) &quot;DRCN[0x%x] &lt;- 0x%x&quot;

# prep_systemio.c
prep_systemio_read(uint32_t addr, uint32_t val) &quot;read addr=0x%x val=0x%x&quot;
prep_systemio_write(uint32_t addr, uint32_t val) &quot;write addr=0x%x val=0x%x&quot;

# rs6000_mc.c
rs6000mc_id_read(uint32_t addr, uint32_t val) &quot;read addr=0x%x val=0x%x&quot;
rs6000mc_presence_read(uint32_t addr, uint32_t val) &quot;read addr=0x%x val=0x%x&quot;
rs6000mc_size_read(uint32_t addr, uint32_t val) &quot;read addr=0x%x val=0x%x&quot;
rs6000mc_size_write(uint32_t addr, uint32_t val) &quot;write addr=0x%x val=0x%x&quot;
rs6000mc_parity_read(uint32_t addr, uint32_t val) &quot;read addr=0x%x val=0x%x&quot;

# ppc4xx_pci.c
ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) &quot;devfn 0x%x irq %d -&gt; %d&quot;
ppc4xx_pci_set_irq(int irq_num) &quot;PCI irq %d&quot;

# ppc440_pcix.c
ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) &quot;devfn 0x%x irq %d -&gt; %d&quot;
ppc440_pcix_set_irq(int irq_num) &quot;PCI irq %d&quot;
ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) &quot;Added window %d of size=0x%&quot; PRIx64 &quot; to CPU=0x%&quot; PRIx64
ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) &quot;Added window %d of size=0x%x from CPU=0x%&quot; PRIx64 &quot; to PCI=0x%&quot; PRIx64
ppc440_pcix_reg_read(uint64_t addr, uint32_t val) &quot;addr 0x%&quot; PRIx64 &quot; = 0x%&quot; PRIx32
ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) &quot;addr 0x%&quot; PRIx64 &quot; = 0x%&quot; PRIx32 &quot; size 0x%&quot; PRIx32

# ppc405_boards.c
opba_readb(uint64_t addr, uint32_t val) &quot;addr 0x%&quot; PRIx64 &quot; = 0x%&quot; PRIx32
opba_writeb(uint64_t addr, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; = 0x%&quot; PRIx64

ppc405_gpio_read(uint64_t addr, uint32_t size) &quot;addr 0x%&quot; PRIx64 &quot; size %d&quot;
ppc405_gpio_write(uint64_t addr, uint32_t size, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; size %d = 0x%&quot; PRIx64

ocm_update_mappings(uint32_t isarc, uint32_t isacntl, uint32_t dsarc, uint32_t dsacntl, uint32_t ocm_isarc, uint32_t ocm_isacntl, uint32_t ocm_dsarc, uint32_t ocm_dsacntl) &quot;OCM update ISA 0x%08&quot; PRIx32 &quot; 0x%08&quot; PRIx32 &quot; (0x%08&quot; PRIx32&quot; 0x%08&quot; PRIx32 &quot;) DSA 0x%08&quot; PRIx32 &quot; 0x%08&quot; PRIx32&quot; (0x%08&quot; PRIx32 &quot; 0x%08&quot; PRIx32 &quot;)&quot;
ocm_map(const char* prefix, uint32_t isarc) &quot;OCM map %s 0x%08&quot; PRIx32
ocm_unmap(const char* prefix, uint32_t isarc) &quot;OCM unmap %s 0x%08&quot; PRIx32

ppc4xx_gpt_read(uint64_t addr, uint32_t size) &quot;addr 0x%&quot; PRIx64 &quot; size %d&quot;
ppc4xx_gpt_write(uint64_t addr, uint32_t size, uint64_t val) &quot;addr 0x%&quot; PRIx64 &quot; size %d = 0x%&quot; PRIx64

ppc405ep_clocks_compute(const char *param, uint32_t param2, uint32_t val) &quot;%s 0x%1&quot; PRIx32 &quot; %d&quot;
ppc405ep_clocks_setup(const char *trace) &quot;%s&quot;

# ppc4xx_devs.c
ppc4xx_sdram_enable(const char *trace) &quot;%s SDRAM controller&quot;
ppc4xx_sdram_unmap(uint64_t addr, uint64_t size) &quot;Unmap RAM area 0x%&quot; PRIx64 &quot; size 0x%&quot; PRIx64
ppc4xx_sdram_map(uint64_t addr, uint64_t size) &quot;Map RAM area 0x%&quot; PRIx64 &quot; size 0x%&quot; PRIx64
ppc4xx_sdram_init(uint64_t base, uint64_t size, uint32_t bcr) &quot;Init RAM area 0x%&quot; PRIx64 &quot; size 0x%&quot; PRIx64 &quot; bcr 0x%x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# rdma_backend.c
rdma_check_dev_attr(const char *name, int max_bk, int max_fe) &quot;%s: be=%d, fe=%d&quot;
rdma_create_ah_cache_hit(uint64_t subnet, uint64_t if_id) &quot;subnet=0x%&quot;PRIx64&quot;,if_id=0x%&quot;PRIx64
rdma_create_ah_cache_miss(uint64_t subnet, uint64_t if_id) &quot;subnet=0x%&quot;PRIx64&quot;,if_id=0x%&quot;PRIx64
rdma_poll_cq(int ne, void *ibcq) &quot;Got %d completion(s) from cq %p&quot;
rdmacm_mux(const char *title, int msg_type, int op_code) &quot;%s: msg_type=%d, op_code=%d&quot;
rdmacm_mux_check_op_status(int msg_type, int op_code, int err_code) &quot;resp: msg_type=%d, op_code=%d, err_code=%d&quot;
rdma_mad_message(const char *title, int len, char *data) &quot;mad %s (%d): %s&quot;
rdma_backend_rc_qp_state_init(uint32_t qpn) &quot;RC QP 0x%x switch to INIT&quot;
rdma_backend_ud_qp_state_init(uint32_t qpn, uint32_t qkey) &quot;UD QP 0x%x switch to INIT, qkey=0x%x&quot;
rdma_backend_rc_qp_state_rtr(uint32_t qpn, uint64_t subnet, uint64_t ifid, uint8_t sgid_idx, uint32_t dqpn, uint32_t rq_psn) &quot;RC QP 0x%x switch to RTR, subnet = 0x%&quot;PRIx64&quot;, ifid = 0x%&quot;PRIx64 &quot;, sgid_idx=%d, dqpn=0x%x, rq_psn=0x%x&quot;
rdma_backend_ud_qp_state_rtr(uint32_t qpn, uint32_t qkey) &quot;UD QP 0x%x switch to RTR, qkey=0x%x&quot;
rdma_backend_rc_qp_state_rts(uint32_t qpn, uint32_t sq_psn) &quot;RC QP 0x%x switch to RTS, sq_psn=0x%x, &quot;
rdma_backend_ud_qp_state_rts(uint32_t qpn, uint32_t sq_psn, uint32_t qkey) &quot;UD QP 0x%x switch to RTS, sq_psn=0x%x, qkey=0x%x&quot;
rdma_backend_get_gid_index(uint64_t subnet, uint64_t ifid, int gid_idx) &quot;subnet=0x%&quot;PRIx64&quot;, ifid=0x%&quot;PRIx64 &quot;, gid_idx=%d&quot;
rdma_backend_gid_change(const char *op, uint64_t subnet, uint64_t ifid) &quot;%s subnet=0x%&quot;PRIx64&quot;, ifid=0x%&quot;PRIx64

# rdma_rm.c
rdma_res_tbl_get(char *name, uint32_t handle) &quot;tbl %s, handle %d&quot;
rdma_res_tbl_alloc(char *name, uint32_t handle) &quot;tbl %s, handle %d&quot;
rdma_res_tbl_dealloc(char *name, uint32_t handle) &quot;tbl %s, handle %d&quot;
rdma_rm_alloc_mr(uint32_t mr_handle, void *host_virt, uint64_t guest_start, uint64_t guest_length, int access_flags) &quot;mr_handle=%d, host_virt=%p, guest_start=0x%&quot;PRIx64&quot;, length=%&quot; PRId64&quot;, access_flags=0x%x&quot;
rdma_rm_dealloc_mr(uint32_t mr_handle, uint64_t guest_start) &quot;mr_handle=%d, guest_start=0x%&quot;PRIx64
rdma_rm_alloc_qp(uint32_t rm_qpn, uint32_t backend_qpn, uint8_t qp_type) &quot;rm_qpn=%d, backend_qpn=0x%x, qp_type=%d&quot;
rdma_rm_modify_qp(uint32_t qpn, uint32_t attr_mask, int qp_state, uint8_t sgid_idx) &quot;qpn=0x%x, attr_mask=0x%x, qp_state=%d, sgid_idx=%d&quot;

# rdma_utils.c
rdma_pci_dma_map(uint64_t addr, void *vaddr, uint64_t len) &quot;0x%&quot;PRIx64&quot; -&gt; %p (len=%&quot; PRIu64&quot;)&quot;
rdma_pci_dma_unmap(void *vaddr) &quot;%p&quot;
# See docs/devel/tracing.rst for syntax documentation.

# pvrdma_main.c
pvrdma_regs_read(uint64_t addr, uint64_t val) &quot;pvrdma.regs[0x%&quot;PRIx64&quot;]=0x%&quot;PRIx64
pvrdma_regs_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name) &quot;pvrdma.regs[0x%&quot;PRIx64&quot;]=0x%&quot;PRIx64&quot; (%s %s)&quot;
pvrdma_uar_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name, int val1, int val2) &quot;uar[0x%&quot;PRIx64&quot;]=0x%&quot;PRIx64&quot; (cls=%s, op=%s, obj=%d, val=%d)&quot;

# pvrdma_cmd.c
pvrdma_map_to_pdir_host_virt(void *vfirst, void *vremaped) &quot;mremap %p -&gt; %p&quot;
pvrdma_map_to_pdir_next_page(int page_idx, void *vnext, void *vremaped) &quot;mremap [%d] %p -&gt; %p&quot;
pvrdma_exec_cmd(int cmd, int err) &quot;cmd=%d, err=%d&quot;

# pvrdma_dev_ring.c
pvrdma_ring_next_elem_read_no_data(char *ring_name) &quot;pvrdma_ring %s is empty&quot;

# pvrdma_qp_ops.c
pvrdma_post_cqe(uint32_t cq_handle, int notify, uint64_t wr_id, uint64_t qpn, uint32_t op_code, uint32_t status, uint32_t byte_len, uint32_t src_qp, uint32_t wc_flags, uint32_t vendor_err) &quot;cq_handle=%d, notify=%d, wr_id=0x%&quot;PRIx64&quot;, qpn=0x%&quot;PRIx64&quot;, opcode=%d, status=%d, byte_len=%d, src_qp=%d, wc_flags=%d, vendor_err=%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# allwinner-rtc.c
allwinner_rtc_read(uint64_t addr, uint64_t value) &quot;addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
allwinner_rtc_write(uint64_t addr, uint64_t value) &quot;addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64

# sun4v-rtc.c
sun4v_rtc_read(uint64_t addr, uint64_t value) &quot;read: addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
sun4v_rtc_write(uint64_t addr, uint64_t value) &quot;write: addr 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64

# xlnx-zynqmp-rtc.c
xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) &quot;Get time from host: %d-%d-%d %2d:%02d:%02d&quot;

# pl031.c
pl031_irq_state(int level) &quot;irq state %d&quot;
pl031_read(uint32_t addr, uint32_t value) &quot;addr 0x%08x value 0x%08x&quot;
pl031_write(uint32_t addr, uint32_t value) &quot;addr 0x%08x value 0x%08x&quot;
pl031_alarm_raised(void) &quot;alarm raised&quot;
pl031_set_alarm(uint32_t ticks) &quot;alarm set for %u ticks&quot;

# aspeed_rtc.c
aspeed_rtc_read(uint64_t addr, uint64_t value) &quot;addr 0x%02&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
aspeed_rtc_write(uint64_t addr, uint64_t value) &quot;addr 0x%02&quot; PRIx64 &quot; value 0x%08&quot; PRIx64

# m48t59.c
m48txx_nvram_io_read(uint64_t addr, uint64_t value) &quot;io read addr:0x%04&quot; PRIx64 &quot; value:0x%02&quot; PRIx64
m48txx_nvram_io_write(uint64_t addr, uint64_t value) &quot;io write addr:0x%04&quot; PRIx64 &quot; value:0x%02&quot; PRIx64
m48txx_nvram_mem_read(uint32_t addr, uint32_t value) &quot;mem read addr:0x%04x value:0x%02x&quot;
m48txx_nvram_mem_write(uint32_t addr, uint32_t value) &quot;mem write addr:0x%04x value:0x%02x&quot;

# goldfish_rtc.c
goldfish_rtc_read(uint64_t addr, uint64_t value) &quot;addr 0x%02&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
goldfish_rtc_write(uint64_t addr, uint64_t value) &quot;addr 0x%02&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# css.c
css_enable_facility(const char *facility) &quot;CSS: enable %s&quot;
css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) &quot;CSS: queueing crw: rsc=0x%x, erc=0x%x, rsid=0x%x %s&quot;
css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) &quot;CSS: add chpid %x.%02x (type 0x%02x)&quot;
css_new_image(uint8_t cssid, const char *default_cssid) &quot;CSS: add css image 0x%02x %s&quot;
css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) &quot;CSS: %s %x.%x.%04x (devno 0x%04x)&quot;
css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) &quot;CSS: I/O interrupt on sch %x.%x.%04x (intparm 0x%08x, isc 0x%x) %s&quot;
css_adapter_interrupt(uint8_t isc) &quot;CSS: adapter I/O interrupt (isc 0x%x)&quot;
css_do_sic(uint16_t mode, uint8_t isc) &quot;CSS: set interruption mode 0x%x on isc 0x%x&quot;

# virtio-ccw.c
virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) &quot;VIRTIO-CCW: %x.%x.%04x: interpret command 0x%x&quot;
virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) &quot;VIRTIO-CCW: add subchannel %x.%x.%04x, devno 0x%04x (%s)&quot;
virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) &quot;VIRTIO-CCW: indicator at %&quot; PRIu64 &quot;: 0x%x-&gt;0x%x&quot;

# s390-pci-vfio.c
s390_pci_clp_cap(const char *id, uint32_t cap) &quot;PCI: %s: missing expected CLP capability %u&quot;
s390_pci_clp_cap_size(const char *id, uint32_t size, uint32_t cap) &quot;PCI: %s: bad size (%u) for CLP capability %u&quot;
s390_pci_clp_dev_info(const char *id) &quot;PCI: %s: cannot read vfio device info&quot;

# s390-pci-bus.c
s390_pci_sclp_nodev(const char *str, uint32_t aid) &quot;%s no dev found aid 0x%x&quot;
s390_pci_iommu_xlate(uint64_t addr) &quot;iommu trans addr 0x%&quot; PRIx64
s390_pci_msi_ctrl_write(uint64_t data, uint32_t idx, uint32_t vec) &quot;write_msix data 0x%&quot; PRIx64 &quot; idx %d vec 0x%x&quot;
s390_pcihost(const char *msg) &quot;%s&quot;

# s390-pci-inst.c
s390_pci_irqs(const char *str, uint32_t id) &quot;%s irqs for adapter id %d&quot;
s390_pci_kvm_aif(const char *str) &quot;Failed to %s interrupt forwarding&quot;

s390_pci_list_entry(uint32_t g_l2, uint32_t vid, uint32_t did, uint32_t fid, uint32_t fh) &quot;g_l2 %d vendor id 0x%x device id 0x%x fid 0x%x fh 0x%x&quot;
s390_pci_list(uint32_t rc) &quot;failed rc 0x%x&quot;
s390_pci_unknown(const char *msg, uint32_t cmd) &quot;%s unknown command 0x%x&quot;
s390_pci_bar(uint32_t bar, uint32_t addr, uint64_t size, uint32_t barsize) &quot;bar %d addr 0x%x size 0x%&quot; PRIx64 &quot;barsize 0x%x&quot;
s390_pci_nodev(const char *cmd, uint32_t fh) &quot;%s no pci dev fh 0x%x&quot;
s390_pci_invalid(const char *cmd, uint32_t fh) &quot;%s invalid space fh 0x%x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# scsi-bus.c
scsi_req_alloc(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_req_cancel(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_req_data(int target, int lun, int tag, int len) &quot;target %d lun %d tag %d len %d&quot;
scsi_req_data_canceled(int target, int lun, int tag, int len) &quot;target %d lun %d tag %d len %d&quot;
scsi_req_dequeue(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_bus_drained_begin(void *bus, void *sdev) &quot;bus %p sdev %p&quot;
scsi_bus_drained_end(void *bus, void *sdev) &quot;bus %p sdev %p&quot;
scsi_req_continue(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_req_continue_canceled(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) &quot;target %d lun %d tag %d command %d dir %d length %d&quot;
scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) &quot;target %d lun %d tag %d command %d lba %&quot;PRIu64
scsi_req_parse_bad(int target, int lun, int tag, int cmd) &quot;target %d lun %d tag %d command %d&quot;
scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) &quot;target %d lun %d tag %d key 0x%02x asc 0x%02x ascq 0x%02x&quot;
scsi_device_set_ua(int target, int lun, int key, int asc, int ascq) &quot;target %d lun %d key 0x%02x asc 0x%02x ascq 0x%02x&quot;
scsi_report_luns(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) &quot;target %d lun %d tag %d page 0x%02x/0x%02x&quot;
scsi_test_unit_ready(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;
scsi_request_sense(int target, int lun, int tag) &quot;target %d lun %d tag %d&quot;

# mptsas.c
mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) &quot;dev %p context 0x%08x status 0x%x resid %d&quot;
mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) &quot;dev %p addr 0x%08x value 0x%08x&quot;
mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) &quot;dev %p addr 0x%08x value 0x%08x&quot;
mptsas_irq_intx(void *dev, int level) &quot;dev %p level %d&quot;
mptsas_irq_msi(void *dev) &quot;dev %p &quot;
mptsas_mmio_read(void *dev, uint32_t addr, uint32_t val) &quot;dev %p addr 0x%08x value 0x%x&quot;
mptsas_mmio_unhandled_read(void *dev, uint32_t addr) &quot;dev %p addr 0x%08x&quot;
mptsas_mmio_unhandled_write(void *dev, uint32_t addr, uint32_t val) &quot;dev %p addr 0x%08x value 0x%x&quot;
mptsas_mmio_write(void *dev, uint32_t addr, uint32_t val) &quot;dev %p addr 0x%08x value 0x%x&quot;
mptsas_process_message(void *dev, int msg, uint32_t ctx) &quot;dev %p cmd %d context 0x%08x&quot;
mptsas_process_scsi_io_request(void *dev, int bus, int target, int lun, uint64_t len) &quot;dev %p dev %d:%d:%d length %&quot;PRIu64&quot;&quot;
mptsas_reset(void *dev) &quot;dev %p &quot;
mptsas_scsi_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) &quot;dev %p context 0x%08x: %&quot;PRIu64&quot;/%&quot;PRIu64&quot;&quot;
mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) &quot;dev %p context 0x%08x: %&quot;PRIu64&quot;/%&quot;PRIu64&quot;&quot;
mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) &quot;dev %p context 0x%08x: Unhandled cmd 0x%x&quot;
mptsas_unhandled_doorbell_cmd(void *dev, int cmd) &quot;dev %p value 0x%08x&quot;

# mptconfig.c
mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) &quot;dev %p address %d (port %d, handles: phy %d dev %d) page %d&quot;
mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) &quot;dev %p address %d (port %d, handles: phy %d dev %d) page %d&quot;

# megasas.c
megasas_init_firmware(uint64_t pa) &quot;pa 0x%&quot; PRIx64 &quot; &quot;
megasas_init_queue(uint64_t queue_pa, int queue_len, uint32_t head, uint32_t tail, uint32_t flags) &quot;queue at 0x%&quot; PRIx64 &quot; len %d head 0x%&quot; PRIx32 &quot; tail 0x%&quot; PRIx32 &quot; flags 0x%x&quot;
megasas_initq_map_failed(int frame) &quot;scmd %d: failed to map queue&quot;
megasas_initq_mapped(uint64_t pa) &quot;queue already mapped at 0x%&quot; PRIx64
megasas_initq_mismatch(int queue_len, int fw_cmds) &quot;queue size %d max fw cmds %d&quot;
megasas_qf_mapped(unsigned int index) &quot;skip mapped frame 0x%x&quot;
megasas_qf_new(unsigned int index, uint64_t frame) &quot;frame 0x%x addr 0x%&quot; PRIx64
megasas_qf_busy(unsigned long pa) &quot;all frames busy for frame 0x%lx&quot;
megasas_qf_enqueue(unsigned int index, unsigned int count, uint64_t context, uint32_t head, uint32_t tail, unsigned int busy) &quot;frame 0x%x count %d context 0x%&quot; PRIx64 &quot; head 0x%&quot; PRIx32 &quot; tail 0x%&quot; PRIx32 &quot; busy %u&quot;
megasas_qf_update(uint32_t head, uint32_t tail, unsigned int busy) &quot;head 0x%&quot; PRIx32 &quot; tail 0x%&quot; PRIx32 &quot; busy %u&quot;
megasas_qf_map_failed(int cmd, unsigned long frame) &quot;scmd %d: frame %lu&quot;
megasas_qf_complete_noirq(uint64_t context) &quot;context 0x%&quot; PRIx64 &quot; &quot;
megasas_qf_complete(uint64_t context, uint32_t head, uint32_t tail, int busy) &quot;context 0x%&quot; PRIx64 &quot; head 0x%&quot; PRIx32 &quot; tail 0x%&quot; PRIx32 &quot; busy %u&quot;
megasas_frame_busy(uint64_t addr) &quot;frame 0x%&quot; PRIx64 &quot; busy&quot;
megasas_unhandled_frame_cmd(int cmd, uint8_t frame_cmd) &quot;scmd %d: MFI cmd 0x%x&quot;
megasas_handle_scsi(const char *frame, int bus, int dev, int lun, void *sdev, unsigned long size) &quot;%s dev %x/%x/%x sdev %p xfer %lu&quot;
megasas_scsi_target_not_present(const char *frame, int bus, int dev, int lun) &quot;%s dev %x/%x/%x&quot;
megasas_scsi_invalid_cdb_len(const char *frame, int bus, int dev, int lun, int len) &quot;%s dev %x/%x/%x invalid cdb len %d&quot;
megasas_iov_read_overflow(int cmd, int bytes, int len) &quot;scmd %d: %d/%d bytes&quot;
megasas_iov_write_overflow(int cmd, int bytes, int len) &quot;scmd %d: %d/%d bytes&quot;
megasas_iov_read_underflow(int cmd, int bytes, int len) &quot;scmd %d: %d/%d bytes&quot;
megasas_iov_write_underflow(int cmd, int bytes, int len) &quot;scmd %d: %d/%d bytes&quot;
megasas_scsi_req_alloc_failed(const char *frame, int dev, int lun) &quot;%s dev %x/%x&quot;
megasas_scsi_read_start(int cmd, int len) &quot;scmd %d: transfer %d bytes of data&quot;
megasas_scsi_write_start(int cmd, int len) &quot;scmd %d: transfer %d bytes of data&quot;
megasas_scsi_nodata(int cmd) &quot;scmd %d: no data to be transferred&quot;
megasas_scsi_complete(int cmd, uint32_t status, int len, int xfer) &quot;scmd %d: status 0x%x, len %u/%u&quot;
megasas_command_complete(int cmd, uint32_t status, uint32_t resid) &quot;scmd %d: status 0x%x, residual %d&quot;
megasas_handle_io(int cmd, const char *frame, int dev, int lun, unsigned long lba, unsigned long count) &quot;scmd %d: %s dev %x/%x lba 0x%lx count %lu&quot;
megasas_io_target_not_present(int cmd, const char *frame, int dev, int lun) &quot;scmd %d: %s dev 1/%x/%x LUN not present&quot;
megasas_io_read_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) &quot;scmd %d: start LBA 0x%lx %lu blocks (%lu bytes)&quot;
megasas_io_write_start(int cmd, unsigned long lba, unsigned long count, unsigned long len) &quot;scmd %d: start LBA 0x%lx %lu blocks (%lu bytes)&quot;
megasas_io_complete(int cmd, uint32_t len) &quot;scmd %d: %d bytes&quot;
megasas_iovec_sgl_overflow(int cmd, int index, int limit) &quot;scmd %d: iovec count %d limit %d&quot;
megasas_iovec_sgl_underflow(int cmd, int index) &quot;scmd %d: iovec count %d&quot;
megasas_iovec_sgl_invalid(int cmd, int index, uint64_t pa, uint32_t len) &quot;scmd %d: element %d pa 0x%&quot; PRIx64 &quot; len %u&quot;
megasas_iovec_overflow(int cmd, int len, int limit) &quot;scmd %d: len %d limit %d&quot;
megasas_iovec_underflow(int cmd, int len, int limit) &quot;scmd %d: len %d limit %d&quot;
megasas_handle_dcmd(int cmd, int opcode) &quot;scmd %d: MFI DCMD opcode 0x%x&quot;
megasas_finish_dcmd(int cmd, int size) &quot;scmd %d: MFI DCMD wrote %d bytes&quot;
megasas_dcmd_req_alloc_failed(int cmd, const char *desc) &quot;scmd %d: %s&quot;
megasas_dcmd_internal_submit(int cmd, const char *desc, int dev) &quot;scmd %d: %s to dev %d&quot;
megasas_dcmd_internal_finish(int cmd, int opcode, int lun) &quot;scmd %d: cmd 0x%x lun %d&quot;
megasas_dcmd_internal_invalid(int cmd, int opcode) &quot;scmd %d: DCMD 0x%x&quot;
megasas_dcmd_unhandled(int cmd, int opcode, int len) &quot;scmd %d: opcode 0x%x, len %d&quot;
megasas_dcmd_zero_sge(int cmd) &quot;scmd %d: zero DCMD sge count&quot;
megasas_dcmd_invalid_sge(int cmd, int count) &quot;scmd %d: DCMD sge count %d&quot;
megasas_dcmd_invalid_xfer_len(int cmd, unsigned long size, unsigned long max) &quot;scmd %d: xfer len %ld, max %ld&quot;
megasas_dcmd_enter(int cmd, const char *dcmd, int len) &quot;scmd %d: DCMD %s len %d&quot;
megasas_dcmd_dummy(int cmd, unsigned long size) &quot;scmd %d: xfer len %ld&quot;
megasas_dcmd_set_fw_time(int cmd, unsigned long time) &quot;scmd %d: Set FW time 0x%lx&quot;
megasas_dcmd_pd_get_list(int cmd, int num, int max, int offset) &quot;scmd %d: DCMD PD get list: %d / %d PDs, size %d&quot;
megasas_dcmd_ld_get_list(int cmd, int num, int max) &quot;scmd %d: DCMD LD get list: found %d / %d LDs&quot;
megasas_dcmd_ld_get_info(int cmd, int ld_id) &quot;scmd %d: dev %d&quot;
megasas_dcmd_ld_list_query(int cmd, int flags) &quot;scmd %d: query flags 0x%x&quot;
megasas_dcmd_pd_get_info(int cmd, int pd_id) &quot;scmd %d: dev %d&quot;
megasas_dcmd_pd_list_query(int cmd, int flags) &quot;scmd %d: query flags 0x%x&quot;
megasas_dcmd_reset_ld(int cmd, int target_id) &quot;scmd %d: dev %d&quot;
megasas_dcmd_unsupported(int cmd, unsigned long size) &quot;scmd %d: set properties len %ld&quot;
megasas_abort_frame(int cmd, int abort_cmd) &quot;scmd %d: frame 0x%x&quot;
megasas_abort_no_cmd(int cmd, uint64_t context) &quot;scmd %d: no active command for frame context 0x%&quot; PRIx64
megasas_abort_invalid_context(int cmd, uint64_t context, int abort_cmd) &quot;scmd %d: invalid frame context 0x%&quot; PRIx64 &quot; for abort frame 0x%x&quot;
megasas_reset(int fw_state) &quot;firmware state 0x%x&quot;
megasas_init(int sges, int cmds, const char *mode) &quot;Using %d sges, %d cmds, %s mode&quot;
megasas_msix_raise(int vector) &quot;vector %d&quot;
megasas_msi_raise(int vector) &quot;vector %d&quot;
megasas_irq_lower(void) &quot;INTx&quot;
megasas_irq_raise(void) &quot;INTx&quot;
megasas_intr_enabled(void) &quot;Interrupts enabled&quot;
megasas_intr_disabled(void) &quot;Interrupts disabled&quot;
megasas_msix_enabled(int vector) &quot;vector %d&quot;
megasas_msi_enabled(int vector) &quot;vector %d&quot;
megasas_mmio_readl(const char *reg, uint32_t val) &quot;reg %s: 0x%x&quot;
megasas_mmio_invalid_readl(unsigned long addr) &quot;addr 0x%lx&quot;
megasas_mmio_writel(const char *reg, uint32_t val) &quot;reg %s: 0x%x&quot;
megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) &quot;addr 0x%x: 0x%x&quot;

# vmw_pvscsi.c
pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) &quot;TX/RX rings logarithms set to %d/%d&quot;
pvscsi_ring_init_msg(uint32_t len_log2) &quot;MSG ring logarithm set to %d&quot;
pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) &quot;new production counter of completion ring is 0x%&quot;PRIx64
pvscsi_ring_flush_msg(uint64_t filled_cmp_ptr) &quot;new production counter of message ring is 0x%&quot;PRIx64
pvscsi_update_irq_level(bool raise, uint64_t mask, uint64_t status) &quot;interrupt level set to %d (MASK: 0x%&quot;PRIx64&quot;, STATUS: 0x%&quot;PRIx64&quot;)&quot;
pvscsi_update_irq_msi(void) &quot;sending MSI notification&quot;
pvscsi_cmp_ring_put(unsigned long addr) &quot;got completion descriptor 0x%lx&quot;
pvscsi_msg_ring_put(unsigned long addr) &quot;got message descriptor 0x%lx&quot;
pvscsi_complete_request(uint64_t context, uint64_t len, uint8_t sense_key) &quot;completion: ctx: 0x%&quot;PRIx64&quot;, len: 0x%&quot;PRIx64&quot;, sense key: %u&quot;
pvscsi_get_sg_list(int nsg, size_t size) &quot;get SG list: depth: %u, size: %zu&quot;
pvscsi_get_next_sg_elem(uint32_t flags) &quot;unknown flags in SG element (val: 0x%x)&quot;
pvscsi_command_complete_not_found(uint32_t tag) &quot;can&#039;t find request for tag 0x%x&quot;
pvscsi_command_complete_data_run(void) &quot;not all data required for command transferred&quot;
pvscsi_command_complete_sense_len(int len) &quot;sense information length is %d bytes&quot;
pvscsi_convert_sglist(uint64_t context, unsigned long addr, uint32_t resid) &quot;element: ctx: 0x%&quot;PRIx64&quot; addr: 0x%lx, len: %ul&quot;
pvscsi_process_req_descr(uint8_t cmd, uint64_t ctx) &quot;SCSI cmd 0x%x, ctx: 0x%&quot;PRIx64
pvscsi_process_req_descr_unknown_device(void) &quot;command directed to unknown device rejected&quot;
pvscsi_process_req_descr_invalid_dir(void) &quot;command with invalid transfer direction rejected&quot;
pvscsi_process_io(unsigned long addr) &quot;got descriptor 0x%lx&quot;
pvscsi_on_cmd_noimpl(const char* cmd) &quot;unimplemented command %s ignored&quot;
pvscsi_on_cmd_reset_dev(uint32_t tgt, int lun, void* dev) &quot;PVSCSI_CMD_RESET_DEVICE[target %u lun %d (dev 0x%p)]&quot;
pvscsi_on_cmd_arrived(const char* cmd) &quot;command %s arrived&quot;
pvscsi_on_cmd_abort(uint64_t ctx, uint32_t tgt) &quot;command PVSCSI_CMD_ABORT_CMD for ctx 0x%&quot;PRIx64&quot;, target %u&quot;
pvscsi_on_cmd_unknown(uint64_t cmd_id) &quot;unknown command 0x%&quot;PRIx64
pvscsi_on_cmd_unknown_data(uint32_t data) &quot;data for unknown command 0x:0x%x&quot;
pvscsi_io_write(const char* cmd, uint64_t val) &quot;%s write: 0x%&quot;PRIx64
pvscsi_io_write_unknown(unsigned long addr, unsigned sz, uint64_t val) &quot;unknown write address: 0x%lx size: %u bytes value: 0x%&quot;PRIx64
pvscsi_io_read(const char* cmd, uint64_t status) &quot;%s read: 0x%&quot;PRIx64
pvscsi_io_read_unknown(unsigned long addr, unsigned sz) &quot;unknown read address: 0x%lx size: %u bytes&quot;
pvscsi_init_msi_fail(int res) &quot;failed to initialize MSI, error %d&quot;
pvscsi_state(const char* state) &quot;starting %s ...&quot;
pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) &quot;%s page: 0x%&quot;PRIx64
pvscsi_tx_rings_num_pages(const char* label, uint32_t num) &quot;Number of %s pages: %u&quot;

# esp.c
esp_error_fifo_overrun(void) &quot;FIFO overrun&quot;
esp_error_unhandled_command(uint32_t val) &quot;unhandled command (0x%2.2x)&quot;
esp_error_invalid_write(uint32_t val, uint32_t addr) &quot;invalid write of 0x%02x at [0x%x]&quot;
esp_raise_irq(void) &quot;Raise IRQ&quot;
esp_lower_irq(void) &quot;Lower IRQ&quot;
esp_raise_drq(void) &quot;Raise DREQ&quot;
esp_lower_drq(void) &quot;Lower DREQ&quot;
esp_dma_enable(void) &quot;Raise enable&quot;
esp_dma_disable(void) &quot;Lower enable&quot;
esp_pdma_read(int size) &quot;pDMA read %u bytes&quot;
esp_pdma_write(int size) &quot;pDMA write %u bytes&quot;
esp_get_cmd(uint32_t dmalen, int target) &quot;len %d target %d&quot;
esp_do_command_phase(uint8_t busid) &quot;busid 0x%x&quot;
esp_do_identify(uint8_t byte) &quot;0x%x&quot;
esp_handle_satn_stop(uint32_t cmdlen) &quot;cmdlen %d&quot;
esp_write_response(uint32_t status) &quot;Transfer status (status=%d)&quot;
esp_do_dma(uint32_t cmdlen, uint32_t len) &quot;command len %d + %d&quot;
esp_command_complete(void) &quot;SCSI Command complete&quot;
esp_command_complete_deferred(void) &quot;SCSI Command complete deferred&quot;
esp_command_complete_unexpected(void) &quot;SCSI command completed unexpectedly&quot;
esp_command_complete_fail(void) &quot;Command failed&quot;
esp_transfer_data(uint32_t dma_left, int32_t ti_size) &quot;transfer %d/%d&quot;
esp_handle_ti(uint32_t minlen) &quot;Transfer Information len %d&quot;
esp_handle_ti_cmd(uint32_t cmdlen) &quot;command len %d&quot;
esp_mem_readb(uint32_t saddr, uint8_t reg) &quot;reg[%d]: 0x%2.2x&quot;
esp_mem_writeb(uint32_t saddr, uint8_t reg, uint32_t val) &quot;reg[%d]: 0x%2.2x -&gt; 0x%2.2x&quot;
esp_mem_writeb_cmd_nop(uint32_t val) &quot;NOP (0x%2.2x)&quot;
esp_mem_writeb_cmd_flush(uint32_t val) &quot;Flush FIFO (0x%2.2x)&quot;
esp_mem_writeb_cmd_reset(uint32_t val) &quot;Chip reset (0x%2.2x)&quot;
esp_mem_writeb_cmd_bus_reset(uint32_t val) &quot;Bus reset (0x%2.2x)&quot;
esp_mem_writeb_cmd_iccs(uint32_t val) &quot;Initiator Command Complete Sequence (0x%2.2x)&quot;
esp_mem_writeb_cmd_msgacc(uint32_t val) &quot;Message Accepted (0x%2.2x)&quot;
esp_mem_writeb_cmd_pad(uint32_t val) &quot;Transfer padding (0x%2.2x)&quot;
esp_mem_writeb_cmd_satn(uint32_t val) &quot;Set ATN (0x%2.2x)&quot;
esp_mem_writeb_cmd_rstatn(uint32_t val) &quot;Reset ATN (0x%2.2x)&quot;
esp_mem_writeb_cmd_sel(uint32_t val) &quot;Select without ATN (0x%2.2x)&quot;
esp_mem_writeb_cmd_selatn(uint32_t val) &quot;Select with ATN (0x%2.2x)&quot;
esp_mem_writeb_cmd_selatns(uint32_t val) &quot;Select with ATN &amp; stop (0x%2.2x)&quot;
esp_mem_writeb_cmd_ensel(uint32_t val) &quot;Enable selection (0x%2.2x)&quot;
esp_mem_writeb_cmd_dissel(uint32_t val) &quot;Disable selection (0x%2.2x)&quot;
esp_mem_writeb_cmd_ti(uint32_t val) &quot;Transfer Information (0x%2.2x)&quot;

# esp-pci.c
esp_pci_error_invalid_dma_direction(void) &quot;invalid DMA transfer direction&quot;
esp_pci_error_invalid_read(uint32_t reg) &quot;read access outside bounds (reg 0x%x)&quot;
esp_pci_error_invalid_write(uint32_t reg) &quot;write access outside bounds (reg 0x%x)&quot;
esp_pci_error_invalid_write_dma(uint32_t val, uint32_t addr) &quot;invalid write of 0x%02x at [0x%x]&quot;
esp_pci_dma_read(uint32_t saddr, uint32_t reg) &quot;reg[%d]: 0x%8.8x&quot;
esp_pci_dma_write(uint32_t saddr, uint32_t reg, uint32_t val) &quot;reg[%d]: 0x%8.8x -&gt; 0x%8.8x&quot;
esp_pci_dma_idle(uint32_t val) &quot;IDLE (0x%.8x)&quot;
esp_pci_dma_blast(uint32_t val) &quot;BLAST (0x%.8x)&quot;
esp_pci_dma_abort(uint32_t val) &quot;ABORT (0x%.8x)&quot;
esp_pci_dma_start(uint32_t val) &quot;START (0x%.8x)&quot;
esp_pci_sbac_read(uint32_t reg) &quot;sbac: 0x%8.8x&quot;
esp_pci_sbac_write(uint32_t reg, uint32_t val) &quot;sbac: 0x%8.8x -&gt; 0x%8.8x&quot;

# spapr_vscsi.c
spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) &quot;status: 0x%x, res_in: %&quot;PRId32&quot;, res_out: %&quot;PRId32
spapr_vscsi_fetch_desc_no_data(void) &quot;no data descriptor&quot;
spapr_vscsi_fetch_desc_direct(void) &quot;direct segment&quot;
spapr_vscsi_fetch_desc_indirect(uint32_t qtag, unsigned desc, unsigned local_desc) &quot;indirect segment local tag=0x%&quot;PRIx32&quot; desc#%u/%u&quot;
spapr_vscsi_fetch_desc_out_of_range(unsigned desc, unsigned desc_offset) &quot;#%u is ouf of range (%u bytes)&quot;
spapr_vscsi_fetch_desc_dma_read_error(int rc) &quot;spapr_vio_dma_read -&gt; %d reading ext_desc&quot;
spapr_vscsi_fetch_desc_indirect_seg_ext(uint32_t qtag, unsigned n, unsigned desc, uint64_t va, uint32_t len) &quot;indirect segment ext. tag=0x%&quot;PRIx32&quot; desc#%u/%u { va=0x%&quot;PRIx64&quot; len=0x%&quot;PRIx32&quot; }&quot;
spapr_vscsi_fetch_desc_out_of_desc(void) &quot;Out of descriptors !&quot;
spapr_vscsi_fetch_desc_out_of_desc_boundary(unsigned offset, unsigned desc, uint32_t len) &quot;   offset=0x%x is out of a descriptor #%u boundary=0x%&quot;PRIx32
spapr_vscsi_fetch_desc_done(unsigned desc_num, unsigned desc_offset, uint64_t va, uint32_t len) &quot;   cur=%u offs=0x%x ret { va=0x%&quot;PRIx64&quot; len=0x%&quot;PRIx32&quot; }&quot;
spapr_vscsi_srp_indirect_data(uint32_t len) &quot;indirect segment 0x%&quot;PRIx32&quot; bytes&quot;
spapr_vscsi_srp_indirect_data_rw(int writing, int rc) &quot;spapr_vio_dma_r/w(%d) -&gt; %d&quot;
spapr_vscsi_srp_indirect_data_buf(unsigned a, unsigned b, unsigned c, unsigned d) &quot;     data: %02x %02x %02x %02x...&quot;
spapr_vscsi_srp_transfer_data(uint32_t len) &quot;no data desc transfer, skipping 0x%&quot;PRIx32&quot; bytes&quot;
spapr_vscsi_transfer_data(uint32_t tag, uint32_t len, void *req) &quot;SCSI xfer complete tag=0x%&quot;PRIx32&quot; len=0x%&quot;PRIx32&quot;, req=%p&quot;
spapr_vscsi_command_complete(uint32_t tag, uint32_t status, void *req) &quot;SCSI cmd complete, tag=0x%&quot;PRIx32&quot; status=0x%&quot;PRIx32&quot;, req=%p&quot;
spapr_vscsi_command_complete_sense_data1(uint32_t len, unsigned s0, unsigned s1, unsigned s2, unsigned s3, unsigned s4, unsigned s5, unsigned s6, unsigned s7) &quot;Sense data, %d bytes: %02x %02x %02x %02x %02x %02x %02x %02x&quot;
spapr_vscsi_command_complete_sense_data2(unsigned s8, unsigned s9, unsigned s10, unsigned s11, unsigned s12, unsigned s13, unsigned s14, unsigned s15)         &quot;                      %02x %02x %02x %02x %02x %02x %02x %02x&quot;
spapr_vscsi_command_complete_status(uint32_t status) &quot;Command complete err=%&quot;PRIu32
spapr_vscsi_save_request(uint32_t qtag, unsigned desc, unsigned offset) &quot;saving tag=%&quot;PRIu32&quot;, current desc#%u, offset=0x%x&quot;
spapr_vscsi_load_request(uint32_t qtag, unsigned desc, unsigned offset) &quot;restoring tag=%&quot;PRIu32&quot;, current desc#%u, offset=0x%x&quot;
spapr_vscsi_process_login(void) &quot;Got login, sending response !&quot;
spapr_vscsi_process_tsk_mgmt(uint8_t func) &quot;tsk_mgmt_func 0x%02x&quot;
spapr_vscsi_queue_cmd_no_drive(uint64_t lun) &quot;Command for lun 0x%08&quot; PRIx64 &quot; with no drive&quot;
spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lun, int ret) &quot;Queued command tag 0x%&quot;PRIx32&quot; CMD 0x%x=%s LUN %d ret: %d&quot;
spapr_vscsi_do_crq(unsigned c0, unsigned c1) &quot;crq: %02x %02x ...&quot;

# lsi53c895a.c
lsi_reset(void) &quot;Reset&quot;
lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) &quot;Update IRQ level %d dstat 0x%02x sist 0x%02x0x%02x&quot;
lsi_update_irq_disconnected(void) &quot;Handled IRQs &amp; disconnected, looking for pending processes&quot;
lsi_script_scsi_interrupt(uint8_t stat1, uint8_t stat0, uint8_t sist1, uint8_t sist0) &quot;SCSI Interrupt 0x%02x0x%02x prev 0x%02x0x%02x&quot;
lsi_script_dma_interrupt(uint8_t stat, uint8_t dstat) &quot;DMA Interrupt 0x%x prev 0x%x&quot;
lsi_bad_phase_jump(uint32_t dsp) &quot;Data phase mismatch jump to 0x%&quot;PRIX32
lsi_bad_phase_interrupt(void) &quot;Phase mismatch interrupt&quot;
lsi_bad_selection(uint32_t id) &quot;Selected absent target %&quot;PRIu32
lsi_do_dma_unavailable(void) &quot;DMA no data available&quot;
lsi_do_dma(uint64_t addr, int len) &quot;DMA addr=0x%&quot;PRIx64&quot; len=%d&quot;
lsi_queue_command(uint32_t tag) &quot;Queueing tag=0x%&quot;PRIx32
lsi_add_msg_byte_error(void) &quot;MSG IN data too long&quot;
lsi_add_msg_byte(uint8_t data) &quot;MSG IN 0x%02x&quot;
lsi_reselect(int id) &quot;Reselected target %d&quot;
lsi_queue_req_error(void *p) &quot;Multiple IO pending for request %p&quot;
lsi_queue_req(uint32_t tag) &quot;Queueing IO tag=0x%&quot;PRIx32
lsi_command_complete(uint32_t status) &quot;Command complete status=%&quot;PRId32
lsi_transfer_data(uint32_t tag, uint32_t len) &quot;Data ready tag=0x%&quot;PRIx32&quot; len=%&quot;PRId32
lsi_do_command(uint32_t dbc) &quot;Send command len=%&quot;PRId32
lsi_do_status(uint32_t dbc, uint8_t status) &quot;Get status len=%&quot;PRId32&quot; status=%d&quot;
lsi_do_status_error(void) &quot;Bad Status move&quot;
lsi_do_msgin(uint32_t dbc, int len) &quot;Message in len=%&quot;PRId32&quot; %d&quot;
lsi_do_msgout(uint32_t dbc) &quot;MSG out len=%&quot;PRId32
lsi_do_msgout_disconnect(void) &quot;MSG: Disconnect&quot;
lsi_do_msgout_noop(void) &quot;MSG: No Operation&quot;
lsi_do_msgout_extended(uint8_t msg, uint8_t len) &quot;Extended message 0x%x (len %d)&quot;
lsi_do_msgout_ignored(const char *msg) &quot;%s (ignored)&quot;
lsi_do_msgout_simplequeue(uint8_t select_tag) &quot;SIMPLE queue tag=0x%x&quot;
lsi_do_msgout_abort(uint32_t tag) &quot;MSG: ABORT TAG tag=0x%&quot;PRIx32
lsi_do_msgout_clearqueue(uint32_t tag) &quot;MSG: CLEAR QUEUE tag=0x%&quot;PRIx32
lsi_do_msgout_busdevicereset(uint32_t tag) &quot;MSG: BUS DEVICE RESET tag=0x%&quot;PRIx32
lsi_do_msgout_select(int id) &quot;Select LUN %d&quot;
lsi_memcpy(uint32_t dest, uint32_t src, int count) &quot;memcpy dest 0x%&quot;PRIx32&quot; src 0x%&quot;PRIx32&quot; count %d&quot;
lsi_wait_reselect(void) &quot;Wait Reselect&quot;
lsi_execute_script(uint32_t dsp, uint32_t insn, uint32_t addr) &quot;SCRIPTS dsp=0x%&quot;PRIx32&quot; opcode 0x%&quot;PRIx32&quot; arg 0x%&quot;PRIx32
lsi_execute_script_blockmove_delayed(void) &quot;Delayed select timeout&quot;
lsi_execute_script_blockmove_badphase(const char *phase, const char *expected) &quot;Wrong phase got %s expected %s&quot;
lsi_execute_script_io_alreadyreselected(void) &quot;Already reselected, jumping to alternative address&quot;
lsi_execute_script_io_selected(uint8_t id, const char *atn) &quot;Selected target %d%s&quot;
lsi_execute_script_io_disconnect(void) &quot;Wait Disconnect&quot;
lsi_execute_script_io_set(const char *atn, const char *ack, const char *tm, const char *cc) &quot;Set%s%s%s%s&quot;
lsi_execute_script_io_clear(const char *atn, const char *ack, const char *tm, const char *cc) &quot;Clear%s%s%s%s&quot;
lsi_execute_script_io_opcode(const char *opcode, int reg, const char *opname, uint8_t data8, uint32_t sfbr, const char *ssfbr) &quot;%s reg 0x%x %s data8=0x%02x sfbr=0x%02x%s&quot;
lsi_execute_script_tc_nop(void) &quot;NOP&quot;
lsi_execute_script_tc_delayedselect_timeout(void) &quot;Delayed select timeout&quot;
lsi_execute_script_tc_compc(int result) &quot;Compare carry %d&quot;
lsi_execute_script_tc_compp(const char *phase, char op, const char *insn_phase) &quot;Compare phase %s %c= %s&quot;
lsi_execute_script_tc_compd(uint32_t sfbr, uint8_t mask, char op, int result) &quot;Compare data 0x%&quot;PRIx32&quot; &amp; 0x%x %c= 0x%x&quot;
lsi_execute_script_tc_jump(uint32_t addr) &quot;Jump to 0x%&quot;PRIx32
lsi_execute_script_tc_call(uint32_t addr) &quot;Call 0x%&quot;PRIx32
lsi_execute_script_tc_return(uint32_t addr) &quot;Return to 0x%&quot;PRIx32
lsi_execute_script_tc_interrupt(uint32_t addr) &quot;Interrupt 0x%&quot;PRIx32
lsi_execute_script_tc_illegal(void) &quot;Illegal transfer control&quot;
lsi_execute_script_tc_cc_failed(void) &quot;Control condition failed&quot;
lsi_execute_script_mm_load(int reg, int n, uint32_t addr, int data) &quot;Load reg 0x%x size %d addr 0x%&quot;PRIx32&quot; = 0x%08x&quot;
lsi_execute_script_mm_store(int reg, int n, uint32_t addr) &quot;Store reg 0x%x size %d addr 0x%&quot;PRIx32
lsi_execute_script_stop(void) &quot;SCRIPTS execution stopped&quot;
lsi_awoken(void) &quot;Woken by SIGP&quot;
lsi_reg_read(const char *name, int offset, uint8_t ret) &quot;Read reg %s 0x%x = 0x%02x&quot;
lsi_reg_write(const char *name, int offset, uint8_t val) &quot;Write reg %s 0x%x = 0x%02x&quot;
lsi_scripts_timer_triggered(void) &quot;SCRIPTS timer triggered&quot;
lsi_scripts_timer_start(void) &quot;SCRIPTS timer started&quot;

# virtio-scsi.c
virtio_scsi_cmd_req(int lun, uint32_t tag, uint8_t cmd) &quot;virtio_scsi_cmd_req lun=%u tag=0x%x cmd=0x%x&quot;
virtio_scsi_cmd_resp(int lun, uint32_t tag, int response, uint8_t status) &quot;virtio_scsi_cmd_resp lun=%u tag=0x%x response=%d status=0x%x&quot;
virtio_scsi_tmf_req(int lun, uint32_t tag, int subtype) &quot;virtio_scsi_tmf_req lun=%u tag=0x%x subtype=%d&quot;
virtio_scsi_tmf_resp(int lun, uint32_t tag, int response) &quot;virtio_scsi_tmf_resp lun=%u tag=0x%x response=%d&quot;
virtio_scsi_an_req(int lun, uint32_t event_requested) &quot;virtio_scsi_an_req lun=%u event_requested=0x%x&quot;
virtio_scsi_an_resp(int lun, int response) &quot;virtio_scsi_an_resp lun=%u response=%d&quot;
virtio_scsi_event(int lun, int event, int reason) &quot;virtio_scsi_event lun=%u event=%d reason=%d&quot;

# scsi-disk.c
scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) &quot;Command complete tag=0x%x sense=%d/%d/%d&quot;
scsi_disk_read_complete(uint32_t tag, size_t size) &quot;Data ready tag=0x%x len=%zd&quot;
scsi_disk_read_data_count(uint32_t sector_count) &quot;Read sector_count=%d&quot;
scsi_disk_read_data_invalid(void) &quot;Data transfer direction invalid&quot;
scsi_disk_write_complete_noio(uint32_t tag, size_t size) &quot;Write complete tag=0x%x more=%zd&quot;
scsi_disk_write_data_invalid(void) &quot;Data transfer direction invalid&quot;
scsi_disk_emulate_vpd_page_00(size_t xfer) &quot;Inquiry EVPD[Supported pages] buffer size %zd&quot;
scsi_disk_emulate_vpd_page_80_not_supported(void) &quot;Inquiry (EVPD[Serial number] not supported&quot;
scsi_disk_emulate_vpd_page_80(size_t xfer) &quot;Inquiry EVPD[Serial number] buffer size %zd&quot;
scsi_disk_emulate_vpd_page_83(size_t xfer) &quot;Inquiry EVPD[Device identification] buffer size %zd&quot;
scsi_disk_emulate_vpd_page_b0_not_supported(void) &quot;Inquiry (EVPD[Block limits] not supported for CDROM&quot;
scsi_disk_emulate_mode_sense(int cmd, int page, size_t xfer, int control) &quot;Mode Sense(%d) (page %d, xfer %zd, page_control %d)&quot;
scsi_disk_emulate_read_toc(int start_track, int format, int msf) &quot;Read TOC (track %d format %d msf %d)&quot;
scsi_disk_emulate_read_data(int buflen) &quot;Read buf_len=%d&quot;
scsi_disk_emulate_write_data(int buflen) &quot;Write buf_len=%d&quot;
scsi_disk_emulate_command_SAI_16(void) &quot;SAI READ CAPACITY(16)&quot;
scsi_disk_emulate_command_SAI_unsupported(void) &quot;Unsupported Service Action In&quot;
scsi_disk_emulate_command_SEEK_10(uint64_t lba) &quot;Seek(10) (sector %&quot; PRId64 &quot;)&quot;
scsi_disk_emulate_command_MODE_SELECT(size_t xfer) &quot;Mode Select(6) (len %zd)&quot;
scsi_disk_emulate_command_MODE_SELECT_10(size_t xfer) &quot;Mode Select(10) (len %zd)&quot;
scsi_disk_emulate_command_UNMAP(size_t xfer) &quot;Unmap (len %zd)&quot;
scsi_disk_emulate_command_VERIFY(int bytchk) &quot;Verify (bytchk %d)&quot;
scsi_disk_emulate_command_WRITE_SAME(int cmd, size_t xfer) &quot;WRITE SAME %d (len %zd)&quot;
scsi_disk_emulate_command_UNKNOWN(int cmd, const char *name) &quot;Unknown SCSI command (0x%2.2x=%s)&quot;
scsi_disk_emulate_command_FORMAT_UNIT(size_t xfer) &quot;Format Unit (len %zu)&quot;
scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) &quot;Read (sector %&quot; PRId64 &quot;, count %u)&quot;
scsi_disk_dma_command_WRITE(const char *cmd, uint64_t lba, int len) &quot;Write %s(sector %&quot; PRId64 &quot;, count %u)&quot;
scsi_disk_new_request(uint32_t lun, uint32_t tag, const char *line) &quot;Command: lun=%d tag=0x%x data=%s&quot;
scsi_disk_aio_sgio_command(uint32_t tag, uint8_t cmd, uint64_t lba, int len, uint32_t timeout) &quot;disk aio sgio: tag=0x%x cmd=0x%x (sector %&quot; PRId64 &quot;, count %d) timeout=%u&quot;
scsi_disk_mode_select_page_truncated(int page, int len, int page_len) &quot;page %d expected length %d but received length %d&quot;
scsi_disk_mode_select_set_blocksize(int blocksize) &quot;set block size to %d&quot;

# scsi-generic.c
scsi_generic_command_complete_noio(void *req, uint32_t tag, int statuc) &quot;Command complete %p tag=0x%x status=%d&quot;
scsi_generic_read_complete(uint32_t tag, int len) &quot;Data ready tag=0x%x len=%d&quot;
scsi_generic_read_data(uint32_t tag) &quot;scsi_read_data tag=0x%x&quot;
scsi_generic_write_complete(int ret) &quot;scsi_write_complete() ret = %d&quot;
scsi_generic_write_complete_blocksize(int blocksize) &quot;block size %d&quot;
scsi_generic_write_data(uint32_t tag) &quot;scsi_write_data tag=0x%x&quot;
scsi_generic_send_command(const char *line) &quot;Command: data=%s&quot;
scsi_generic_realize_type(int type) &quot;device type %d&quot;
scsi_generic_realize_blocksize(int blocksize) &quot;block size %d&quot;
scsi_generic_aio_sgio_command(uint32_t tag, uint8_t cmd, uint32_t timeout) &quot;generic aio sgio: tag=0x%x cmd=0x%x timeout=%u&quot;
scsi_generic_ioctl_sgio_command(uint8_t cmd, uint32_t timeout) &quot;generic ioctl sgio: cmd=0x%x timeout=%u&quot;
scsi_generic_ioctl_sgio_done(uint8_t cmd, int ret, uint8_t status, uint8_t host_status) &quot;generic ioctl sgio: cmd=0x%x ret=%d status=0x%x host_status=0x%x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# allwinner-sdhost.c
allwinner_sdhost_set_inserted(bool inserted) &quot;inserted %u&quot;
allwinner_sdhost_process_desc(uint64_t desc_addr, uint32_t desc_size, bool is_write, uint32_t max_bytes) &quot;desc_addr 0x%&quot; PRIx64 &quot; desc_size %&quot; PRIu32 &quot; is_write %u max_bytes %&quot; PRIu32
allwinner_sdhost_read(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_sdhost_write(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %&quot; PRIu32
allwinner_sdhost_update_irq(uint32_t irq) &quot;IRQ bits 0x%&quot; PRIx32

# bcm2835_sdhost.c
bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) &quot;offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
bcm2835_sdhost_edm_change(const char *why, uint32_t edm) &quot;(%s) EDM now 0x%x&quot;
bcm2835_sdhost_update_irq(uint32_t irq) &quot;IRQ bits 0x%x&quot;

# core.c
sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg) &quot;@%s CMD%02d arg 0x%08x&quot;
sdbus_read(const char *bus_name, uint8_t value) &quot;@%s value 0x%02x&quot;
sdbus_write(const char *bus_name, uint8_t value) &quot;@%s value 0x%02x&quot;
sdbus_set_voltage(const char *bus_name, uint16_t millivolts) &quot;@%s %u (mV)&quot;
sdbus_get_dat_lines(const char *bus_name, uint8_t dat_lines) &quot;@%s dat_lines: %u&quot;
sdbus_get_cmd_line(const char *bus_name, bool cmd_line) &quot;@%s cmd_line: %u&quot;

# sdhci.c
sdhci_set_inserted(const char *level) &quot;card state changed: %s&quot;
sdhci_send_command(uint8_t cmd, uint32_t arg) &quot;CMD%02u ARG[0x%08x]&quot;
sdhci_error(const char *msg) &quot;%s&quot;
sdhci_response4(uint32_t r0) &quot;RSPREG[31..0]=0x%08x&quot;
sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) &quot;RSPREG[127..96]=0x%08x, RSPREG[95..64]=0x%08x, RSPREG[63..32]=0x%08x, RSPREG[31..0]=0x%08x&quot;
sdhci_end_transfer(uint8_t cmd, uint32_t arg) &quot;Automatically issue CMD%02u 0x%08x&quot;
sdhci_adma(const char *desc, uint32_t sysad) &quot;%s: admasysaddr=0x%&quot; PRIx32
sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) &quot;addr=0x%08&quot; PRIx64 &quot;, len=%d, attr=0x%x&quot;
sdhci_adma_transfer_completed(void) &quot;&quot;
sdhci_access(const char *access, unsigned int size, uint64_t offset, const char *dir, uint64_t val, uint64_t val2) &quot;%s%u: addr[0x%04&quot; PRIx64 &quot;] %s 0x%08&quot; PRIx64 &quot; (%&quot; PRIu64 &quot;)&quot;
sdhci_read_dataport(uint16_t data_count) &quot;all %u bytes of data have been read from input buffer&quot;
sdhci_write_dataport(uint16_t data_count) &quot;write buffer filled with %u bytes of data&quot;
sdhci_capareg(const char *desc, uint16_t val) &quot;%s: %u&quot;

# sd.c
sdcard_normal_command(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t arg, const char *state) &quot;%s %20s/ CMD%02d arg 0x%08x (state %s)&quot;
sdcard_app_command(const char *proto, const char *acmd_desc, uint8_t acmd, uint32_t arg, const char *state) &quot;%s %23s/ACMD%02d arg 0x%08x (state %s)&quot;
sdcard_response(const char *rspdesc, int rsplen) &quot;%s (sz:%d)&quot;
sdcard_powerup(void) &quot;&quot;
sdcard_inquiry_cmd41(void) &quot;&quot;
sdcard_reset(void) &quot;&quot;
sdcard_set_blocklen(uint16_t length) &quot;0x%03x&quot;
sdcard_inserted(bool readonly) &quot;read_only: %u&quot;
sdcard_ejected(void) &quot;&quot;
sdcard_erase(uint32_t first, uint32_t last) &quot;addr first 0x%&quot; PRIx32&quot; last 0x%&quot; PRIx32
sdcard_lock(void) &quot;&quot;
sdcard_unlock(void) &quot;&quot;
sdcard_read_block(uint64_t addr, uint32_t len) &quot;addr 0x%&quot; PRIx64 &quot; size 0x%x&quot;
sdcard_write_block(uint64_t addr, uint32_t len) &quot;addr 0x%&quot; PRIx64 &quot; size 0x%x&quot;
sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint8_t value) &quot;%s %20s/ CMD%02d value 0x%02x&quot;
sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t length) &quot;%s %20s/ CMD%02d len %&quot; PRIu32
sdcard_set_voltage(uint16_t millivolts) &quot;%u mV&quot;

# pxa2xx_mmci.c
pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) &quot;size %d addr 0x%02x value 0x%08x&quot;
pxa2xx_mmci_write(uint8_t size, uint32_t addr, uint32_t value) &quot;size %d addr 0x%02x value 0x%08x&quot;

# pl181.c
pl181_command_send(uint8_t cmd, uint32_t arg) &quot;sending CMD%02d arg 0x%08&quot; PRIx32
pl181_command_sent(void) &quot;command sent&quot;
pl181_command_response_pending(void) &quot;response received&quot;
pl181_command_timeout(void) &quot;command timeouted&quot;
pl181_fifo_push(uint32_t data) &quot;FIFO push 0x%08&quot; PRIx32
pl181_fifo_pop(uint32_t data) &quot;FIFO pop 0x%08&quot; PRIx32
pl181_fifo_transfer_complete(void) &quot;FIFO transfer complete&quot;
pl181_data_engine_idle(void) &quot;data engine idle&quot;

# aspeed_sdhci.c
aspeed_sdhci_read(uint64_t addr, uint32_t size, uint64_t data) &quot;@0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64
aspeed_sdhci_write(uint64_t addr, uint32_t size, uint64_t data) &quot;@0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64
# sh7750.c
sh7750_porta(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) &quot;porta changed from 0x%04x to 0x%04x\npdtra=0x%04x, pctra=0x%08x&quot;
sh7750_portb(uint16_t prev, uint16_t cur, uint16_t pdtr, uint16_t pctr) &quot;portb changed from 0x%04x to 0x%04x\npdtrb=0x%04x, pctrb=0x%08x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# sun4m.c
sun4m_cpu_set_irq_raise(int level) &quot;Raise CPU IRQ %d&quot;
sun4m_cpu_set_irq_lower(int level) &quot;Lower CPU IRQ %d&quot;

# sun4m_iommu.c
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) &quot;read reg[0x%&quot;PRIx64&quot;] = 0x%x&quot;
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) &quot;write reg[0x%&quot;PRIx64&quot;] = 0x%x&quot;
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) &quot;iostart = 0x%&quot;PRIx64
sun4m_iommu_mem_writel_tlbflush(uint32_t val) &quot;tlb flush 0x%x&quot;
sun4m_iommu_mem_writel_pgflush(uint32_t val) &quot;page flush 0x%x&quot;
sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) &quot;get flags addr 0x%&quot;PRIx64&quot; =&gt; pte 0x%&quot;PRIx64&quot;, *pte = 0x%x&quot;
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) &quot;xlate dva 0x%&quot;PRIx64&quot; =&gt; pa 0x%&quot;PRIx64&quot; iopte = 0x%x&quot;
sun4m_iommu_bad_addr(uint64_t addr) &quot;bad addr 0x%&quot;PRIx64

# leon3.c
leon3_set_irq(int intno) &quot;Set CPU IRQ %d&quot;
leon3_reset_irq(int intno) &quot;Reset CPU IRQ %d&quot;
int_helper_icache_freeze(void) &quot;Instruction cache: freeze&quot;
int_helper_dcache_freeze(void) &quot;Data cache: freeze&quot;
# See docs/devel/tracing.rst for syntax documentation.

# sun4u.c
ebus_isa_irq_handler(int n, int level) &quot;Set ISA IRQ %d level %d&quot;

# sun4u_iommu.c
sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) &quot;addr: 0x%&quot;PRIx64&quot; val: 0x%&quot;PRIx64&quot; size: %d&quot;
sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) &quot;addr: 0x%&quot;PRIx64&quot; val: 0x%&quot;PRIx64&quot; size: %d&quot;
sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) &quot;xlate 0x%&quot;PRIx64&quot; =&gt; pa 0x%&quot;PRIx64&quot; tte: 0x%&quot;PRIx64

# sparc64.c
sparc64_cpu_ivec_raise_irq(int irq) &quot;Raise IVEC IRQ %d&quot;
sparc64_cpu_ivec_lower_irq(int irq) &quot;Lower IVEC IRQ %d&quot;
sparc64_cpu_tick_irq_disabled(void) &quot;tick_irq: softint disabled&quot;
sparc64_cpu_tick_irq_fire(void) &quot;tick_irq: fire&quot;
sparc64_cpu_stick_irq_disabled(void) &quot;stick_irq: softint disabled&quot;
sparc64_cpu_stick_irq_fire(void) &quot;stick_irq: fire&quot;
sparc64_cpu_hstick_irq_disabled(void) &quot;hstick_irq: softint disabled&quot;
sparc64_cpu_hstick_irq_fire(void) &quot;hstick_irq: fire&quot;
sparc64_cpu_tick_set_count(const char *name, uint64_t real_count, const char *npt, void *p) &quot;%s set_count count=0x%&quot;PRIx64&quot; (npt %s) p=%p&quot;
sparc64_cpu_tick_get_count(const char *name, uint64_t real_count, const char *npt, void *p) &quot;%s get_count count=0x%&quot;PRIx64&quot; (npt %s) p=%p&quot;
sparc64_cpu_tick_set_limit(const char *name, uint64_t real_limit, const char *dis, void *p, uint64_t limit, uint64_t t, uint64_t dt) &quot;%s set_limit limit=0x%&quot;PRIx64 &quot; (%s) p=%p called with limit=0x%&quot;PRIx64&quot; at 0x%&quot;PRIx64&quot; (delta=0x%&quot;PRIx64&quot;)&quot;
sparc64_cpu_tick_set_limit_zero(const char *name) &quot;%s set_limit limit=ZERO - not starting timer&quot;
# aspeed_smc.c

aspeed_smc_flash_set_segment(int cs, uint64_t reg, uint64_t start, uint64_t end) &quot;CS%d segreg=0x%&quot;PRIx64&quot; [ 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot; ]&quot;
aspeed_smc_flash_read(int cs, uint64_t addr,  uint32_t size, uint64_t data, int mode) &quot;CS%d @0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64&quot; mode:%d&quot;
aspeed_smc_do_snoop(int cs, int index, int dummies, int data) &quot;CS%d index:0x%x dummies:%d data:0x%x&quot;
aspeed_smc_flash_write(int cs, uint64_t addr,  uint32_t size, uint64_t data, int mode) &quot;CS%d @0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64&quot; mode:%d&quot;
aspeed_smc_read(uint64_t addr,  uint32_t size, uint64_t data) &quot;@0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64
aspeed_smc_dma_checksum(uint32_t addr, uint32_t data) &quot;0x%08x: 0x%08x&quot;
aspeed_smc_dma_rw(const char *dir, uint32_t flash_addr, uint32_t dram_addr, uint32_t size) &quot;%s flash:@0x%08x dram:@0x%08x size:0x%08x&quot;
aspeed_smc_write(uint64_t addr,  uint32_t size, uint64_t data) &quot;@0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64
aspeed_smc_flash_select(int cs, const char *prefix) &quot;CS%d %sselect&quot;

# npcm7xx_fiu.c

npcm7xx_fiu_enter_reset(const char *id, int reset_type) &quot;%s reset type: %d&quot;
npcm7xx_fiu_hold_reset(const char *id) &quot;%s&quot;
npcm7xx_fiu_select(const char *id, int cs) &quot;%s select CS%d&quot;
npcm7xx_fiu_deselect(const char *id, int cs) &quot;%s deselect CS%d&quot;
npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32
npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value: 0x%08&quot; PRIx32
npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) &quot;%s[%d] offset: 0x%08&quot; PRIx64 &quot; size: %u value: 0x%&quot; PRIx64
npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsigned int size, uint64_t value) &quot;%s[%d] offset: 0x%08&quot; PRIx64 &quot; size: %u value: 0x%&quot; PRIx64

# npcm_pspi.c
npcm_pspi_enter_reset(const char *id, int reset_type) &quot;%s reset type: %d&quot;
npcm_pspi_ctrl_read(const char *id, uint64_t addr, uint16_t data) &quot;%s offset: 0x%03&quot; PRIx64 &quot; value: 0x%04&quot; PRIx16
npcm_pspi_ctrl_write(const char *id, uint64_t addr, uint16_t data) &quot;%s offset: 0x%03&quot; PRIx64 &quot; value: 0x%04&quot; PRIx16

# ibex_spi_host.c

ibex_spi_host_reset(const char *msg) &quot;%s&quot;
ibex_spi_host_transfer(uint32_t tx_data, uint32_t rx_data) &quot;tx_data: 0x%&quot; PRIx32 &quot; rx_data: @0x%&quot; PRIx32
ibex_spi_host_write(uint64_t addr, uint32_t size, uint64_t data) &quot;@0x%&quot; PRIx64 &quot; size %u: 0x%&quot; PRIx64
ibex_spi_host_read(uint64_t addr, uint32_t size) &quot;@0x%&quot; PRIx64 &quot; size %u:&quot;
# See docs/devel/tracing.rst for syntax documentation.

# slavio_timer.c
slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) &quot;limit 0x%&quot;PRIx64&quot; count 0x%x0x%08x&quot;
slavio_timer_irq(uint32_t counthigh, uint32_t count) &quot;callback: count 0x%x0x%08x&quot;
slavio_timer_mem_readl_invalid(uint64_t addr) &quot;invalid read address 0x%&quot;PRIx64
slavio_timer_mem_readl(uint64_t addr, uint32_t ret) &quot;read 0x%&quot;PRIx64&quot; = 0x%08x&quot;
slavio_timer_mem_writel(uint64_t addr, uint32_t val) &quot;write 0x%&quot;PRIx64&quot; = 0x%08x&quot;
slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) &quot;processor %d user timer set to 0x%016&quot;PRIx64
slavio_timer_mem_writel_counter_invalid(void) &quot;not user timer&quot;
slavio_timer_mem_writel_status_start(unsigned int timer_index) &quot;processor %d user timer started&quot;
slavio_timer_mem_writel_status_stop(unsigned int timer_index) &quot;processor %d user timer stopped&quot;
slavio_timer_mem_writel_mode_user(unsigned int timer_index) &quot;processor %d changed from counter to user timer&quot;
slavio_timer_mem_writel_mode_counter(unsigned int timer_index) &quot;processor %d changed from user timer to counter&quot;
slavio_timer_mem_writel_mode_invalid(void) &quot;not system timer&quot;
slavio_timer_mem_writel_invalid(uint64_t addr) &quot;invalid write address 0x%&quot;PRIx64

# grlib_gptimer.c
grlib_gptimer_enable(int id, uint32_t count) &quot;timer:%d set count 0x%x and run&quot;
grlib_gptimer_disabled(int id, uint32_t config) &quot;timer:%d Timer disable config 0x%x&quot;
grlib_gptimer_restart(int id, uint32_t reload) &quot;timer:%d reload val: 0x%x&quot;
grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) &quot;scaler:0x%x freq:%uHz&quot;
grlib_gptimer_hit(int id) &quot;timer:%d HIT&quot;
grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) &quot;timer:%d addr 0x%&quot;PRIx64&quot; 0x%x&quot;
grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) &quot;timer:%d addr 0x%&quot;PRIx64&quot; 0x%x&quot;

# aspeed_timer.c
aspeed_timer_ctrl_enable(uint8_t i, bool enable) &quot;Timer %&quot; PRIu8 &quot;: %d&quot;
aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) &quot;Timer %&quot; PRIu8 &quot;: %d&quot;
aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) &quot;Timer %&quot; PRIu8 &quot;: %d&quot;
aspeed_timer_ctrl_pulse_enable(uint8_t i, bool enable) &quot;Timer %&quot; PRIu8 &quot;: %d&quot;
aspeed_timer_set_ctrl2(uint32_t value) &quot;Value: 0x%&quot; PRIx32
aspeed_timer_set_value(int timer, int reg, uint32_t value) &quot;Timer %d register %d: 0x%&quot; PRIx32
aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) &quot;From 0x%&quot; PRIx64 &quot;: of size %u: 0x%&quot; PRIx64

# armv7m_systick.c
systick_reload(void) &quot;systick reload&quot;
systick_timer_tick(void) &quot;systick reload&quot;
systick_read(uint64_t addr, uint32_t value, unsigned size) &quot;systick read addr 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; size %u&quot;
systick_write(uint64_t addr, uint32_t value, unsigned size) &quot;systick write addr 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; size %u&quot;

# cmsdk-apb-timer.c
cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB timer read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB timer write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_timer_reset(void) &quot;CMSDK APB timer: reset&quot;

# cmsdk-apb-dualtimer.c
cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB dualtimer read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB dualtimer write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_dualtimer_reset(void) &quot;CMSDK APB dualtimer: reset&quot;

# npcm7xx_timer.c
npcm7xx_timer_read(const char *id, uint64_t offset, uint64_t value) &quot; %s offset: 0x%04&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
npcm7xx_timer_write(const char *id, uint64_t offset, uint64_t value) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
npcm7xx_timer_irq(const char *id, int timer, int state) &quot;%s timer %d state %d&quot;

# nrf51_timer.c
nrf51_timer_read(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) &quot;timer %u read addr 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; size %u&quot;
nrf51_timer_write(uint8_t timer_id, uint64_t addr, uint32_t value, unsigned size) &quot;timer %u write addr 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32 &quot; size %u&quot;
nrf51_timer_set_count(uint8_t timer_id, uint8_t counter_id, uint32_t value) &quot;timer %u counter %u count 0x%&quot; PRIx32

# bcm2835_systmr.c
bcm2835_systmr_timer_expired(unsigned id) &quot;timer #%u expired&quot;
bcm2835_systmr_irq_ack(unsigned id) &quot;timer #%u acked&quot;
bcm2835_systmr_read(uint64_t offset, uint64_t data) &quot;timer read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64
bcm2835_systmr_write(uint64_t offset, uint32_t data) &quot;timer write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx32
bcm2835_systmr_run(unsigned id, uint64_t delay_us) &quot;timer #%u expiring in %&quot;PRIu64&quot; us&quot;

# avr_timer16.c
avr_timer16_read(uint8_t addr, uint8_t value) &quot;timer16 read addr:%u value:%u&quot;
avr_timer16_read_ifr(uint8_t value) &quot;timer16 read addr:ifr value:%u&quot;
avr_timer16_read_imsk(uint8_t value) &quot;timer16 read addr:imsk value:%u&quot;
avr_timer16_write(uint8_t addr, uint8_t value) &quot;timer16 write addr:%u value:%u&quot;
avr_timer16_write_imsk(uint8_t value) &quot;timer16 write addr:imsk value:%u&quot;
avr_timer16_interrupt_count(uint8_t cnt) &quot;count: %u&quot;
avr_timer16_interrupt_overflow(const char *reason) &quot;overflow: %s&quot;
avr_timer16_next_alarm(uint64_t delay_ns) &quot;next alarm: %&quot; PRIu64 &quot; ns from now&quot;
avr_timer16_clksrc_update(uint64_t freq_hz, uint64_t period_ns, uint64_t delay_s) &quot;timer frequency: %&quot; PRIu64 &quot; Hz, period: %&quot; PRIu64 &quot; ns (%&quot; PRId64 &quot; us)&quot;

# sse_counter.c
sse_counter_control_read(uint64_t offset, uint64_t data, unsigned size) &quot;SSE system counter control frame read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
sse_counter_control_write(uint64_t offset, uint64_t data, unsigned size) &quot;SSE system counter control framen write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
sse_counter_status_read(uint64_t offset, uint64_t data, unsigned size) &quot;SSE system counter status frame read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
sse_counter_status_write(uint64_t offset, uint64_t data, unsigned size) &quot;SSE system counter status frame write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
sse_counter_reset(void) &quot;SSE system counter: reset&quot;

# sse_timer.c
sse_timer_read(uint64_t offset, uint64_t data, unsigned size) &quot;SSE system timer read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
sse_timer_write(uint64_t offset, uint64_t data, unsigned size) &quot;SSE system timer write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
sse_timer_reset(void) &quot;SSE system timer: reset&quot;

# sifive_pwm.c
sifive_pwm_set_alarm(uint64_t alarm, uint64_t now) &quot;Setting alarm to: 0x%&quot; PRIx64 &quot;, now: 0x%&quot; PRIx64
sifive_pwm_interrupt(int num) &quot;Interrupt %d&quot;
sifive_pwm_read(uint64_t offset) &quot;Read at address: 0x%&quot; PRIx64
sifive_pwm_write(uint64_t data, uint64_t offset) &quot;Write 0x%&quot; PRIx64 &quot; at address: 0x%&quot; PRIx64

# sh_timer.c
sh_timer_start_stop(int enable, int current) &quot;%d (%d)&quot;
sh_timer_read(uint64_t offset) &quot;tmu012_read 0x%&quot; PRIx64
sh_timer_write(uint64_t offset, uint64_t value) &quot;tmu012_write 0x%&quot; PRIx64 &quot; 0x%08&quot; PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# tpm_crb.c
tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) &quot;CRB read 0x%016&quot; PRIx64 &quot; len:%u val: 0x%&quot; PRIx32
tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) &quot;CRB write 0x%016&quot; PRIx64 &quot; len:%u val: 0x%&quot; PRIx32

# tpm_tis_common.c
tpm_tis_raise_irq(uint32_t irqmask) &quot;Raising IRQ for flag 0x%08x&quot;
tpm_tis_new_active_locality(uint8_t locty) &quot;Active locality is now %d&quot;
tpm_tis_abort(uint8_t locty) &quot;New active locality is %d&quot;
tpm_tis_data_read(uint32_t value, uint32_t off) &quot;byte 0x%02x   [%d]&quot;
tpm_tis_mmio_read(unsigned size, uint32_t addr, uint32_t val)  &quot; read.%u(0x%08x) = 0x%08x&quot;
tpm_tis_mmio_write(unsigned size, uint32_t addr, uint32_t val) &quot;write.%u(0x%08x) = 0x%08x&quot;
tpm_tis_mmio_write_locty4(void) &quot;Access to locality 4 only allowed from hardware&quot;
tpm_tis_mmio_write_release_locty(uint8_t locty) &quot;Releasing locality %d&quot;
tpm_tis_mmio_write_locty_req_use(uint8_t locty) &quot;Locality %d requests use&quot;
tpm_tis_mmio_write_next_locty(uint8_t locty) &quot;Next active locality is %d&quot;
tpm_tis_mmio_write_locty_seized(uint8_t locty, uint8_t active) &quot;Locality %d seized from locality %d&quot;
tpm_tis_mmio_write_init_abort(void) &quot;Initiating abort&quot;
tpm_tis_mmio_write_lowering_irq(void) &quot;Lowering IRQ&quot;
tpm_tis_mmio_write_data2send(uint32_t value, unsigned size) &quot;Data to send to TPM: 0x%08x (size=%d)&quot;
tpm_tis_pre_save(uint8_t locty, uint32_t rw_offset) &quot;locty: %d, rw_offset = %u&quot;

# tpm_ppi.c
tpm_ppi_memset(uint8_t *ptr, size_t size) &quot;memset: %p %zu&quot;

# tpm_spapr.c
tpm_spapr_do_crq(uint8_t raw1, uint8_t raw2) &quot;1st 2 bytes in CRQ: 0x%02x 0x%02x&quot;
tpm_spapr_do_crq_crq_result(void) &quot;SPAPR_VTPM_INIT_CRQ_RESULT&quot;
tpm_spapr_do_crq_crq_complete_result(void) &quot;SPAPR_VTPM_INIT_CRQ_COMP_RESULT&quot;
tpm_spapr_do_crq_tpm_command(void) &quot;got TPM command payload&quot;
tpm_spapr_do_crq_tpm_get_rtce_buffer_size(size_t buffersize) &quot;response: buffer size is %zu&quot;
tpm_spapr_do_crq_get_version(uint32_t version) &quot;response: version %u&quot;
tpm_spapr_do_crq_prepare_to_suspend(void) &quot;response: preparing to suspend&quot;
tpm_spapr_do_crq_unknown_msg_type(uint8_t type) &quot;Unknown message type 0x%02x&quot;
tpm_spapr_do_crq_unknown_crq(uint8_t raw1, uint8_t raw2) &quot;unknown CRQ 0x%02x 0x%02x ...&quot;
tpm_spapr_post_load(void) &quot;Delivering TPM response after resume&quot;
tpm_spapr_caught_response(uint32_t v) &quot;Caught response to deliver after resume: %u bytes&quot;

# tpm_tis_i2c.c
tpm_tis_i2c_recv(uint8_t data) &quot;TPM I2C read: 0x%X&quot;
tpm_tis_i2c_send(uint8_t data) &quot;TPM I2C write: 0x%X&quot;
tpm_tis_i2c_event(const char *event) &quot;TPM I2C event: %s&quot;
tpm_tis_i2c_send_reg(const char *name, int reg) &quot;TPM I2C write register: %s(0x%X)&quot;
# ufs.c
ufs_irq_raise(void) &quot;INTx&quot;
ufs_irq_lower(void) &quot;INTx&quot;
ufs_mmio_read(uint64_t addr, uint64_t data, unsigned size) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64&quot; size %d&quot;
ufs_mmio_write(uint64_t addr, uint64_t data, unsigned size) &quot;addr 0x%&quot;PRIx64&quot; data 0x%&quot;PRIx64&quot; size %d&quot;
ufs_process_db(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot;&quot;
ufs_process_req(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot;&quot;
ufs_complete_req(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot;&quot;
ufs_sendback_req(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot;&quot;
ufs_exec_nop_cmd(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot;&quot;
ufs_exec_scsi_cmd(uint32_t slot, uint8_t lun, uint8_t opcode) &quot;slot %&quot;PRIu32&quot;, lun 0x%&quot;PRIx8&quot;, opcode 0x%&quot;PRIx8&quot;&quot;
ufs_exec_query_cmd(uint32_t slot, uint8_t opcode) &quot;slot %&quot;PRIu32&quot;, opcode 0x%&quot;PRIx8&quot;&quot;
ufs_process_uiccmd(uint32_t uiccmd, uint32_t ucmdarg1, uint32_t ucmdarg2, uint32_t ucmdarg3) &quot;uiccmd 0x%&quot;PRIx32&quot;, ucmdarg1 0x%&quot;PRIx32&quot;, ucmdarg2 0x%&quot;PRIx32&quot;, ucmdarg3 0x%&quot;PRIx32&quot;&quot;

# error condition
ufs_err_dma_read_utrd(uint32_t slot, uint64_t addr) &quot;failed to read utrd. UTRLDBR slot %&quot;PRIu32&quot;, UTRD dma addr %&quot;PRIu64&quot;&quot;
ufs_err_dma_read_req_upiu(uint32_t slot, uint64_t addr) &quot;failed to read req upiu. UTRLDBR slot %&quot;PRIu32&quot;, request upiu addr %&quot;PRIu64&quot;&quot;
ufs_err_dma_read_prdt(uint32_t slot, uint64_t addr) &quot;failed to read prdt. UTRLDBR slot %&quot;PRIu32&quot;, prdt addr %&quot;PRIu64&quot;&quot;
ufs_err_dma_write_utrd(uint32_t slot, uint64_t addr) &quot;failed to write utrd. UTRLDBR slot %&quot;PRIu32&quot;, UTRD dma addr %&quot;PRIu64&quot;&quot;
ufs_err_dma_write_rsp_upiu(uint32_t slot, uint64_t addr) &quot;failed to write rsp upiu. UTRLDBR slot %&quot;PRIu32&quot;, response upiu addr %&quot;PRIu64&quot;&quot;
ufs_err_utrl_slot_error(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot; is in error&quot;
ufs_err_utrl_slot_busy(uint32_t slot) &quot;UTRLDBR slot %&quot;PRIu32&quot; is busy&quot;
ufs_err_unsupport_register_offset(uint32_t offset) &quot;Register offset 0x%&quot;PRIx32&quot; is not yet supported&quot;
ufs_err_invalid_register_offset(uint32_t offset) &quot;Register offset 0x%&quot;PRIx32&quot; is invalid&quot;
ufs_err_scsi_cmd_invalid_lun(uint8_t lun) &quot;scsi command has invalid lun: 0x%&quot;PRIx8&quot;&quot;
ufs_err_query_flag_not_readable(uint8_t idn) &quot;query flag idn 0x%&quot;PRIx8&quot; is denied to read&quot;
ufs_err_query_flag_not_writable(uint8_t idn) &quot;query flag idn 0x%&quot;PRIx8&quot; is denied to write&quot;
ufs_err_query_attr_not_readable(uint8_t idn) &quot;query attribute idn 0x%&quot;PRIx8&quot; is denied to read&quot;
ufs_err_query_attr_not_writable(uint8_t idn) &quot;query attribute idn 0x%&quot;PRIx8&quot; is denied to write&quot;
ufs_err_query_invalid_opcode(uint8_t opcode) &quot;query request has invalid opcode. opcode: 0x%&quot;PRIx8&quot;&quot;
ufs_err_query_invalid_idn(uint8_t opcode, uint8_t idn) &quot;query request has invalid idn. opcode: 0x%&quot;PRIx8&quot;, idn 0x%&quot;PRIx8&quot;&quot;
ufs_err_query_invalid_index(uint8_t opcode, uint8_t index) &quot;query request has invalid index. opcode: 0x%&quot;PRIx8&quot;, index 0x%&quot;PRIx8&quot;&quot;
ufs_err_invalid_trans_code(uint32_t slot, uint8_t trans_code) &quot;request upiu has invalid transaction code. slot: %&quot;PRIu32&quot;, trans_code: 0x%&quot;PRIx8&quot;&quot;
# See docs/devel/tracing.rst for syntax documentation.

# core.c
usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) &quot;bus %d, port %s, ep %d, packet %p, state %s -&gt; %s&quot;
usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) &quot;bus %d, port %s, ep %d, packet %p, state %s, expected %s&quot;

# bus.c
usb_port_claim(int bus, const char *port) &quot;bus %d, port %s&quot;
usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) &quot;bus %d, port %s, devspeed %s, portspeed %s&quot;
usb_port_detach(int bus, const char *port) &quot;bus %d, port %s&quot;
usb_port_release(int bus, const char *port) &quot;bus %d, port %s&quot;

# hcd-ohci-pci.c
usb_ohci_exit(const char *s) &quot;%s&quot;

# hcd-ohci.c
usb_ohci_iso_td_read_failed(uint32_t addr) &quot;ISO_TD read error at 0x%x&quot;
usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) &quot;ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count  0x%.8x relative %d&quot;
usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) &quot;0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x&quot;
usb_ohci_iso_td_relative_frame_number_neg(int rel) &quot;ISO_TD R=%d &lt; 0&quot;
usb_ohci_iso_td_relative_frame_number_big(int rel, int count) &quot;ISO_TD R=%d &gt; FC=%d&quot;
usb_ohci_iso_td_bad_direction(int dir) &quot;Bad direction %d&quot;
usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) &quot;ISO_TD bp 0x%.8x be 0x%.8x&quot;
usb_ohci_iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) &quot;ISO_TD cc != not accessed 0x%.8x 0x%.8x&quot;
usb_ohci_iso_td_bad_cc_overrun(uint32_t start, uint32_t next) &quot;ISO_TD start_offset=0x%.8x &gt; next_offset=0x%.8x&quot;
usb_ohci_iso_td_so(uint32_t so, uint32_t eo, uint32_t s, uint32_t e, const char *str, ssize_t len, int ret) &quot;0x%.8x eo 0x%.8x\nsa 0x%.8x ea 0x%.8x\ndir %s len %zu ret %d&quot;
usb_ohci_iso_td_data_overrun(int ret, ssize_t len) &quot;DataOverrun %d &gt; %zu&quot;
usb_ohci_iso_td_data_underrun(int ret) &quot;DataUnderrun %d&quot;
usb_ohci_iso_td_nak(int ret) &quot;got NAK/STALL %d&quot;
usb_ohci_iso_td_bad_response(int ret) &quot;Bad device response %d&quot;
usb_ohci_port_attach(int index) &quot;port #%d&quot;
usb_ohci_port_detach(int index) &quot;port #%d&quot;
usb_ohci_port_wakeup(int index) &quot;port #%d&quot;
usb_ohci_port_suspend(int index) &quot;port #%d&quot;
usb_ohci_port_reset(int index) &quot;port #%d&quot;
usb_ohci_remote_wakeup(const char *s) &quot;%s: SUSPEND-&gt;RESUME&quot;
usb_ohci_reset(const char *s) &quot;%s&quot;
usb_ohci_start(const char *s) &quot;%s: USB Operational&quot;
usb_ohci_resume(const char *s) &quot;%s: USB Resume&quot;
usb_ohci_stop(const char *s) &quot;%s: USB Suspended&quot;
usb_ohci_set_ctl(const char *s, uint32_t new_state) &quot;%s: new state 0x%x&quot;
usb_ohci_td_underrun(void) &quot;&quot;
usb_ohci_td_dev_error(void) &quot;&quot;
usb_ohci_td_nak(void) &quot;&quot;
usb_ohci_td_stall(void) &quot;&quot;
usb_ohci_td_babble(void) &quot;&quot;
usb_ohci_td_bad_device_response(int rc) &quot;%d&quot;
usb_ohci_td_read_error(uint32_t addr) &quot;TD read error at 0x%x&quot;
usb_ohci_td_bad_direction(int dir) &quot;Bad direction %d&quot;
usb_ohci_td_skip_async(void) &quot;&quot;
usb_ohci_td_pkt_hdr(uint32_t addr, int64_t pktlen, int64_t len, const char *s, int flag_r, uint32_t cbp, uint32_t be) &quot; TD @ 0x%.8x %&quot; PRId64 &quot; of %&quot; PRId64 &quot; bytes %s r=%d cbp=0x%.8x be=0x%.8x&quot;
usb_ohci_td_pkt_short(const char *dir, const char *buf) &quot;%s data: %s&quot;
usb_ohci_td_pkt_full(const char *dir, const char *buf) &quot;%s data: %s&quot;
usb_ohci_td_too_many_pending(int ep) &quot;ep=%d&quot;
usb_ohci_td_packet_status(int status) &quot;status=%d&quot;
usb_ohci_ed_read_error(uint32_t addr) &quot;ED read error at 0x%x&quot;
usb_ohci_ed_pkt(uint32_t cur, int h, int c, uint32_t head, uint32_t tail, uint32_t next) &quot;ED @ 0x%.8x h=%u c=%u\n  head=0x%.8x tailp=0x%.8x next=0x%.8x&quot;
usb_ohci_ed_pkt_flags(uint32_t fa, uint32_t en, uint32_t d, int s, int k, int f, uint32_t mps) &quot;fa=%u en=%u d=%u s=%u k=%u f=%u mps=%u&quot;
usb_ohci_hcca_read_error(uint32_t addr) &quot;HCCA read error at 0x%x&quot;
usb_ohci_mem_read(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) &quot;%d %s 0x%x %d -&gt; 0x%x&quot;
usb_ohci_mem_port_read(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) &quot;%d %s[%d] 0x%x %d -&gt; 0x%x&quot;
usb_ohci_mem_read_unaligned(uint32_t addr) &quot;at 0x%x&quot;
usb_ohci_mem_read_bad_offset(uint32_t addr) &quot;0x%x&quot;
usb_ohci_mem_write(uint32_t size, const char *name, uint32_t addr, uint32_t offs, uint32_t val) &quot;%d %s 0x%x %d &lt;- 0x%x&quot;
usb_ohci_mem_port_write(uint32_t size, const char *name, uint32_t port, uint32_t addr, uint32_t offs, uint32_t val) &quot;%d %s[%d] 0x%x %d &lt;- 0x%x&quot;
usb_ohci_mem_write_unaligned(uint32_t addr) &quot;at 0x%x&quot;
usb_ohci_mem_write_bad_offset(uint32_t addr) &quot;0x%x&quot;
usb_ohci_process_lists(uint32_t head, uint32_t cur) &quot;head 0x%x, cur 0x%x&quot;
usb_ohci_set_frame_interval(const char *name, uint16_t fi_x, uint16_t fi_u) &quot;%s: FrameInterval = 0x%x (%u)&quot;
usb_ohci_hub_power_up(void) &quot;powered up all ports&quot;
usb_ohci_hub_power_down(void) &quot;powered down all ports&quot;
usb_ohci_init_time(int64_t frametime, int64_t bittime) &quot;usb_bit_time=%&quot; PRId64 &quot; usb_frame_time=%&quot; PRId64
usb_ohci_die(void) &quot;&quot;
usb_ohci_async_complete(void) &quot;&quot;

# hcd-ehci.c
usb_ehci_reset(void) &quot;=== RESET ===&quot;
usb_ehci_unrealize(void) &quot;=== UNREALIZE ===&quot;
usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) &quot;rd mmio 0x%04x [%s] = 0x%x&quot;
usb_ehci_opreg_write(uint32_t addr, const char *str, uint32_t val) &quot;wr mmio 0x%04x [%s] = 0x%x&quot;
usb_ehci_opreg_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) &quot;ch mmio 0x%04x [%s] = 0x%x (old: 0x%x)&quot;
usb_ehci_portsc_read(uint32_t addr, uint32_t port, uint32_t val) &quot;rd mmio 0x%04x [port %d] = 0x%x&quot;
usb_ehci_portsc_write(uint32_t addr, uint32_t port, uint32_t val) &quot;wr mmio 0x%04x [port %d] = 0x%x&quot;
usb_ehci_portsc_change(uint32_t addr, uint32_t port, uint32_t new, uint32_t old) &quot;ch mmio 0x%04x [port %d] = 0x%x (old: 0x%x)&quot;
usb_ehci_usbsts(const char *sts, int state) &quot;usbsts %s %d&quot;
usb_ehci_state(const char *schedule, const char *state) &quot;%s schedule %s&quot;
usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) &quot;q %p - QH @ 0x%08x: next 0x%08x qtds 0x%08x,0x%08x,0x%08x&quot;
usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) &quot;QH @ 0x%08x - rl %d, mplen %d, eps %d, ep %d, dev %d&quot;
usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) &quot;QH @ 0x%08x - c %d, h %d, dtc %d, i %d&quot;
usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) &quot;q %p - QTD @ 0x%08x: next 0x%08x altnext 0x%08x&quot;
usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) &quot;QTD @ 0x%08x - tbytes %d, cpage %d, cerr %d, pid %d&quot;
usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) &quot;QTD @ 0x%08x - ioc %d, active %d, halt %d, babble %d, xacterr %d&quot;
usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) &quot;ITD @ 0x%08x: next 0x%08x - mplen %d, mult %d, ep %d, dev %d&quot;
usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) &quot;ITD @ 0x%08x: next 0x%08x - active %d&quot;
usb_ehci_port_attach(uint32_t port, const char *owner, const char *device) &quot;attach port #%d, owner %s, device %s&quot;
usb_ehci_port_detach(uint32_t port, const char *owner) &quot;detach port #%d, owner %s&quot;
usb_ehci_port_reset(uint32_t port, int enable) &quot;reset port #%d - %d&quot;
usb_ehci_port_suspend(uint32_t port) &quot;port #%d&quot;
usb_ehci_port_wakeup(uint32_t port) &quot;port #%d&quot;
usb_ehci_port_resume(uint32_t port) &quot;port #%d&quot;
usb_ehci_queue_action(void *q, const char *action) &quot;q %p: %s&quot;
usb_ehci_packet_action(void *q, void *p, const char *action) &quot;q %p p %p: %s&quot;
usb_ehci_irq(uint32_t level, uint32_t frindex, uint32_t sts, uint32_t mask) &quot;level %d, frindex 0x%04x, sts 0x%x, mask 0x%x&quot;
usb_ehci_guest_bug(const char *reason) &quot;%s&quot;
usb_ehci_doorbell_ring(void) &quot;&quot;
usb_ehci_doorbell_ack(void) &quot;&quot;
usb_ehci_dma_error(void) &quot;&quot;

# hcd-uhci.c
usb_uhci_reset(void) &quot;=== RESET ===&quot;
usb_uhci_exit(void) &quot;=== EXIT ===&quot;
usb_uhci_schedule_start(void) &quot;&quot;
usb_uhci_schedule_stop(void) &quot;&quot;
usb_uhci_frame_start(uint32_t num) &quot;nr %d&quot;
usb_uhci_frame_stop_bandwidth(void) &quot;&quot;
usb_uhci_frame_loop_stop_idle(void) &quot;&quot;
usb_uhci_frame_loop_continue(void) &quot;&quot;
usb_uhci_mmio_readw(uint32_t addr, uint32_t val) &quot;addr 0x%04x, ret 0x%04x&quot;
usb_uhci_mmio_writew(uint32_t addr, uint32_t val) &quot;addr 0x%04x, val 0x%04x&quot;
usb_uhci_queue_add(uint32_t token) &quot;token 0x%x&quot;
usb_uhci_queue_del(uint32_t token, const char *reason) &quot;token 0x%x: %s&quot;
usb_uhci_packet_add(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_link_async(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_unlink_async(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_cancel(uint32_t token, uint32_t addr, int done) &quot;token 0x%x, td 0x%x, done %d&quot;
usb_uhci_packet_complete_success(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_complete_shortxfer(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_complete_stall(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_complete_babble(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_complete_error(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_packet_del(uint32_t token, uint32_t addr) &quot;token 0x%x, td 0x%x&quot;
usb_uhci_qh_load(uint32_t qh) &quot;qh 0x%x&quot;
usb_uhci_td_load(uint32_t qh, uint32_t td, uint32_t ctrl, uint32_t token) &quot;qh 0x%x, td 0x%x, ctrl 0x%x, token 0x%x&quot;
usb_uhci_td_queue(uint32_t td, uint32_t ctrl, uint32_t token) &quot;td 0x%x, ctrl 0x%x, token 0x%x&quot;
usb_uhci_td_nextqh(uint32_t qh, uint32_t td) &quot;qh 0x%x, td 0x%x&quot;
usb_uhci_td_async(uint32_t qh, uint32_t td) &quot;qh 0x%x, td 0x%x&quot;
usb_uhci_td_complete(uint32_t qh, uint32_t td) &quot;qh 0x%x, td 0x%x&quot;

# hcd-xhci.c
usb_xhci_reset(void) &quot;=== RESET ===&quot;
usb_xhci_exit(void) &quot;=== EXIT ===&quot;
usb_xhci_run(void) &quot;&quot;
usb_xhci_stop(void) &quot;&quot;
usb_xhci_cap_read(uint32_t off, uint32_t val) &quot;off 0x%04x, ret 0x%08x&quot;
usb_xhci_oper_read(uint32_t off, uint32_t val) &quot;off 0x%04x, ret 0x%08x&quot;
usb_xhci_port_read(uint32_t port, uint32_t off, uint32_t val) &quot;port %d, off 0x%04x, ret 0x%08x&quot;
usb_xhci_runtime_read(uint32_t off, uint32_t val) &quot;off 0x%04x, ret 0x%08x&quot;
usb_xhci_doorbell_read(uint32_t off, uint32_t val) &quot;off 0x%04x, ret 0x%08x&quot;
usb_xhci_oper_write(uint32_t off, uint32_t val) &quot;off 0x%04x, val 0x%08x&quot;
usb_xhci_port_write(uint32_t port, uint32_t off, uint32_t val) &quot;port %d, off 0x%04x, val 0x%08x&quot;
usb_xhci_runtime_write(uint32_t off, uint32_t val) &quot;off 0x%04x, val 0x%08x&quot;
usb_xhci_doorbell_write(uint32_t off, uint32_t val) &quot;off 0x%04x, val 0x%08x&quot;
usb_xhci_irq_intx(uint32_t level) &quot;level %d&quot;
usb_xhci_irq_msi(uint32_t nr) &quot;nr %d&quot;
usb_xhci_irq_msix(uint32_t nr) &quot;nr %d&quot;
usb_xhci_irq_msix_use(uint32_t nr) &quot;nr %d&quot;
usb_xhci_irq_msix_unuse(uint32_t nr) &quot;nr %d&quot;
usb_xhci_queue_event(uint32_t vector, uint32_t idx, const char *trb, const char *evt, uint64_t param, uint32_t status, uint32_t control) &quot;v %d, idx %d, %s, %s, p 0x%016&quot; PRIx64 &quot;, s 0x%08x, c 0x%08x&quot;
usb_xhci_fetch_trb(uint64_t addr, const char *name, uint64_t param, uint32_t status, uint32_t control) &quot;addr 0x%016&quot; PRIx64 &quot;, %s, p 0x%016&quot; PRIx64 &quot;, s 0x%08x, c 0x%08x&quot;
usb_xhci_port_reset(uint32_t port, bool warm) &quot;port %d, warm %d&quot;
usb_xhci_port_link(uint32_t port, uint32_t pls) &quot;port %d, pls %d&quot;
usb_xhci_port_notify(uint32_t port, uint32_t pls) &quot;port %d, bits 0x%x&quot;
usb_xhci_slot_enable(uint32_t slotid) &quot;slotid %d&quot;
usb_xhci_slot_disable(uint32_t slotid) &quot;slotid %d&quot;
usb_xhci_slot_address(uint32_t slotid, const char *port) &quot;slotid %d, port %s&quot;
usb_xhci_slot_configure(uint32_t slotid) &quot;slotid %d&quot;
usb_xhci_slot_evaluate(uint32_t slotid) &quot;slotid %d&quot;
usb_xhci_slot_reset(uint32_t slotid) &quot;slotid %d&quot;
usb_xhci_ep_enable(uint32_t slotid, uint32_t epid) &quot;slotid %d, epid %d&quot;
usb_xhci_ep_disable(uint32_t slotid, uint32_t epid) &quot;slotid %d, epid %d&quot;
usb_xhci_ep_set_dequeue(uint32_t slotid, uint32_t epid, uint32_t streamid, uint64_t param) &quot;slotid %d, epid %d, streamid %d, ptr 0x%016&quot; PRIx64
usb_xhci_ep_kick(uint32_t slotid, uint32_t epid, uint32_t streamid) &quot;slotid %d, epid %d, streamid %d&quot;
usb_xhci_ep_stop(uint32_t slotid, uint32_t epid) &quot;slotid %d, epid %d&quot;
usb_xhci_ep_reset(uint32_t slotid, uint32_t epid) &quot;slotid %d, epid %d&quot;
usb_xhci_ep_state(uint32_t slotid, uint32_t epid, const char *os, const char *ns) &quot;slotid %d, epid %d, %s -&gt; %s&quot;
usb_xhci_xfer_start(void *xfer, uint32_t slotid, uint32_t epid, uint32_t streamid) &quot;%p: slotid %d, epid %d, streamid %d&quot;
usb_xhci_xfer_async(void *xfer) &quot;%p&quot;
usb_xhci_xfer_nak(void *xfer) &quot;%p&quot;
usb_xhci_xfer_retry(void *xfer) &quot;%p&quot;
usb_xhci_xfer_success(void *xfer, uint32_t bytes) &quot;%p: len %d&quot;
usb_xhci_xfer_error(void *xfer, uint32_t ret) &quot;%p: ret %d&quot;
usb_xhci_unimplemented(const char *item, int nr) &quot;%s (0x%x)&quot;
usb_xhci_enforced_limit(const char *item) &quot;%s&quot;

# hcd-dwc2.c
usb_dwc2_update_irq(uint32_t level) &quot;level=%d&quot;
usb_dwc2_raise_global_irq(uint32_t intr) &quot;0x%08x&quot;
usb_dwc2_lower_global_irq(uint32_t intr) &quot;0x%08x&quot;
usb_dwc2_raise_host_irq(uint32_t intr) &quot;0x%04x&quot;
usb_dwc2_lower_host_irq(uint32_t intr) &quot;0x%04x&quot;
usb_dwc2_sof(int64_t next) &quot;next SOF %&quot; PRId64
usb_dwc2_bus_start(void) &quot;start SOFs&quot;
usb_dwc2_bus_stop(void) &quot;stop SOFs&quot;
usb_dwc2_find_device(uint8_t addr) &quot;%d&quot;
usb_dwc2_port_disabled(uint32_t pnum) &quot;port %d disabled&quot;
usb_dwc2_device_found(uint32_t pnum) &quot;device found on port %d&quot;
usb_dwc2_device_not_found(void) &quot;device not found&quot;
usb_dwc2_handle_packet(uint32_t chan, void *dev, void *pkt, uint32_t ep, const char *type, const char *dir, uint32_t mps, uint32_t len, uint32_t pcnt) &quot;ch %d dev %p pkt %p ep %d type %s dir %s mps %d len %d pcnt %d&quot;
usb_dwc2_memory_read(uint32_t addr, uint32_t len) &quot;addr %d len %d&quot;
usb_dwc2_packet_status(const char *status, uint32_t len) &quot;status %s len %d&quot;
usb_dwc2_packet_error(const char *status) &quot;ERROR %s&quot;
usb_dwc2_async_packet(void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) &quot;pkt %p ch %d dev %p ep %d %s len %d&quot;
usb_dwc2_memory_write(uint32_t addr, uint32_t len) &quot;addr %d len %d&quot;
usb_dwc2_packet_done(const char *status, uint32_t actual, uint32_t len, uint32_t pcnt) &quot;status %s actual %d len %d pcnt %d&quot;
usb_dwc2_packet_next(const char *status, uint32_t len, uint32_t pcnt) &quot;status %s len %d pcnt %d&quot;
usb_dwc2_attach(void *port) &quot;port %p&quot;
usb_dwc2_attach_speed(const char *speed) &quot;%s-speed device attached&quot;
usb_dwc2_detach(void *port) &quot;port %p&quot;
usb_dwc2_child_detach(void *port, void *child) &quot;port %p child %p&quot;
usb_dwc2_wakeup(void *port) &quot;port %p&quot;
usb_dwc2_async_packet_complete(void *port, void *pkt, uint32_t chan, void *dev, uint32_t ep, const char *dir, uint32_t len) &quot;port %p packet %p ch %d dev %p ep %d %s len %d&quot;
usb_dwc2_work_bh(void) &quot;&quot;
usb_dwc2_work_bh_service(uint32_t first, uint32_t current, void *dev, uint32_t ep) &quot;first %d servicing %d dev %p ep %d&quot;
usb_dwc2_work_bh_next(uint32_t chan) &quot;next %d&quot;
usb_dwc2_enable_chan(uint32_t chan, void *dev, void *pkt, uint32_t ep) &quot;ch %d dev %p pkt %p ep %d&quot;
usb_dwc2_glbreg_read(uint64_t addr, const char *reg, uint32_t val) &quot; 0x%04&quot; PRIx64 &quot; %s val 0x%08x&quot;
usb_dwc2_glbreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) &quot;0x%04&quot; PRIx64 &quot; %s val 0x%08&quot; PRIx64 &quot; old 0x%08x result 0x%08&quot; PRIx64
usb_dwc2_fszreg_read(uint64_t addr, uint32_t val) &quot; 0x%04&quot; PRIx64 &quot; HPTXFSIZ  val 0x%08x&quot;
usb_dwc2_fszreg_write(uint64_t addr, uint64_t val, uint32_t old, uint64_t result) &quot;0x%04&quot; PRIx64 &quot; HPTXFSIZ  val 0x%08&quot; PRIx64 &quot; old 0x%08x result 0x%08&quot; PRIx64
usb_dwc2_hreg0_read(uint64_t addr, const char *reg, uint32_t val) &quot;  0x%04&quot; PRIx64 &quot; %s val 0x%08x&quot;
usb_dwc2_hreg0_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) &quot; 0x%04&quot; PRIx64 &quot; %s val 0x%08&quot; PRIx64 &quot; old 0x%08x result 0x%08&quot; PRIx64
usb_dwc2_hreg1_read(uint64_t addr, const char *reg, uint64_t chan, uint32_t val) &quot;  0x%04&quot; PRIx64 &quot; %s%&quot; PRId64 &quot; val 0x%08x&quot;
usb_dwc2_hreg1_write(uint64_t addr, const char *reg, uint64_t chan, uint64_t val, uint32_t old, uint64_t result) &quot; 0x%04&quot; PRIx64 &quot; %s%&quot; PRId64 &quot; val 0x%08&quot; PRIx64 &quot; old 0x%08x result 0x%08&quot; PRIx64
usb_dwc2_pcgreg_read(uint64_t addr, const char *reg, uint32_t val) &quot; 0x%04&quot; PRIx64 &quot; %s val 0x%08x&quot;
usb_dwc2_pcgreg_write(uint64_t addr, const char *reg, uint64_t val, uint32_t old, uint64_t result) &quot;0x%04&quot; PRIx64 &quot; %s val 0x%08&quot; PRIx64 &quot; old 0x%08x result 0x%08&quot; PRIx64
usb_dwc2_hreg2_read(uint64_t addr, uint64_t fifo, uint32_t val) &quot;  0x%04&quot; PRIx64 &quot; FIFO%&quot; PRId64 &quot;     val 0x%08x&quot;
usb_dwc2_hreg2_write(uint64_t addr, uint64_t fifo, uint64_t val, uint32_t old, uint64_t result) &quot; 0x%04&quot; PRIx64 &quot; FIFO%&quot; PRId64 &quot;     val 0x%08&quot; PRIx64 &quot; old 0x%08x result 0x%08&quot; PRIx64
usb_dwc2_hreg0_action(const char *s) &quot;%s&quot;
usb_dwc2_wakeup_endpoint(void *ep, uint32_t stream) &quot;endp %p stream %d&quot;
usb_dwc2_work_timer(void) &quot;&quot;
usb_dwc2_reset_enter(void) &quot;=== RESET enter ===&quot;
usb_dwc2_reset_hold(void) &quot;=== RESET hold ===&quot;
usb_dwc2_reset_exit(void) &quot;=== RESET exit ===&quot;

# desc.c
usb_desc_device(int addr, int len, int ret) &quot;dev %d query device, len %d, ret %d&quot;
usb_desc_device_qualifier(int addr, int len, int ret) &quot;dev %d query device qualifier, len %d, ret %d&quot;
usb_desc_config(int addr, int index, int len, int ret) &quot;dev %d query config %d, len %d, ret %d&quot;
usb_desc_other_speed_config(int addr, int index, int len, int ret) &quot;dev %d query config %d, len %d, ret %d&quot;
usb_desc_string(int addr, int index, int len, int ret) &quot;dev %d query string %d, len %d, ret %d&quot;
usb_desc_bos(int addr, int len, int ret) &quot;dev %d bos, len %d, ret %d&quot;
usb_desc_msos(int addr, int index, int len, int ret) &quot;dev %d msos, index 0x%x, len %d, ret %d&quot;
usb_set_addr(int addr) &quot;dev %d&quot;
usb_set_config(int addr, int config, int ret) &quot;dev %d, config %d, ret %d&quot;
usb_set_interface(int addr, int iface, int alt, int ret) &quot;dev %d, interface %d, altsetting %d, ret %d&quot;
usb_clear_device_feature(int addr, int feature, int ret) &quot;dev %d, feature %d, ret %d&quot;
usb_set_device_feature(int addr, int feature, int ret) &quot;dev %d, feature %d, ret %d&quot;

# dev-hub.c
usb_hub_reset(int addr) &quot;dev %d&quot;
usb_hub_control(int addr, int request, int value, int index, int length) &quot;dev %d, req 0x%x, value %d, index %d, length %d&quot;
usb_hub_get_port_status(int addr, int nr, int status, int changed) &quot;dev %d, port %d, status 0x%x, changed 0x%x&quot;
usb_hub_set_port_feature(int addr, int nr, const char *f) &quot;dev %d, port %d, feature %s&quot;
usb_hub_clear_port_feature(int addr, int nr, const char *f) &quot;dev %d, port %d, feature %s&quot;
usb_hub_attach(int addr, int nr) &quot;dev %d, port %d&quot;
usb_hub_detach(int addr, int nr) &quot;dev %d, port %d&quot;
usb_hub_status_report(int addr, int status) &quot;dev %d, status 0x%x&quot;

# dev-storage.c
usb_msd_reset(void) &quot;&quot;
usb_msd_maxlun(unsigned maxlun) &quot;%d&quot;
usb_msd_send_status(unsigned status, unsigned tag, size_t size) &quot;status %d, tag 0x%x, len %zd&quot;
usb_msd_data_in(unsigned packet, unsigned remaining, unsigned total) &quot;%d/%d (scsi %d)&quot;
usb_msd_data_out(unsigned packet, unsigned remaining) &quot;%d/%d&quot;
usb_msd_packet_async(void) &quot;&quot;
usb_msd_packet_complete(void) &quot;&quot;
usb_msd_cmd_submit(unsigned lun, unsigned tag, unsigned flags, unsigned len, unsigned data_len) &quot;lun %u, tag 0x%x, flags 0x%08x, len %d, data-len %d&quot;
usb_msd_cmd_complete(unsigned status, unsigned tag) &quot;status %d, tag 0x%x&quot;
usb_msd_cmd_cancel(unsigned tag) &quot;tag 0x%x&quot;
usb_msd_fatal_error(void) &quot;&quot;

# dev-uas.c
usb_uas_reset(int addr) &quot;dev %d&quot;
usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) &quot;dev %d, tag 0x%x, lun %d, lun64 0x%08x-0x%08x&quot;
usb_uas_response(int addr, uint16_t tag, uint8_t code) &quot;dev %d, tag 0x%x, code 0x%x&quot;
usb_uas_sense(int addr, uint16_t tag, uint8_t status) &quot;dev %d, tag 0x%x, status 0x%x&quot;
usb_uas_read_ready(int addr, uint16_t tag) &quot;dev %d, tag 0x%x&quot;
usb_uas_write_ready(int addr, uint16_t tag) &quot;dev %d, tag 0x%x&quot;
usb_uas_xfer_data(int addr, uint16_t tag, uint32_t copy, uint32_t uoff, uint32_t usize, uint32_t soff, uint32_t ssize) &quot;dev %d, tag 0x%x, copy %d, usb-pkt %d/%d, scsi-buf %d/%d&quot;
usb_uas_scsi_data(int addr, uint16_t tag, uint32_t bytes) &quot;dev %d, tag 0x%x, bytes %d&quot;
usb_uas_scsi_complete(int addr, uint16_t tag, uint32_t status, uint32_t resid) &quot;dev %d, tag 0x%x, status 0x%x, residue %d&quot;
usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) &quot;dev %d, tag 0x%x, task-tag 0x%x&quot;
usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) &quot;dev %d, tag 0x%x, lun %d&quot;
usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) &quot;dev %d, tag 0x%x, function 0x%x&quot;

# dev-mtp.c
usb_mtp_reset(int addr) &quot;dev %d&quot;
usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) &quot;dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x&quot;
usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) &quot;dev %d, trans 0x%x, args 0x%x, 0x%x&quot;
usb_mtp_error(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1) &quot;dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x&quot;
usb_mtp_data_in(int dev, uint32_t trans, uint32_t len) &quot;dev %d, trans 0x%x, len %d&quot;
usb_mtp_xfer(int dev, uint32_t ep, uint32_t dlen, uint32_t plen) &quot;dev %d, ep %d, %d/%d&quot;
usb_mtp_nak(int dev, uint32_t ep) &quot;dev %d, ep %d&quot;
usb_mtp_stall(int dev, const char *reason) &quot;dev %d, reason: %s&quot;
usb_mtp_op_get_device_info(int dev) &quot;dev %d&quot;
usb_mtp_op_open_session(int dev) &quot;dev %d&quot;
usb_mtp_op_close_session(int dev) &quot;dev %d&quot;
usb_mtp_op_get_storage_ids(int dev) &quot;dev %d&quot;
usb_mtp_op_get_storage_info(int dev) &quot;dev %d&quot;
usb_mtp_op_get_num_objects(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_op_get_object_handles(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_op_get_object_info(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_op_get_object(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_op_get_partial_object(int dev, uint32_t handle, const char *path, uint32_t offset, uint32_t length) &quot;dev %d, handle 0x%x, path %s, off %d, len %d&quot;
usb_mtp_op_unknown(int dev, uint32_t code) &quot;dev %d, command code 0x%x&quot;
usb_mtp_object_alloc(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_object_free(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_add_child(int dev, uint32_t handle, const char *path) &quot;dev %d, handle 0x%x, path %s&quot;
usb_mtp_file_monitor_event(int dev, const char *path, const char *s) &quot;dev %d, path %s event %s&quot;

# host-libusb.c
usb_host_open_started(int bus, int addr) &quot;dev %d:%d&quot;
usb_host_open_hostfd(int hostfd) &quot;hostfd %d&quot;
usb_host_open_success(int bus, int addr) &quot;dev %d:%d&quot;
usb_host_open_failure(int bus, int addr) &quot;dev %d:%d&quot;
usb_host_close(int bus, int addr) &quot;dev %d:%d&quot;
usb_host_attach_kernel(int bus, int addr, int interface) &quot;dev %d:%d, if %d&quot;
usb_host_detach_kernel(int bus, int addr, int interface) &quot;dev %d:%d, if %d&quot;
usb_host_set_address(int bus, int addr, int config) &quot;dev %d:%d, address %d&quot;
usb_host_set_config(int bus, int addr, int config) &quot;dev %d:%d, config %d&quot;
usb_host_set_interface(int bus, int addr, int interface, int alt) &quot;dev %d:%d, interface %d, alt %d&quot;
usb_host_claim_interface(int bus, int addr, int config, int interface) &quot;dev %d:%d, config %d, if %d&quot;
usb_host_release_interface(int bus, int addr, int interface) &quot;dev %d:%d, if %d&quot;
usb_host_req_control(int bus, int addr, void *p, int req, int value, int index) &quot;dev %d:%d, packet %p, req 0x%x, value %d, index %d&quot;
usb_host_req_data(int bus, int addr, void *p, int in, int ep, int size) &quot;dev %d:%d, packet %p, in %d, ep %d, size %d&quot;
usb_host_req_complete(int bus, int addr, void *p, int status, int length) &quot;dev %d:%d, packet %p, status %d, length %d&quot;
usb_host_req_emulated(int bus, int addr, void *p, int status) &quot;dev %d:%d, packet %p, status %d&quot;
usb_host_req_canceled(int bus, int addr, void *p) &quot;dev %d:%d, packet %p&quot;
usb_host_iso_start(int bus, int addr, int ep) &quot;dev %d:%d, ep %d&quot;
usb_host_iso_stop(int bus, int addr, int ep) &quot;dev %d:%d, ep %d&quot;
usb_host_iso_out_of_bufs(int bus, int addr, int ep) &quot;dev %d:%d, ep %d&quot;
usb_host_reset(int bus, int addr) &quot;dev %d:%d&quot;
usb_host_auto_scan_enabled(void)
usb_host_auto_scan_disabled(void)
usb_host_parse_config(int bus, int addr, int value, int active) &quot;dev %d:%d, value %d, active %d&quot;
usb_host_parse_interface(int bus, int addr, int num, int alt, int active) &quot;dev %d:%d, num %d, alt %d, active %d&quot;
usb_host_parse_endpoint(int bus, int addr, int ep, const char *dir, const char *type, int active) &quot;dev %d:%d, ep %d, %s, %s, active %d&quot;
usb_host_parse_error(int bus, int addr, const char *errmsg) &quot;dev %d:%d, msg %s&quot;
usb_host_remote_wakeup_removed(int bus, int addr) &quot;dev %d:%d&quot;

# dev-serial.c
usb_serial_reset(int bus, int addr) &quot;dev %d:%u reset&quot;
usb_serial_handle_control(int bus, int addr, int request, int value) &quot;dev %d:%u got control 0x%x, value 0x%x&quot;
usb_serial_unsupported_parity(int bus, int addr, int value) &quot;dev %d:%u unsupported parity %d&quot;
usb_serial_unsupported_stopbits(int bus, int addr, int value) &quot;dev %d:%u unsupported stop bits %d&quot;
usb_serial_unsupported_control(int bus, int addr, int request, int value) &quot;dev %d:%u got unsupported/bogus control 0x%x, value 0x%x&quot;
usb_serial_unsupported_data_bits(int bus, int addr, int value) &quot;dev %d:%u unsupported data bits %d, falling back to 8&quot;
usb_serial_bad_token(int bus, int addr) &quot;dev %d:%u bad token&quot;
usb_serial_set_baud(int bus, int addr, int baud) &quot;dev %d:%u baud rate %d&quot;
usb_serial_set_data(int bus, int addr, int parity, int data, int stop) &quot;dev %d:%u parity %c, data bits %d, stop bits %d&quot;
usb_serial_set_flow_control(int bus, int addr, int index) &quot;dev %d:%u flow control %d&quot;
usb_serial_set_xonxoff(int bus, int addr, uint8_t xon, uint8_t xoff) &quot;dev %d:%u xon 0x%x xoff 0x%x&quot;

# canokey.c
canokey_emu_stall_ep(uint8_t ep) &quot;ep %d&quot;
canokey_emu_set_address(uint8_t addr) &quot;addr %d&quot;
canokey_emu_prepare_receive(uint8_t ep, uint16_t size) &quot;ep %d size %d&quot;
canokey_emu_transmit(uint8_t ep, uint16_t size) &quot;ep %d size %d&quot;
canokey_thread_start(void)
canokey_thread_stop(void)
canokey_handle_reset(void)
canokey_handle_control_setup(int request, int value, int index, int length) &quot;request 0x%04X value 0x%04X index 0x%04X length 0x%04X&quot;
canokey_handle_control_out(void)
canokey_handle_control_in(int actual_len) &quot;len %d&quot;
canokey_handle_data_out(uint8_t ep_out, uint32_t out_len) &quot;ep %d len %d&quot;
canokey_handle_data_in(uint8_t ep_in, uint32_t in_len) &quot;ep %d len %d&quot;
canokey_realize(void)
canokey_unrealize(void)
# See docs/devel/tracing.rst for syntax documentation.

# pci.c
vfio_intx_interrupt(const char *name, char line) &quot; (%s) Pin %c&quot;
vfio_intx_eoi(const char *name) &quot; (%s) EOI&quot;
vfio_intx_enable_kvm(const char *name) &quot; (%s) KVM INTx accel enabled&quot;
vfio_intx_disable_kvm(const char *name) &quot; (%s) KVM INTx accel disabled&quot;
vfio_intx_update(const char *name, int new_irq, int target_irq) &quot; (%s) IRQ moved %d -&gt; %d&quot;
vfio_intx_enable(const char *name) &quot; (%s)&quot;
vfio_intx_disable(const char *name) &quot; (%s)&quot;
vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) &quot; (%s) vector %d 0x%&quot;PRIx64&quot;/0x%x&quot;
vfio_msix_vector_do_use(const char *name, int index) &quot; (%s) vector %d used&quot;
vfio_msix_vector_release(const char *name, int index) &quot; (%s) vector %d released&quot;
vfio_msix_enable(const char *name) &quot; (%s)&quot;
vfio_msix_pba_disable(const char *name) &quot; (%s)&quot;
vfio_msix_pba_enable(const char *name) &quot; (%s)&quot;
vfio_msix_disable(const char *name) &quot; (%s)&quot;
vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) &quot; (%s) MSI-X region %d mmap fixup [0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot;]&quot;
vfio_msix_relo(const char *name, int bar, uint64_t offset) &quot; (%s) BAR %d offset 0x%&quot;PRIx64&quot;&quot;
vfio_msi_enable(const char *name, int nr_vectors) &quot; (%s) Enabled %d MSI vectors&quot;
vfio_msi_disable(const char *name) &quot; (%s)&quot;
vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) &quot;Device %s ROM:\n  size: 0x%lx, offset: 0x%lx, flags: 0x%lx&quot;
vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) &quot; (%s, 0x%&quot;PRIx64&quot;, 0x%x) = 0x%&quot;PRIx64
vfio_pci_size_rom(const char *name, int size) &quot;%s ROM size 0x%x&quot;
vfio_vga_write(uint64_t addr, uint64_t data, int size) &quot; (0x%&quot;PRIx64&quot;, 0x%&quot;PRIx64&quot;, %d)&quot;
vfio_vga_read(uint64_t addr, int size, uint64_t data) &quot; (0x%&quot;PRIx64&quot;, %d) = 0x%&quot;PRIx64
vfio_pci_read_config(const char *name, int addr, int len, int val) &quot; (%s, @0x%x, len=0x%x) 0x%x&quot;
vfio_pci_write_config(const char *name, int addr, int val, int len) &quot; (%s, @0x%x, 0x%x, len=0x%x)&quot;
vfio_msi_setup(const char *name, int pos) &quot;%s PCI MSI CAP @0x%x&quot;
vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries, bool noresize) &quot;%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d, noresize %d&quot;
vfio_check_pcie_flr(const char *name) &quot;%s Supports FLR via PCIe cap&quot;
vfio_check_pm_reset(const char *name) &quot;%s Supports PM reset&quot;
vfio_check_af_flr(const char *name) &quot;%s Supports FLR via AF cap&quot;
vfio_pci_hot_reset(const char *name, const char *type) &quot; (%s) %s&quot;
vfio_pci_hot_reset_has_dep_devices(const char *name) &quot;%s: hot reset dependent devices:&quot;
vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) &quot;\t%04x:%02x:%02x.%x group %d&quot;
vfio_pci_hot_reset_result(const char *name, const char *result) &quot;%s hot reset: %s&quot;
vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) &quot;Device %s config:\n  size: 0x%lx, offset: 0x%lx, flags: 0x%lx&quot;
vfio_populate_device_get_irq_info_failure(const char *errstr) &quot;VFIO_DEVICE_GET_IRQ_INFO failure: %s&quot;
vfio_attach_device(const char *name, int group_id) &quot; (%s) group %d&quot;
vfio_detach_device(const char *name, int group_id) &quot; (%s) group %d&quot;
vfio_mdev(const char *name, bool is_mdev) &quot; (%s) is_mdev %d&quot;
vfio_add_ext_cap_dropped(const char *name, uint16_t cap, uint16_t offset) &quot;%s 0x%x@0x%x&quot;
vfio_pci_reset(const char *name) &quot; (%s)&quot;
vfio_pci_reset_flr(const char *name) &quot;%s FLR/VFIO_DEVICE_RESET&quot;
vfio_pci_reset_pm(const char *name) &quot;%s PCI PM Reset&quot;
vfio_pci_emulated_vendor_id(const char *name, uint16_t val) &quot;%s 0x%04x&quot;
vfio_pci_emulated_device_id(const char *name, uint16_t val) &quot;%s 0x%04x&quot;
vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) &quot;%s 0x%04x&quot;
vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) &quot;%s 0x%04x&quot;

# pci-quirks.c
vfio_quirk_rom_in_denylist(const char *name, uint16_t vid, uint16_t did) &quot;%s %04x:%04x&quot;
vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) &quot;%s %s 0x%&quot;PRIx64
vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) &quot;%s %s 0x%&quot;PRIx64
vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) &quot;%s %s 0x%&quot;PRIx64
vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) &quot;%s %s 0x%&quot;PRIx64&quot;: 0x%&quot;PRIx64
vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) &quot;%s %s 0x%&quot;PRIx64&quot;: 0x%&quot;PRIx64
vfio_quirk_ati_3c3_read(const char *name, uint64_t data) &quot;%s 0x%&quot;PRIx64
vfio_quirk_ati_3c3_probe(const char *name) &quot;%s&quot;
vfio_quirk_ati_bar4_probe(const char *name) &quot;%s&quot;
vfio_quirk_ati_bar2_probe(const char *name) &quot;%s&quot;
vfio_quirk_nvidia_3d0_state(const char *name, const char *state) &quot;%s %s&quot;
vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) &quot; (%s, @0x%x, len=0x%x) 0x%&quot;PRIx64
vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) &quot;(%s, @0x%x, 0x%&quot;PRIx64&quot;, len=0x%x)&quot;
vfio_quirk_nvidia_3d0_probe(const char *name) &quot;%s&quot;
vfio_quirk_nvidia_bar5_state(const char *name, const char *state) &quot;%s %s&quot;
vfio_quirk_nvidia_bar5_probe(const char *name) &quot;%s&quot;
vfio_quirk_nvidia_bar0_msi_ack(const char *name) &quot;%s&quot;
vfio_quirk_nvidia_bar0_probe(const char *name) &quot;%s&quot;
vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) &quot;%s 0x%&quot;PRIx64
vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) &quot;%s MSI-X table write[0x%x]: 0x%&quot;PRIx64
vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) &quot;%s MSI-X table read[0x%x]: 0x%&quot;PRIx64
vfio_quirk_rtl8168_probe(const char *name) &quot;%s&quot;

vfio_quirk_ati_bonaire_reset_skipped(const char *name) &quot;%s&quot;
vfio_quirk_ati_bonaire_reset_no_smc(const char *name) &quot;%s&quot;
vfio_quirk_ati_bonaire_reset_timeout(const char *name) &quot;%s&quot;
vfio_quirk_ati_bonaire_reset_done(const char *name) &quot;%s&quot;
vfio_quirk_ati_bonaire_reset(const char *name) &quot;%s&quot;
vfio_ioeventfd_exit(const char *name, uint64_t addr, unsigned size, uint64_t data) &quot;%s+0x%&quot;PRIx64&quot;[%d]:0x%&quot;PRIx64
vfio_ioeventfd_handler(const char *name, uint64_t addr, unsigned size, uint64_t data) &quot;%s+0x%&quot;PRIx64&quot;[%d] -&gt; 0x%&quot;PRIx64
vfio_ioeventfd_init(const char *name, uint64_t addr, unsigned size, uint64_t data, bool vfio) &quot;%s+0x%&quot;PRIx64&quot;[%d]:0x%&quot;PRIx64&quot; vfio:%d&quot;
vfio_pci_igd_opregion_enabled(const char *name) &quot;%s&quot;

# igd.c
vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) &quot;%s [0x%03x] 0x%08x -&gt; 0x%08x&quot;
vfio_pci_igd_bdsm_enabled(const char *name, int size) &quot;%s %dMB&quot;
vfio_pci_igd_host_bridge_enabled(const char *name) &quot;%s&quot;
vfio_pci_igd_lpc_bridge_enabled(const char *name) &quot;%s&quot;

# common.c
vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) &quot; (%s:region%d+0x%&quot;PRIx64&quot;, 0x%&quot;PRIx64 &quot;, %d)&quot;
vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) &quot; (%s:region%d+0x%&quot;PRIx64&quot;, %d) = 0x%&quot;PRIx64
vfio_iommu_map_notify(const char *op, uint64_t iova_start, uint64_t iova_end) &quot;iommu %s @ 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vfio_listener_region_skip(const char *name, uint64_t start, uint64_t end) &quot;SKIPPING %s 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vfio_spapr_group_attach(int groupfd, int tablefd) &quot;Attached groupfd %d to liobn fd %d&quot;
vfio_listener_region_add_iommu(uint64_t start, uint64_t end) &quot;region_add [iommu] 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) &quot;region_add [ram] 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot; [%p]&quot;
vfio_known_safe_misalignment(const char *name, uint64_t iova, uint64_t offset_within_region, uintptr_t page_size) &quot;Region \&quot;%s\&quot; iova=0x%&quot;PRIx64&quot; offset_within_region=0x%&quot;PRIx64&quot; qemu_real_host_page_size=0x%&quot;PRIxPTR
vfio_listener_region_add_no_dma_map(const char *name, uint64_t iova, uint64_t size, uint64_t page_size) &quot;Region \&quot;%s\&quot; 0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64&quot; is not aligned to 0x%&quot;PRIx64&quot; and cannot be mapped for DMA&quot;
vfio_listener_region_del(uint64_t start, uint64_t end) &quot;region_del 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vfio_device_dirty_tracking_update(uint64_t start, uint64_t end, uint64_t min, uint64_t max) &quot;section 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot; -&gt; update [0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot;]&quot;
vfio_device_dirty_tracking_start(int nr_ranges, uint64_t min32, uint64_t max32, uint64_t min64, uint64_t max64, uint64_t minpci, uint64_t maxpci) &quot;nr_ranges %d 32:[0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot;], 64:[0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot;], pci64:[0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64&quot;]&quot;
vfio_disconnect_container(int fd) &quot;close container-&gt;fd=%d&quot;
vfio_put_group(int fd) &quot;close group-&gt;fd=%d&quot;
vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) &quot;Device %s flags: %u, regions: %u, irqs: %u&quot;
vfio_put_base_device(int fd) &quot;close vdev-&gt;fd=%d&quot;
vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) &quot;Device %s, region %d \&quot;%s\&quot;, flags: 0x%lx, offset: 0x%lx, size: 0x%lx&quot;
vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) &quot;Region %s mmaps[%d], [0x%lx - 0x%lx], fault: %d&quot;
vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) &quot;Region %s [0x%lx - 0x%lx]&quot;
vfio_region_exit(const char *name, int index) &quot;Device %s, region %d&quot;
vfio_region_finalize(const char *name, int index) &quot;Device %s, region %d&quot;
vfio_region_mmaps_set_enabled(const char *name, bool enabled) &quot;Region %s mmaps enabled: %d&quot;
vfio_region_unmap(const char *name, unsigned long offset, unsigned long end) &quot;Region %s unmap [0x%lx - 0x%lx]&quot;
vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) &quot;Device %s region %d: %d sparse mmap entries&quot;
vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) &quot;sparse entry %d [0x%lx - 0x%lx]&quot;
vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) &quot;%s index %d, %08x/%08x&quot;
vfio_dma_unmap_overflow_workaround(void) &quot;&quot;
vfio_get_dirty_bitmap(int fd, uint64_t iova, uint64_t size, uint64_t bitmap_size, uint64_t start, uint64_t dirty_pages) &quot;container fd=%d, iova=0x%&quot;PRIx64&quot; size= 0x%&quot;PRIx64&quot; bitmap_size=0x%&quot;PRIx64&quot; start=0x%&quot;PRIx64&quot; dirty_pages=%&quot;PRIu64
vfio_iommu_map_dirty_notify(uint64_t iova_start, uint64_t iova_end) &quot;iommu dirty @ 0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64

# platform.c
vfio_platform_realize(char *name, char *compat) &quot;vfio device %s, compat = %s&quot;
vfio_platform_eoi(int pin, int fd) &quot;EOI IRQ pin %d (fd=%d)&quot;
vfio_platform_intp_mmap_enable(int pin) &quot;IRQ #%d still active, stay in slow path&quot;
vfio_platform_intp_interrupt(int pin, int fd) &quot;Inject IRQ #%d (fd = %d)&quot;
vfio_platform_intp_inject_pending_lockheld(int pin, int fd) &quot;Inject pending IRQ #%d (fd = %d)&quot;
vfio_platform_populate_interrupts(int pin, int count, int flags) &quot;- IRQ index %d: count %d, flags=0x%x&quot;
vfio_intp_interrupt_set_pending(int index) &quot;irq %d is set PENDING&quot;
vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) &quot;IRQ index=%d, fd = %d, resamplefd = %d&quot;
vfio_platform_start_edge_irqfd_injection(int index, int fd) &quot;IRQ index=%d, fd = %d&quot;

# spapr.c
vfio_prereg_listener_region_add_skip(uint64_t start, uint64_t end) &quot;0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vfio_prereg_listener_region_del_skip(uint64_t start, uint64_t end) &quot;0x%&quot;PRIx64&quot; - 0x%&quot;PRIx64
vfio_prereg_register(uint64_t va, uint64_t size, int ret) &quot;va=0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64&quot; ret=%d&quot;
vfio_prereg_unregister(uint64_t va, uint64_t size, int ret) &quot;va=0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64&quot; ret=%d&quot;
vfio_spapr_create_window(int ps, unsigned int levels, uint64_t ws, uint64_t off) &quot;pageshift=0x%x levels=%u winsize=0x%&quot;PRIx64&quot; offset=0x%&quot;PRIx64
vfio_spapr_remove_window(uint64_t off) &quot;offset=0x%&quot;PRIx64

# display.c
vfio_display_edid_available(void) &quot;&quot;
vfio_display_edid_link_up(void) &quot;&quot;
vfio_display_edid_link_down(void) &quot;&quot;
vfio_display_edid_update(uint32_t prefx, uint32_t prefy) &quot;%ux%u&quot;
vfio_display_edid_write_error(void) &quot;&quot;

# migration.c
vfio_load_cleanup(const char *name) &quot; (%s)&quot;
vfio_load_device_config_state(const char *name) &quot; (%s)&quot;
vfio_load_state(const char *name, uint64_t data) &quot; (%s) data 0x%&quot;PRIx64
vfio_load_state_device_data(const char *name, uint64_t data_size, int ret) &quot; (%s) size 0x%&quot;PRIx64&quot; ret %d&quot;
vfio_migration_realize(const char *name) &quot; (%s)&quot;
vfio_migration_set_state(const char *name, const char *state) &quot; (%s) state %s&quot;
vfio_migration_state_notifier(const char *name, const char *state) &quot; (%s) state %s&quot;
vfio_save_block(const char *name, int data_size) &quot; (%s) data_size %d&quot;
vfio_save_cleanup(const char *name) &quot; (%s)&quot;
vfio_save_complete_precopy(const char *name, int ret) &quot; (%s) ret %d&quot;
vfio_save_device_config_state(const char *name) &quot; (%s)&quot;
vfio_save_iterate(const char *name, uint64_t precopy_init_size, uint64_t precopy_dirty_size) &quot; (%s) precopy initial size 0x%&quot;PRIx64&quot; precopy dirty size 0x%&quot;PRIx64
vfio_save_setup(const char *name, uint64_t data_buffer_size) &quot; (%s) data buffer size 0x%&quot;PRIx64
vfio_state_pending_estimate(const char *name, uint64_t precopy, uint64_t postcopy, uint64_t precopy_init_size, uint64_t precopy_dirty_size) &quot; (%s) precopy 0x%&quot;PRIx64&quot; postcopy 0x%&quot;PRIx64&quot; precopy initial size 0x%&quot;PRIx64&quot; precopy dirty size 0x%&quot;PRIx64
vfio_state_pending_exact(const char *name, uint64_t precopy, uint64_t postcopy, uint64_t stopcopy_size, uint64_t precopy_init_size, uint64_t precopy_dirty_size) &quot; (%s) precopy 0x%&quot;PRIx64&quot; postcopy 0x%&quot;PRIx64&quot; stopcopy size 0x%&quot;PRIx64&quot; precopy initial size 0x%&quot;PRIx64&quot; precopy dirty size 0x%&quot;PRIx64
vfio_vmstate_change(const char *name, int running, const char *reason, const char *dev_state) &quot; (%s) running %d reason %s device state %s&quot;
vfio_vmstate_change_prepare(const char *name, int running, const char *reason, const char *dev_state) &quot; (%s) running %d reason %s device state %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# vhost.c
vhost_commit(bool started, bool changed) &quot;Started: %d Changed: %d&quot;
vhost_region_add_section(const char *name, uint64_t gpa, uint64_t size, uint64_t host) &quot;%s: 0x%&quot;PRIx64&quot;+0x%&quot;PRIx64&quot; @ 0x%&quot;PRIx64
vhost_region_add_section_merge(const char *name, uint64_t new_size, uint64_t gpa, uint64_t owr) &quot;%s: size: 0x%&quot;PRIx64 &quot; gpa: 0x%&quot;PRIx64 &quot; owr: 0x%&quot;PRIx64
vhost_region_add_section_aligned(const char *name, uint64_t gpa, uint64_t size, uint64_t host) &quot;%s: 0x%&quot;PRIx64&quot;+0x%&quot;PRIx64&quot; @ 0x%&quot;PRIx64
vhost_section(const char *name) &quot;%s&quot;
vhost_reject_section(const char *name, int d) &quot;%s:%d&quot;
vhost_iotlb_miss(void *dev, int step) &quot;%p step %d&quot;
vhost_dev_cleanup(void *dev) &quot;%p&quot;
vhost_dev_start(void *dev, const char *name, bool vrings) &quot;%p:%s vrings:%d&quot;
vhost_dev_stop(void *dev, const char *name, bool vrings) &quot;%p:%s vrings:%d&quot;


# vhost-user.c
vhost_user_postcopy_end_entry(void) &quot;&quot;
vhost_user_postcopy_end_exit(void) &quot;&quot;
vhost_user_postcopy_fault_handler(const char *name, uint64_t fault_address, int nregions) &quot;%s: @0x%&quot;PRIx64&quot; nregions:%d&quot;
vhost_user_postcopy_fault_handler_loop(int i, uint64_t client_base, uint64_t size) &quot;%d: client 0x%&quot;PRIx64&quot; +0x%&quot;PRIx64
vhost_user_postcopy_fault_handler_found(int i, uint64_t region_offset, uint64_t rb_offset) &quot;%d: region_offset: 0x%&quot;PRIx64&quot; rb_offset:0x%&quot;PRIx64
vhost_user_postcopy_listen(void) &quot;&quot;
vhost_user_set_mem_table_postcopy(uint64_t client_addr, uint64_t qhva, int reply_i, int region_i) &quot;client:0x%&quot;PRIx64&quot; for hva: 0x%&quot;PRIx64&quot; reply %d region %d&quot;
vhost_user_set_mem_table_withfd(int index, const char *name, uint64_t memory_size, uint64_t guest_phys_addr, uint64_t userspace_addr, uint64_t offset) &quot;%d:%s: size:0x%&quot;PRIx64&quot; GPA:0x%&quot;PRIx64&quot; QVA/userspace:0x%&quot;PRIx64&quot; RB offset:0x%&quot;PRIx64
vhost_user_postcopy_waker(const char *rb, uint64_t rb_offset) &quot;%s + 0x%&quot;PRIx64
vhost_user_postcopy_waker_found(uint64_t client_addr) &quot;0x%&quot;PRIx64
vhost_user_postcopy_waker_nomatch(const char *rb, uint64_t rb_offset) &quot;%s + 0x%&quot;PRIx64
vhost_user_read(uint32_t req, uint32_t flags) &quot;req:%d flags:0x%&quot;PRIx32&quot;&quot;
vhost_user_write(uint32_t req, uint32_t flags) &quot;req:%d flags:0x%&quot;PRIx32&quot;&quot;
vhost_user_create_notifier(int idx, void *n) &quot;idx:%d n:%p&quot;

# vhost-vdpa.c
vhost_vdpa_dma_map(void *vdpa, int fd, uint32_t msg_type, uint32_t asid, uint64_t iova, uint64_t size, uint64_t uaddr, uint8_t perm, uint8_t type) &quot;vdpa:%p fd: %d msg_type: %&quot;PRIu32&quot; asid: %&quot;PRIu32&quot; iova: 0x%&quot;PRIx64&quot; size: 0x%&quot;PRIx64&quot; uaddr: 0x%&quot;PRIx64&quot; perm: 0x%&quot;PRIx8&quot; type: %&quot;PRIu8
vhost_vdpa_dma_unmap(void *vdpa, int fd, uint32_t msg_type, uint32_t asid, uint64_t iova, uint64_t size, uint8_t type) &quot;vdpa:%p fd: %d msg_type: %&quot;PRIu32&quot; asid: %&quot;PRIu32&quot; iova: 0x%&quot;PRIx64&quot; size: 0x%&quot;PRIx64&quot; type: %&quot;PRIu8
vhost_vdpa_listener_begin_batch(void *v, int fd, uint32_t msg_type, uint8_t type)  &quot;vdpa:%p fd: %d msg_type: %&quot;PRIu32&quot; type: %&quot;PRIu8
vhost_vdpa_listener_commit(void *v, int fd, uint32_t msg_type, uint8_t type)  &quot;vdpa:%p fd: %d msg_type: %&quot;PRIu32&quot; type: %&quot;PRIu8
vhost_vdpa_listener_region_add_unaligned(void *v, const char *name, uint64_t offset_as, uint64_t offset_page) &quot;vdpa: %p region %s offset_within_address_space %&quot;PRIu64&quot; offset_within_region %&quot;PRIu64
vhost_vdpa_listener_region_add(void *vdpa, uint64_t iova, uint64_t llend, void *vaddr, bool readonly) &quot;vdpa: %p iova 0x%&quot;PRIx64&quot; llend 0x%&quot;PRIx64&quot; vaddr: %p read-only: %d&quot;
vhost_vdpa_listener_region_del_unaligned(void *v, const char *name, uint64_t offset_as, uint64_t offset_page) &quot;vdpa: %p region %s offset_within_address_space %&quot;PRIu64&quot; offset_within_region %&quot;PRIu64
vhost_vdpa_listener_region_del(void *vdpa, uint64_t iova, uint64_t llend) &quot;vdpa: %p iova 0x%&quot;PRIx64&quot; llend 0x%&quot;PRIx64
vhost_vdpa_add_status(void *dev, uint8_t status) &quot;dev: %p status: 0x%&quot;PRIx8
vhost_vdpa_init(void *dev, void *vdpa) &quot;dev: %p vdpa: %p&quot;
vhost_vdpa_cleanup(void *dev, void *vdpa) &quot;dev: %p vdpa: %p&quot;
vhost_vdpa_memslots_limit(void *dev, int ret) &quot;dev: %p = 0x%x&quot;
vhost_vdpa_set_mem_table(void *dev, uint32_t nregions, uint32_t padding) &quot;dev: %p nregions: %&quot;PRIu32&quot; padding: 0x%&quot;PRIx32
vhost_vdpa_dump_regions(void *dev, int i, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, uint64_t flags_padding) &quot;dev: %p %d: guest_phys_addr: 0x%&quot;PRIx64&quot; memory_size: 0x%&quot;PRIx64&quot; userspace_addr: 0x%&quot;PRIx64&quot; flags_padding: 0x%&quot;PRIx64
vhost_vdpa_set_features(void *dev, uint64_t features) &quot;dev: %p features: 0x%&quot;PRIx64
vhost_vdpa_get_device_id(void *dev, uint32_t device_id) &quot;dev: %p device_id %&quot;PRIu32
vhost_vdpa_reset_device(void *dev) &quot;dev: %p&quot;
vhost_vdpa_get_vq_index(void *dev, int idx, int vq_idx) &quot;dev: %p idx: %d vq idx: %d&quot;
vhost_vdpa_set_vring_enable_one(void *dev, unsigned i, int enable, int r) &quot;dev: %p, idx: %u, enable: %u, r: %d&quot;
vhost_vdpa_dump_config(void *dev, const char *line) &quot;dev: %p %s&quot;
vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, uint32_t flags) &quot;dev: %p offset: %&quot;PRIu32&quot; size: %&quot;PRIu32&quot; flags: 0x%&quot;PRIx32
vhost_vdpa_get_config(void *dev, void *config, uint32_t config_len) &quot;dev: %p config: %p config_len: %&quot;PRIu32
vhost_vdpa_suspend(void *dev) &quot;dev: %p&quot;
vhost_vdpa_dev_start(void *dev, bool started) &quot;dev: %p started: %d&quot;
vhost_vdpa_set_log_base(void *dev, uint64_t base, unsigned long long size, int refcnt, int fd, void *log) &quot;dev: %p base: 0x%&quot;PRIx64&quot; size: %llu refcnt: %d fd: %d log: %p&quot;
vhost_vdpa_set_vring_addr(void *dev, unsigned int index, unsigned int flags, uint64_t desc_user_addr, uint64_t used_user_addr, uint64_t avail_user_addr, uint64_t log_guest_addr) &quot;dev: %p index: %u flags: 0x%x desc_user_addr: 0x%&quot;PRIx64&quot; used_user_addr: 0x%&quot;PRIx64&quot; avail_user_addr: 0x%&quot;PRIx64&quot; log_guest_addr: 0x%&quot;PRIx64
vhost_vdpa_set_vring_num(void *dev, unsigned int index, unsigned int num) &quot;dev: %p index: %u num: %u&quot;
vhost_vdpa_set_vring_base(void *dev, unsigned int index, unsigned int num) &quot;dev: %p index: %u num: %u&quot;
vhost_vdpa_get_vring_base(void *dev, unsigned int index, unsigned int num) &quot;dev: %p index: %u num: %u&quot;
vhost_vdpa_set_vring_kick(void *dev, unsigned int index, int fd) &quot;dev: %p index: %u fd: %d&quot;
vhost_vdpa_set_vring_call(void *dev, unsigned int index, int fd) &quot;dev: %p index: %u fd: %d&quot;
vhost_vdpa_get_features(void *dev, uint64_t features) &quot;dev: %p features: 0x%&quot;PRIx64
vhost_vdpa_set_owner(void *dev) &quot;dev: %p&quot;
vhost_vdpa_vq_get_addr(void *dev, void *vq, uint64_t desc_user_addr, uint64_t avail_user_addr, uint64_t used_user_addr) &quot;dev: %p vq: %p desc_user_addr: 0x%&quot;PRIx64&quot; avail_user_addr: 0x%&quot;PRIx64&quot; used_user_addr: 0x%&quot;PRIx64
vhost_vdpa_get_iova_range(void *dev, uint64_t first, uint64_t last) &quot;dev: %p first: 0x%&quot;PRIx64&quot; last: 0x%&quot;PRIx64
vhost_vdpa_set_config_call(void *dev, int fd)&quot;dev: %p fd: %d&quot;

# virtio.c
virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned out_num) &quot;elem %p size %zd in_num %u out_num %u&quot;
virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) &quot;vq %p elem %p len %u idx %u&quot;
virtqueue_flush(void *vq, unsigned int count) &quot;vq %p count %u&quot;
virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) &quot;vq %p elem %p in_num %u out_num %u&quot;
virtio_queue_notify(void *vdev, int n, void *vq) &quot;vdev %p n %d vq %p&quot;
virtio_notify_irqfd_deferred_fn(void *vdev, void *vq) &quot;vdev %p vq %p&quot;
virtio_notify_irqfd(void *vdev, void *vq) &quot;vdev %p vq %p&quot;
virtio_notify(void *vdev, void *vq) &quot;vdev %p vq %p&quot;
virtio_set_status(void *vdev, uint8_t val) &quot;vdev %p val %u&quot;

# virtio-rng.c
virtio_rng_guest_not_ready(void *rng) &quot;rng %p: guest not ready&quot;
virtio_rng_cpu_is_stopped(void *rng, int size) &quot;rng %p: cpu is stopped, dropping %d bytes&quot;
virtio_rng_popped(void *rng) &quot;rng %p: elem popped&quot;
virtio_rng_pushed(void *rng, size_t len) &quot;rng %p: %zd bytes pushed&quot;
virtio_rng_request(void *rng, size_t size, unsigned quota) &quot;rng %p: %zd bytes requested, %u bytes quota left&quot;
virtio_rng_vm_state_change(void *rng, int running, int state) &quot;rng %p: state change to running %d state %d&quot;

# virtio-balloon.c
#
virtio_balloon_bad_addr(uint64_t gpa) &quot;0x%&quot;PRIx64
virtio_balloon_handle_output(const char *name, uint64_t gpa) &quot;section name: %s gpa: 0x%&quot;PRIx64
virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) &quot;num_pages: %d actual: %d&quot;
virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) &quot;actual: %d oldactual: %d&quot;
virtio_balloon_to_target(uint64_t target, uint32_t num_pages) &quot;balloon target: 0x%&quot;PRIx64&quot; num_pages: %d&quot;

# virtio-mmio.c
virtio_mmio_read(uint64_t offset) &quot;virtio_mmio_read offset 0x%&quot; PRIx64
virtio_mmio_write_offset(uint64_t offset, uint64_t value) &quot;virtio_mmio_write offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
virtio_mmio_guest_page(uint64_t size, int shift) &quot;guest page size 0x%&quot; PRIx64 &quot; shift %d&quot;
virtio_mmio_queue_write(uint64_t value, int max_size) &quot;mmio_queue write 0x%&quot; PRIx64 &quot; max %d&quot;
virtio_mmio_setting_irq(int level) &quot;virtio_mmio setting IRQ %d&quot;

# virtio-pci.c
virtio_pci_notify(uint16_t vector) &quot;virtio_pci_notify vec 0x%x&quot;
virtio_pci_notify_write(uint64_t addr, uint64_t val, unsigned int size) &quot;0x%&quot; PRIx64&quot; = 0x%&quot; PRIx64 &quot; (%d)&quot;
virtio_pci_notify_write_pio(uint64_t addr, uint64_t val, unsigned int size) &quot;0x%&quot; PRIx64&quot; = 0x%&quot; PRIx64 &quot; (%d)&quot;

# hw/virtio/virtio-iommu.c
virtio_iommu_device_reset(void) &quot;reset!&quot;
virtio_iommu_system_reset(void) &quot;system reset!&quot;
virtio_iommu_get_features(uint64_t features) &quot;device supports features=0x%&quot;PRIx64
virtio_iommu_device_status(uint8_t status) &quot;driver status = %d&quot;
virtio_iommu_get_config(uint64_t page_size_mask, uint64_t start, uint64_t end, uint32_t domain_start, uint32_t domain_end, uint32_t probe_size, uint8_t bypass) &quot;page_size_mask=0x%&quot;PRIx64&quot; input range start=0x%&quot;PRIx64&quot; input range end=0x%&quot;PRIx64&quot; domain range start=%d domain range end=%d probe_size=0x%x bypass=0x%x&quot;
virtio_iommu_set_config(uint8_t bypass) &quot;bypass=0x%x&quot;
virtio_iommu_attach(uint32_t domain_id, uint32_t ep_id) &quot;domain=%d endpoint=%d&quot;
virtio_iommu_detach(uint32_t domain_id, uint32_t ep_id) &quot;domain=%d endpoint=%d&quot;
virtio_iommu_map(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start, uint32_t flags) &quot;domain=%d virt_start=0x%&quot;PRIx64&quot; virt_end=0x%&quot;PRIx64 &quot; phys_start=0x%&quot;PRIx64&quot; flags=%d&quot;
virtio_iommu_unmap(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end) &quot;domain=%d virt_start=0x%&quot;PRIx64&quot; virt_end=0x%&quot;PRIx64
virtio_iommu_unmap_done(uint32_t domain_id, uint64_t virt_start, uint64_t virt_end) &quot;domain=%d virt_start=0x%&quot;PRIx64&quot; virt_end=0x%&quot;PRIx64
virtio_iommu_translate(const char *name, uint32_t rid, uint64_t iova, int flag) &quot;mr=%s rid=%d addr=0x%&quot;PRIx64&quot; flag=%d&quot;
virtio_iommu_init_iommu_mr(char *iommu_mr) &quot;init %s&quot;
virtio_iommu_get_endpoint(uint32_t ep_id) &quot;Alloc endpoint=%d&quot;
virtio_iommu_put_endpoint(uint32_t ep_id) &quot;Free endpoint=%d&quot;
virtio_iommu_get_domain(uint32_t domain_id) &quot;Alloc domain=%d&quot;
virtio_iommu_put_domain(uint32_t domain_id) &quot;Free domain=%d&quot;
virtio_iommu_translate_out(uint64_t virt_addr, uint64_t phys_addr, uint32_t sid) &quot;0x%&quot;PRIx64&quot; -&gt; 0x%&quot;PRIx64 &quot; for sid=%d&quot;
virtio_iommu_report_fault(uint8_t reason, uint32_t flags, uint32_t endpoint, uint64_t addr) &quot;FAULT reason=%d flags=%d endpoint=%d address =0x%&quot;PRIx64
virtio_iommu_fill_resv_property(uint32_t devid, uint8_t subtype, uint64_t start, uint64_t end) &quot;dev= %d, type=%d start=0x%&quot;PRIx64&quot; end=0x%&quot;PRIx64
virtio_iommu_notify_map(const char *name, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start, uint32_t flags) &quot;mr=%s virt_start=0x%&quot;PRIx64&quot; virt_end=0x%&quot;PRIx64&quot; phys_start=0x%&quot;PRIx64&quot; flags=%d&quot;
virtio_iommu_notify_unmap(const char *name, uint64_t virt_start, uint64_t virt_end) &quot;mr=%s virt_start=0x%&quot;PRIx64&quot; virt_end=0x%&quot;PRIx64
virtio_iommu_remap(const char *name, uint64_t virt_start, uint64_t virt_end, uint64_t phys_start) &quot;mr=%s virt_start=0x%&quot;PRIx64&quot; virt_end=0x%&quot;PRIx64&quot; phys_start=0x%&quot;PRIx64
virtio_iommu_set_page_size_mask(const char *name, uint64_t old, uint64_t new) &quot;mr=%s old_mask=0x%&quot;PRIx64&quot; new_mask=0x%&quot;PRIx64
virtio_iommu_notify_flag_add(const char *name) &quot;add notifier to mr %s&quot;
virtio_iommu_notify_flag_del(const char *name) &quot;del notifier from mr %s&quot;
virtio_iommu_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) &quot;Device %02x:%02x.%x switching address space (iommu enabled=%d)&quot;
virtio_iommu_freeze_granule(uint64_t page_size_mask) &quot;granule set to 0x%&quot;PRIx64
virtio_iommu_host_resv_regions(const char *name, uint32_t index, uint64_t lob, uint64_t upb) &quot;mr=%s host-resv-reg[%d] = [0x%&quot;PRIx64&quot;,0x%&quot;PRIx64&quot;]&quot;

# virtio-mem.c
virtio_mem_send_response(uint16_t type) &quot;type=%&quot; PRIu16
virtio_mem_plug_request(uint64_t addr, uint16_t nb_blocks) &quot;addr=0x%&quot; PRIx64 &quot; nb_blocks=%&quot; PRIu16
virtio_mem_unplug_request(uint64_t addr, uint16_t nb_blocks) &quot;addr=0x%&quot; PRIx64 &quot; nb_blocks=%&quot; PRIu16
virtio_mem_unplugged_all(void) &quot;&quot;
virtio_mem_unplug_all_request(void) &quot;&quot;
virtio_mem_resized_usable_region(uint64_t old_size, uint64_t new_size) &quot;old_size=0x%&quot; PRIx64 &quot;new_size=0x%&quot; PRIx64
virtio_mem_state_request(uint64_t addr, uint16_t nb_blocks) &quot;addr=0x%&quot; PRIx64 &quot; nb_blocks=%&quot; PRIu16
virtio_mem_state_response(uint16_t state) &quot;state=%&quot; PRIu16

# virtio-pmem.c
virtio_pmem_flush_request(void) &quot;flush request&quot;
virtio_pmem_response(void) &quot;flush response&quot;
virtio_pmem_flush_done(int type) &quot;fsync return=%d&quot;

# virtio-gpio.c
virtio_gpio_start(void) &quot;start&quot;
virtio_gpio_stop(void) &quot;stop&quot;
virtio_gpio_set_status(uint8_t status) &quot;0x%x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# allwinner-wdt.c
allwinner_wdt_read(uint64_t offset, uint64_t data, unsigned size) &quot;Allwinner watchdog read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
allwinner_wdt_write(uint64_t offset, uint64_t data, unsigned size) &quot;Allwinner watchdog write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
allwinner_wdt_reset_enter(void) &quot;Allwinner watchdog: reset&quot;
allwinner_wdt_update_timer(uint8_t count) &quot;Allwinner watchdog: count %&quot; PRIu8
allwinner_wdt_expired(bool enabled, bool reset_enabled) &quot;Allwinner watchdog: enabled %u reset_enabled %u&quot;

# cmsdk-apb-watchdog.c
cmsdk_apb_watchdog_read(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB watchdog read: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_watchdog_write(uint64_t offset, uint64_t data, unsigned size) &quot;CMSDK APB watchdog write: offset 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; size %u&quot;
cmsdk_apb_watchdog_reset(void) &quot;CMSDK APB watchdog: reset&quot;
cmsdk_apb_watchdog_lock(uint32_t lock) &quot;CMSDK APB watchdog: lock %&quot; PRIu32

# wdt-aspeed.c
aspeed_wdt_read(uint64_t addr, uint32_t size) &quot;@0x%&quot; PRIx64 &quot; size=%d&quot;
aspeed_wdt_write(uint64_t addr, uint32_t size, uint64_t data) &quot;@0x%&quot; PRIx64 &quot; size=%d value=0x%&quot;PRIx64

# wdt_imx2.c
imx2_wdt_read(uint32_t addr, uint16_t data) &quot;[0x%&quot; PRIx32 &quot;] -&gt; 0x%&quot; PRIx16
imx2_wdt_write(uint32_t addr, uint16_t data) &quot;[0x%&quot; PRIx32 &quot;] &lt;- 0x%&quot; PRIx16
imx2_wdt_interrupt(void) &quot;&quot;
imx2_wdt_expired(void) &quot;&quot;

# spapr_watchdog.c
spapr_watchdog_start(uint64_t flags, uint64_t num, uint64_t timeout) &quot;Flags 0x%&quot; PRIx64 &quot; num=%&quot; PRId64 &quot; %&quot; PRIu64 &quot;ms&quot;
spapr_watchdog_stop(uint64_t num, uint64_t ret) &quot;num=%&quot; PRIu64 &quot; ret=%&quot; PRId64
spapr_watchdog_query(uint64_t caps) &quot;caps=0x%&quot; PRIx64
spapr_watchdog_query_lpm(uint64_t caps) &quot;caps=0x%&quot; PRIx64
spapr_watchdog_expired(uint64_t num, unsigned action) &quot;num=%&quot; PRIu64 &quot; action=%u&quot;

# watchdog.c
watchdog_perform_action(unsigned int action) &quot;action=%u&quot;
watchdog_set_action(unsigned int action) &quot;action=%u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# ../../include/hw/xen/xen_native.h
xen_default_ioreq_server(void) &quot;&quot;
xen_ioreq_server_create(uint32_t id) &quot;id: %u&quot;
xen_ioreq_server_destroy(uint32_t id) &quot;id: %u&quot;
xen_ioreq_server_state(uint32_t id, bool enable) &quot;id: %u: enable: %i&quot;
xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) &quot;id: %u start: 0x%&quot;PRIx64&quot; end: 0x%&quot;PRIx64
xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) &quot;id: %u start: 0x%&quot;PRIx64&quot; end: 0x%&quot;PRIx64
xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) &quot;id: %u start: 0x%&quot;PRIx64&quot; end: 0x%&quot;PRIx64
xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) &quot;id: %u start: 0x%&quot;PRIx64&quot; end: 0x%&quot;PRIx64
xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) &quot;id: %u bdf: %02x.%02x.%02x&quot;
xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) &quot;id: %u bdf: %02x.%02x.%02x&quot;
xen_domid_restrict(int err) &quot;err: %u&quot;

# xen-bus.c
xen_bus_realize(void) &quot;&quot;
xen_bus_unrealize(void) &quot;&quot;
xen_bus_enumerate(void) &quot;&quot;
xen_bus_cleanup(void) &quot;&quot;
xen_bus_type_enumerate(const char *type) &quot;type: %s&quot;
xen_bus_backend_create(const char *type, const char *path) &quot;type: %s path: %s&quot;
xen_bus_device_cleanup(const char *type, char *name) &quot;type: %s name: %s&quot;
xen_bus_add_watch(const char *node, const char *key) &quot;node: %s key: %s&quot;
xen_bus_remove_watch(const char *node, const char *key) &quot;node: %s key: %s&quot;
xen_device_realize(const char *type, char *name) &quot;type: %s name: %s&quot;
xen_device_unrealize(const char *type, char *name) &quot;type: %s name: %s&quot;
xen_device_backend_state(const char *type, char *name, const char *state) &quot;type: %s name: %s -&gt; %s&quot;
xen_device_backend_online(const char *type, char *name, bool online) &quot;type: %s name: %s -&gt; %u&quot;
xen_device_backend_changed(const char *type, char *name) &quot;type: %s name: %s&quot;
xen_device_frontend_state(const char *type, char *name, const char *state) &quot;type: %s name: %s -&gt; %s&quot;
xen_device_frontend_changed(const char *type, char *name) &quot;type: %s name: %s&quot;
xen_device_unplug(const char *type, char *name) &quot;type: %s name: %s&quot;
xen_device_add_watch(const char *type, char *name, const char *node, const char *key) &quot;type: %s name: %s node: %s key: %s&quot;
xen_device_remove_watch(const char *type, char *name, const char *node, const char *key) &quot;type: %s name: %s node: %s key: %s&quot;

# xen-bus-helper.c
xs_node_create(const char *node) &quot;%s&quot;
xs_node_destroy(const char *node) &quot;%s&quot;
xs_node_vprintf(char *path, char *value) &quot;%s %s&quot;
xs_node_vscanf(char *path, char *value) &quot;%s %s&quot;
xs_node_watch(char *path) &quot;%s&quot;
xs_node_unwatch(char *path) &quot;%s&quot;

# xen-hvm.c
xen_ram_alloc(unsigned long ram_addr, unsigned long size) &quot;requested: 0x%lx, size 0x%lx&quot;
xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) &quot;0x%&quot;PRIx64&quot; size 0x%lx, log_dirty %i&quot;
handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) &quot;I/O=%p type=%d dir=%d df=%d ptr=%d port=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64&quot; count=%d size=%d&quot;
handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) &quot;I/O=%p read type=%d df=%d ptr=%d port=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64&quot; count=%d size=%d&quot;
handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) &quot;I/O=%p write type=%d df=%d ptr=%d port=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64&quot; count=%d size=%d&quot;
cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) &quot;I/O=%p pio dir=%d df=%d ptr=%d port=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64&quot; count=%d size=%d&quot;
cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) &quot;I/O=%p pio read reg data=0x%&quot;PRIx64&quot; port=0x%&quot;PRIx64&quot; size=%d&quot;
cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) &quot;I/O=%p pio write reg data=0x%&quot;PRIx64&quot; port=0x%&quot;PRIx64&quot; size=%d&quot;
cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) &quot;I/O=%p copy dir=%d df=%d ptr=%d port=0x%&quot;PRIx64&quot; data=0x%&quot;PRIx64&quot; count=%d size=%d&quot;
xen_map_resource_ioreq(uint32_t id, void *addr) &quot;id: %u addr: %p&quot;
cpu_ioreq_config_read(void *req, uint32_t sbdf, uint32_t reg, uint32_t size, uint32_t data) &quot;I/O=%p sbdf=0x%x reg=%u size=%u data=0x%x&quot;
cpu_ioreq_config_write(void *req, uint32_t sbdf, uint32_t reg, uint32_t size, uint32_t data) &quot;I/O=%p sbdf=0x%x reg=%u size=%u data=0x%x&quot;

# xen-mapcache.c
xen_map_cache(uint64_t phys_addr) &quot;want 0x%&quot;PRIx64
xen_remap_bucket(uint64_t index) &quot;index 0x%&quot;PRIx64
xen_map_cache_return(void* ptr) &quot;%p&quot;
# See docs/devel/tracing.rst for syntax documentation.

# npcm7xx_gpio.c
npcm7xx_gpio_read(const char *id, uint64_t offset, uint64_t value) &quot; %s offset: 0x%04&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
npcm7xx_gpio_write(const char *id, uint64_t offset, uint64_t value) &quot;%s offset: 0x%04&quot; PRIx64 &quot; value 0x%08&quot; PRIx64
npcm7xx_gpio_set_input(const char *id, int32_t line, int32_t level) &quot;%s line: %&quot; PRIi32 &quot; level: %&quot; PRIi32
npcm7xx_gpio_set_output(const char *id, int32_t line, int32_t level) &quot;%s line: %&quot; PRIi32 &quot; level: %&quot; PRIi32
npcm7xx_gpio_update_events(const char *id, uint32_t evst, uint32_t even) &quot;%s evst: 0x%08&quot; PRIx32 &quot; even: 0x%08&quot; PRIx32

# nrf51_gpio.c
nrf51_gpio_read(uint64_t offset, uint64_t r) &quot;offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
nrf51_gpio_write(uint64_t offset, uint64_t value) &quot;offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
nrf51_gpio_set(int64_t line, int64_t value) &quot;line %&quot; PRIi64 &quot; value %&quot; PRIi64
nrf51_gpio_update_output_irq(int64_t line, int64_t value) &quot;line %&quot; PRIi64 &quot; value %&quot; PRIi64

# pl061.c
pl061_update(const char *id, uint32_t dir, uint32_t data, uint32_t pullups, uint32_t floating) &quot;%s GPIODIR 0x%x GPIODATA 0x%x pullups 0x%x floating 0x%x&quot;
pl061_set_output(const char *id, int gpio, int level) &quot;%s setting output %d to %d&quot;
pl061_input_change(const char *id, int gpio, int level) &quot;%s input %d changed to %d&quot;
pl061_update_istate(const char *id, uint32_t istate, uint32_t im, int level) &quot;%s GPIORIS 0x%x GPIOIE 0x%x interrupt level %d&quot;
pl061_read(const char *id, uint64_t offset, uint64_t r) &quot;%s offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
pl061_write(const char *id, uint64_t offset, uint64_t value) &quot;%s offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
pl061_reset(const char *id) &quot;%s reset&quot;

# sifive_gpio.c
sifive_gpio_read(uint64_t offset, uint64_t r) &quot;offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
sifive_gpio_write(uint64_t offset, uint64_t value) &quot;offset 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
sifive_gpio_set(int64_t line, int64_t value) &quot;line %&quot; PRIi64 &quot; value %&quot; PRIi64
sifive_gpio_update_output_irq(int64_t line, int64_t value) &quot;line %&quot; PRIi64 &quot; value %&quot; PRIi64

# aspeed_gpio.c
aspeed_gpio_read(uint64_t offset, uint64_t value) &quot;offset: 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
aspeed_gpio_write(uint64_t offset, uint64_t value) &quot;offset: 0x%&quot; PRIx64 &quot; value 0x%&quot; PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# savevm.c
qemu_loadvm_state_section(unsigned int section_type) &quot;%d&quot;
qemu_loadvm_state_section_command(int ret) &quot;%d&quot;
qemu_loadvm_state_section_partend(uint32_t section_id) &quot;%u&quot;
qemu_loadvm_state_post_main(int ret) &quot;%d&quot;
qemu_loadvm_state_section_startfull(uint32_t section_id, const char *idstr, uint32_t instance_id, uint32_t version_id) &quot;%u(%s) %u %u&quot;
qemu_savevm_send_packaged(void) &quot;&quot;
loadvm_state_switchover_ack_needed(unsigned int switchover_ack_pending_num) &quot;Switchover ack pending num=%u&quot;
loadvm_state_setup(void) &quot;&quot;
loadvm_state_cleanup(void) &quot;&quot;
loadvm_handle_cmd_packaged(unsigned int length) &quot;%u&quot;
loadvm_handle_cmd_packaged_main(int ret) &quot;%d&quot;
loadvm_handle_cmd_packaged_received(int ret) &quot;%d&quot;
loadvm_handle_recv_bitmap(char *s) &quot;%s&quot;
loadvm_postcopy_handle_advise(void) &quot;&quot;
loadvm_postcopy_handle_listen(const char *str) &quot;%s&quot;
loadvm_postcopy_handle_run(void) &quot;&quot;
loadvm_postcopy_handle_resume(void) &quot;&quot;
loadvm_postcopy_ram_handle_discard(void) &quot;&quot;
loadvm_postcopy_ram_handle_discard_end(void) &quot;&quot;
loadvm_postcopy_ram_handle_discard_header(const char *ramid, uint16_t len) &quot;%s: %ud&quot;
loadvm_process_command(const char *s, uint16_t len) &quot;com=%s len=%d&quot;
loadvm_process_command_ping(uint32_t val) &quot;0x%x&quot;
loadvm_approve_switchover(unsigned int switchover_ack_pending_num) &quot;Switchover ack pending num=%u&quot;
postcopy_ram_listen_thread_exit(void) &quot;&quot;
postcopy_ram_listen_thread_start(void) &quot;&quot;
qemu_savevm_send_postcopy_advise(void) &quot;&quot;
qemu_savevm_send_postcopy_ram_discard(const char *id, uint16_t len) &quot;%s: %ud&quot;
savevm_command_send(uint16_t command, uint16_t len) &quot;com=0x%x len=%d&quot;
savevm_section_start(const char *id, unsigned int section_id) &quot;%s, section_id %u&quot;
savevm_section_end(const char *id, unsigned int section_id, int ret) &quot;%s, section_id %u -&gt; %d&quot;
savevm_section_skip(const char *id, unsigned int section_id) &quot;%s, section_id %u&quot;
savevm_send_open_return_path(void) &quot;&quot;
savevm_send_ping(uint32_t val) &quot;0x%x&quot;
savevm_send_postcopy_listen(void) &quot;&quot;
savevm_send_postcopy_run(void) &quot;&quot;
savevm_send_postcopy_resume(void) &quot;&quot;
savevm_send_colo_enable(void) &quot;&quot;
savevm_send_recv_bitmap(char *name) &quot;%s&quot;
savevm_state_setup(void) &quot;&quot;
savevm_state_resume_prepare(void) &quot;&quot;
savevm_state_header(void) &quot;&quot;
savevm_state_iterate(void) &quot;&quot;
savevm_state_cleanup(void) &quot;&quot;
savevm_state_complete_precopy(void) &quot;&quot;
vmstate_save(const char *idstr, const char *vmsd_name) &quot;%s, %s&quot;
vmstate_load(const char *idstr, const char *vmsd_name) &quot;%s, %s&quot;
vmstate_downtime_save(const char *type, const char *idstr, uint32_t instance_id, int64_t downtime) &quot;type=%s idstr=%s instance_id=%d downtime=%&quot;PRIi64
vmstate_downtime_load(const char *type, const char *idstr, uint32_t instance_id, int64_t downtime) &quot;type=%s idstr=%s instance_id=%d downtime=%&quot;PRIi64
vmstate_downtime_checkpoint(const char *checkpoint) &quot;%s&quot;
postcopy_pause_incoming(void) &quot;&quot;
postcopy_pause_incoming_continued(void) &quot;&quot;
postcopy_page_req_sync(void *host_addr) &quot;sync page req %p&quot;

# vmstate.c
vmstate_load_field_error(const char *field, int ret) &quot;field \&quot;%s\&quot; load failed, ret = %d&quot;
vmstate_load_state(const char *name, int version_id) &quot;%s v%d&quot;
vmstate_load_state_end(const char *name, const char *reason, int val) &quot;%s %s/%d&quot;
vmstate_load_state_field(const char *name, const char *field) &quot;%s:%s&quot;
vmstate_n_elems(const char *name, int n_elems) &quot;%s: %d&quot;
vmstate_subsection_load(const char *parent) &quot;%s&quot;
vmstate_subsection_load_bad(const char *parent,  const char *sub, const char *sub2) &quot;%s: %s/%s&quot;
vmstate_subsection_load_good(const char *parent) &quot;%s&quot;
vmstate_save_state_pre_save_res(const char *name, int res) &quot;%s/%d&quot;
vmstate_save_state_loop(const char *name, const char *field, int n_elems) &quot;%s/%s[%d]&quot;
vmstate_save_state_top(const char *idstr) &quot;%s&quot;
vmstate_subsection_save_loop(const char *name, const char *sub) &quot;%s/%s&quot;
vmstate_subsection_save_top(const char *idstr) &quot;%s&quot;
vmstate_field_exists(const char *vmsd, const char *name, int field_version, int version, int result) &quot;%s:%s field_version %d version %d result %d&quot;

# vmstate-types.c
get_qtailq(const char *name, int version_id) &quot;%s v%d&quot;
get_qtailq_end(const char *name, const char *reason, int val) &quot;%s %s/%d&quot;
put_qtailq(const char *name, int version_id) &quot;%s v%d&quot;
put_qtailq_end(const char *name, const char *reason) &quot;%s %s&quot;

get_gtree(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, uint32_t nnodes) &quot;%s(%s/%s) nnodes=%d&quot;
get_gtree_end(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, int ret) &quot;%s(%s/%s) %d&quot;
put_gtree(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, uint32_t nnodes) &quot;%s(%s/%s) nnodes=%d&quot;
put_gtree_end(const char *field_name, const char *key_vmsd_name, const char *val_vmsd_name, int ret) &quot;%s(%s/%s) %d&quot;

get_qlist(const char *field_name, const char *vmsd_name, int version_id) &quot;%s(%s v%d)&quot;
get_qlist_end(const char *field_name, const char *vmsd_name) &quot;%s(%s)&quot;
put_qlist(const char *field_name, const char *vmsd_name, int version_id) &quot;%s(%s v%d)&quot;
put_qlist_end(const char *field_name, const char *vmsd_name) &quot;%s(%s)&quot;

# qemu-file.c
qemu_file_fclose(void) &quot;&quot;

# ram.c
get_queued_page(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) &quot;%s/0x%&quot; PRIx64 &quot; page_abs=0x%lx&quot;
get_queued_page_not_dirty(const char *block_name, uint64_t tmp_offset, unsigned long page_abs) &quot;%s/0x%&quot; PRIx64 &quot; page_abs=0x%lx&quot;
migration_bitmap_sync_start(void) &quot;&quot;
migration_bitmap_sync_end(uint64_t dirty_pages) &quot;dirty_pages %&quot; PRIu64
migration_bitmap_clear_dirty(char *str, uint64_t start, uint64_t size, unsigned long page) &quot;rb %s start 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot; page 0x%lx&quot;
migration_throttle(void) &quot;&quot;
migration_dirty_limit_guest(int64_t dirtyrate) &quot;guest dirty page rate limit %&quot; PRIi64 &quot; MB/s&quot;
ram_discard_range(const char *rbname, uint64_t start, size_t len) &quot;%s: start: %&quot; PRIx64 &quot; %zx&quot;
ram_load_loop(const char *rbname, uint64_t addr, int flags, void *host) &quot;%s: addr: 0x%&quot; PRIx64 &quot; flags: 0x%x host: %p&quot;
ram_load_postcopy_loop(int channel, uint64_t addr, int flags) &quot;chan=%d addr=0x%&quot; PRIx64 &quot; flags=0x%x&quot;
ram_postcopy_send_discard_bitmap(void) &quot;&quot;
ram_save_page(const char *rbname, uint64_t offset, void *host) &quot;%s: offset: 0x%&quot; PRIx64 &quot; host: %p&quot;
ram_save_queue_pages(const char *rbname, size_t start, size_t len) &quot;%s: start: 0x%zx len: 0x%zx&quot;
ram_dirty_bitmap_request(char *str) &quot;%s&quot;
ram_dirty_bitmap_reload_begin(char *str) &quot;%s&quot;
ram_dirty_bitmap_reload_complete(char *str) &quot;%s&quot;
ram_dirty_bitmap_sync_start(void) &quot;&quot;
ram_dirty_bitmap_sync_wait(void) &quot;&quot;
ram_dirty_bitmap_sync_complete(void) &quot;&quot;
ram_state_resume_prepare(uint64_t v) &quot;%&quot; PRId64
colo_flush_ram_cache_begin(uint64_t dirty_pages) &quot;dirty_pages %&quot; PRIu64
colo_flush_ram_cache_end(void) &quot;&quot;
save_xbzrle_page_skipping(void) &quot;&quot;
save_xbzrle_page_overflow(void) &quot;&quot;
ram_save_iterate_big_wait(uint64_t milliconds, int iterations) &quot;big wait: %&quot; PRIu64 &quot; milliseconds, %d iterations&quot;
ram_load_complete(int ret, uint64_t seq_iter) &quot;exit_code %d seq iteration %&quot; PRIu64
ram_write_tracking_ramblock_start(const char *block_id, size_t page_size, void *addr, size_t length) &quot;%s: page_size: %zu addr: %p length: %zu&quot;
ram_write_tracking_ramblock_stop(const char *block_id, size_t page_size, void *addr, size_t length) &quot;%s: page_size: %zu addr: %p length: %zu&quot;
postcopy_preempt_triggered(char *str, unsigned long page) &quot;during sending ramblock %s offset 0x%lx&quot;
postcopy_preempt_restored(char *str, unsigned long page) &quot;ramblock %s offset 0x%lx&quot;
postcopy_preempt_hit(char *str, uint64_t offset) &quot;ramblock %s offset 0x%&quot;PRIx64
postcopy_preempt_send_host_page(char *str, uint64_t offset) &quot;ramblock %s offset 0x%&quot;PRIx64
postcopy_preempt_switch_channel(int channel) &quot;%d&quot;
postcopy_preempt_reset_channel(void) &quot;&quot;

# multifd.c
multifd_new_send_channel_async(uint8_t id) &quot;channel %u&quot;
multifd_new_send_channel_async_error(uint8_t id, void *err) &quot;channel=%u err=%p&quot;
multifd_recv(uint8_t id, uint64_t packet_num, uint32_t used, uint32_t flags, uint32_t next_packet_size) &quot;channel %u packet_num %&quot; PRIu64 &quot; pages %u flags 0x%x next packet size %u&quot;
multifd_recv_new_channel(uint8_t id) &quot;channel %u&quot;
multifd_recv_sync_main(long packet_num) &quot;packet num %ld&quot;
multifd_recv_sync_main_signal(uint8_t id) &quot;channel %u&quot;
multifd_recv_sync_main_wait(uint8_t id) &quot;channel %u&quot;
multifd_recv_terminate_threads(bool error) &quot;error %d&quot;
multifd_recv_thread_end(uint8_t id, uint64_t packets, uint64_t pages) &quot;channel %u packets %&quot; PRIu64 &quot; pages %&quot; PRIu64
multifd_recv_thread_start(uint8_t id) &quot;%u&quot;
multifd_send(uint8_t id, uint64_t packet_num, uint32_t normal, uint32_t flags, uint32_t next_packet_size) &quot;channel %u packet_num %&quot; PRIu64 &quot; normal pages %u flags 0x%x next packet size %u&quot;
multifd_send_error(uint8_t id) &quot;channel %u&quot;
multifd_send_sync_main(long packet_num) &quot;packet num %ld&quot;
multifd_send_sync_main_signal(uint8_t id) &quot;channel %u&quot;
multifd_send_sync_main_wait(uint8_t id) &quot;channel %u&quot;
multifd_send_terminate_threads(bool error) &quot;error %d&quot;
multifd_send_thread_end(uint8_t id, uint64_t packets, uint64_t normal_pages) &quot;channel %u packets %&quot; PRIu64 &quot; normal pages %&quot;  PRIu64
multifd_send_thread_start(uint8_t id) &quot;%u&quot;
multifd_tls_outgoing_handshake_start(void *ioc, void *tioc, const char *hostname) &quot;ioc=%p tioc=%p hostname=%s&quot;
multifd_tls_outgoing_handshake_error(void *ioc, const char *err) &quot;ioc=%p err=%s&quot;
multifd_tls_outgoing_handshake_complete(void *ioc) &quot;ioc=%p&quot;
multifd_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname)  &quot;ioc=%p ioctype=%s hostname=%s&quot;

# migration.c
migrate_set_state(const char *new_state) &quot;new state %s&quot;
migrate_fd_cleanup(void) &quot;&quot;
migrate_fd_error(const char *error_desc) &quot;error=%s&quot;
migrate_fd_cancel(void) &quot;&quot;
migrate_handle_rp_req_pages(const char *rbname, size_t start, size_t len) &quot;in %s at 0x%zx len 0x%zx&quot;
migrate_pending_exact(uint64_t size, uint64_t pre, uint64_t post) &quot;exact pending size %&quot; PRIu64 &quot; (pre = %&quot; PRIu64 &quot; post=%&quot; PRIu64 &quot;)&quot;
migrate_pending_estimate(uint64_t size, uint64_t pre, uint64_t post) &quot;estimate pending size %&quot; PRIu64 &quot; (pre = %&quot; PRIu64 &quot; post=%&quot; PRIu64 &quot;)&quot;
migrate_send_rp_message(int msg_type, uint16_t len) &quot;%d: len %d&quot;
migrate_send_rp_recv_bitmap(char *name, int64_t size) &quot;block &#039;%s&#039; size 0x%&quot;PRIi64
migration_completion_file_err(void) &quot;&quot;
migration_completion_vm_stop(int ret) &quot;ret %d&quot;
migration_completion_postcopy_end(void) &quot;&quot;
migration_completion_postcopy_end_after_complete(void) &quot;&quot;
migration_rate_limit_pre(int ms) &quot;%d ms&quot;
migration_rate_limit_post(int urgent) &quot;urgent: %d&quot;
migration_return_path_end_before(void) &quot;&quot;
migration_return_path_end_after(void) &quot;&quot;
migration_thread_after_loop(void) &quot;&quot;
migration_thread_file_err(void) &quot;&quot;
migration_thread_setup_complete(void) &quot;&quot;
open_return_path_on_source(void) &quot;&quot;
open_return_path_on_source_continue(void) &quot;&quot;
postcopy_start(void) &quot;&quot;
postcopy_pause_return_path(void) &quot;&quot;
postcopy_pause_return_path_continued(void) &quot;&quot;
postcopy_pause_continued(void) &quot;&quot;
postcopy_start_set_run(void) &quot;&quot;
postcopy_page_req_add(void *addr, int count) &quot;new page req %p total %d&quot;
source_return_path_thread_bad_end(void) &quot;&quot;
source_return_path_thread_end(void) &quot;&quot;
source_return_path_thread_entry(void) &quot;&quot;
source_return_path_thread_loop_top(void) &quot;&quot;
source_return_path_thread_pong(uint32_t val) &quot;0x%x&quot;
source_return_path_thread_shut(uint32_t val) &quot;0x%x&quot;
source_return_path_thread_resume_ack(uint32_t v) &quot;%&quot;PRIu32
source_return_path_thread_switchover_acked(void) &quot;&quot;
migration_thread_low_pending(uint64_t pending) &quot;%&quot; PRIu64
migrate_transferred(uint64_t transferred, uint64_t time_spent, uint64_t bandwidth, uint64_t avail_bw, uint64_t size) &quot;transferred %&quot; PRIu64 &quot; time_spent %&quot; PRIu64 &quot; bandwidth %&quot; PRIu64 &quot; switchover_bw %&quot; PRIu64 &quot; max_size %&quot; PRId64
process_incoming_migration_co_end(int ret, int ps) &quot;ret=%d postcopy-state=%d&quot;
process_incoming_migration_co_postcopy_end_main(void) &quot;&quot;
postcopy_preempt_enabled(bool value) &quot;%d&quot;

# migration-stats
migration_transferred_bytes(uint64_t qemu_file, uint64_t multifd, uint64_t rdma) &quot;qemu_file %&quot; PRIu64 &quot; multifd %&quot; PRIu64 &quot; RDMA %&quot; PRIu64

# channel.c
migration_set_incoming_channel(void *ioc, const char *ioctype) &quot;ioc=%p ioctype=%s&quot;
migration_set_outgoing_channel(void *ioc, const char *ioctype, const char *hostname, void *err)  &quot;ioc=%p ioctype=%s hostname=%s err=%p&quot;

# global_state.c
migrate_state_too_big(void) &quot;&quot;
migrate_global_state_post_load(const char *state) &quot;loaded state: %s&quot;
migrate_global_state_pre_save(const char *state) &quot;saved state: %s&quot;

# rdma.c
qemu_rdma_accept_incoming_migration(void) &quot;&quot;
qemu_rdma_accept_incoming_migration_accepted(void) &quot;&quot;
qemu_rdma_accept_pin_state(bool pin) &quot;%d&quot;
qemu_rdma_accept_pin_verbsc(void *verbs) &quot;Verbs context after listen: %p&quot;
qemu_rdma_block_for_wrid_miss(uint64_t wcomp, uint64_t req) &quot;A Wanted wrid %&quot; PRIu64 &quot; but got %&quot; PRIu64
qemu_rdma_cleanup_disconnect(void) &quot;&quot;
qemu_rdma_close(void) &quot;&quot;
qemu_rdma_connect_pin_all_requested(void) &quot;&quot;
qemu_rdma_connect_pin_all_outcome(bool pin) &quot;%d&quot;
qemu_rdma_dest_init_trying(const char *host, const char *ip) &quot;%s =&gt; %s&quot;
qemu_rdma_dump_id_failed(const char *who) &quot;%s RDMA Device opened, but can&#039;t query port information&quot;
qemu_rdma_dump_id(const char *who, const char *name, const char *dev_name, const char *dev_path, const char *ibdev_path, int transport, const char *transport_name) &quot;%s RDMA Device opened: kernel name %s uverbs device name %s, infiniband_verbs class device path %s, infiniband class device path %s, transport: (%d) %s&quot;
qemu_rdma_dump_gid(const char *who, const char *src, const char *dst) &quot;%s Source GID: %s, Dest GID: %s&quot;
qemu_rdma_exchange_get_response_start(const char *desc) &quot;CONTROL: %s receiving...&quot;
qemu_rdma_exchange_get_response_none(const char *desc, int type) &quot;Surprise: got %s (%d)&quot;
qemu_rdma_exchange_send_issue_callback(void) &quot;&quot;
qemu_rdma_exchange_send_waiting(const char *desc) &quot;Waiting for response %s&quot;
qemu_rdma_exchange_send_received(const char *desc) &quot;Response %s received.&quot;
qemu_rdma_fill(size_t control_len, size_t size) &quot;RDMA %zd of %zd bytes already in buffer&quot;
qemu_rdma_init_ram_blocks(int blocks) &quot;Allocated %d local ram block structures&quot;
qemu_rdma_poll_recv(uint64_t comp, int64_t id, int sent) &quot;completion %&quot; PRIu64 &quot; received (%&quot; PRId64 &quot;) left %d&quot;
qemu_rdma_poll_write(uint64_t comp, int left, uint64_t block, uint64_t chunk, void *local, void *remote) &quot;completions %&quot; PRIu64 &quot; left %d, block %&quot; PRIu64 &quot;, chunk: %&quot; PRIu64 &quot; %p %p&quot;
qemu_rdma_poll_other(uint64_t comp, int left) &quot;other completion %&quot; PRIu64 &quot; received left %d&quot;
qemu_rdma_post_send_control(const char *desc) &quot;CONTROL: sending %s..&quot;
qemu_rdma_register_and_get_keys(uint64_t len, void *start) &quot;Registering %&quot; PRIu64 &quot; bytes @ %p&quot;
qemu_rdma_register_odp_mr(const char *name) &quot;Try to register On-Demand Paging memory region: %s&quot;
qemu_rdma_advise_mr(const char *name, uint32_t len, uint64_t addr, const char *res) &quot;Try to advise block %s prefetch at %&quot; PRIu32 &quot;@0x%&quot; PRIx64 &quot;: %s&quot;
qemu_rdma_resolve_host_trying(const char *host, const char *ip) &quot;Trying %s =&gt; %s&quot;
qemu_rdma_signal_unregister_append(uint64_t chunk, int pos) &quot;Appending unregister chunk %&quot; PRIu64 &quot; at position %d&quot;
qemu_rdma_signal_unregister_already(uint64_t chunk) &quot;Unregister chunk %&quot; PRIu64 &quot; already in queue&quot;
qemu_rdma_unregister_waiting_inflight(uint64_t chunk) &quot;Cannot unregister inflight chunk: %&quot; PRIu64
qemu_rdma_unregister_waiting_proc(uint64_t chunk, int pos) &quot;Processing unregister for chunk: %&quot; PRIu64 &quot; at position %d&quot;
qemu_rdma_unregister_waiting_send(uint64_t chunk) &quot;Sending unregister for chunk: %&quot; PRIu64
qemu_rdma_unregister_waiting_complete(uint64_t chunk) &quot;Unregister for chunk: %&quot; PRIu64 &quot; complete.&quot;
qemu_rdma_write_flush(int sent) &quot;sent total: %d&quot;
qemu_rdma_write_one_block(int count, int block, uint64_t chunk, uint64_t current, uint64_t len, int nb_sent, int nb_chunks) &quot;(%d) Not clobbering: block: %d chunk %&quot; PRIu64 &quot; current %&quot; PRIu64 &quot; len %&quot; PRIu64 &quot; %d %d&quot;
qemu_rdma_write_one_post(uint64_t chunk, long addr, long remote, uint32_t len) &quot;Posting chunk: %&quot; PRIu64 &quot;, addr: 0x%lx remote: 0x%lx, bytes %&quot; PRIu32
qemu_rdma_write_one_queue_full(void) &quot;&quot;
qemu_rdma_write_one_recvregres(int mykey, int theirkey, uint64_t chunk) &quot;Received registration result: my key: 0x%x their key 0x%x, chunk %&quot; PRIu64
qemu_rdma_write_one_sendreg(uint64_t chunk, int len, int index, int64_t offset) &quot;Sending registration request chunk %&quot; PRIu64 &quot; for %d bytes, index: %d, offset: %&quot; PRId64
qemu_rdma_write_one_top(uint64_t chunks, uint64_t size) &quot;Writing %&quot; PRIu64 &quot; chunks, (%&quot; PRIu64 &quot; MB)&quot;
qemu_rdma_write_one_zero(uint64_t chunk, int len, int index, int64_t offset) &quot;Entire chunk is zero, sending compress: %&quot; PRIu64 &quot; for %d bytes, index: %d, offset: %&quot; PRId64
rdma_add_block(const char *block_name, int block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) &quot;Added Block: &#039;%s&#039;:%d, addr: %&quot; PRIu64 &quot;, offset: %&quot; PRIu64 &quot; length: %&quot; PRIu64 &quot; end: %&quot; PRIu64 &quot; bits %&quot; PRIu64 &quot; chunks %d&quot;
rdma_block_notification_handle(const char *name, int index) &quot;%s at %d&quot;
rdma_delete_block(void *block, uint64_t addr, uint64_t offset, uint64_t len, uint64_t end, uint64_t bits, int chunks) &quot;Deleted Block: %p, addr: %&quot; PRIu64 &quot;, offset: %&quot; PRIu64 &quot; length: %&quot; PRIu64 &quot; end: %&quot; PRIu64 &quot; bits %&quot; PRIu64 &quot; chunks %d&quot;
rdma_registration_handle_compress(int64_t length, int index, int64_t offset) &quot;Zapping zero chunk: %&quot; PRId64 &quot; bytes, index %d, offset %&quot; PRId64
rdma_registration_handle_finished(void) &quot;&quot;
rdma_registration_handle_ram_blocks(void) &quot;&quot;
rdma_registration_handle_ram_blocks_loop(const char *name, uint64_t offset, uint64_t length, void *local_host_addr, unsigned int src_index) &quot;%s: @0x%&quot; PRIx64 &quot;/%&quot; PRIu64 &quot; host:@%p src_index: %u&quot;
rdma_registration_handle_register(int requests) &quot;%d requests&quot;
rdma_registration_handle_register_loop(int req, int index, uint64_t addr, uint64_t chunks) &quot;Registration request (%d): index %d, current_addr %&quot; PRIu64 &quot; chunks: %&quot; PRIu64
rdma_registration_handle_register_rkey(int rkey) &quot;0x%x&quot;
rdma_registration_handle_unregister(int requests) &quot;%d requests&quot;
rdma_registration_handle_unregister_loop(int count, int index, uint64_t chunk) &quot;Unregistration request (%d): index %d, chunk %&quot; PRIu64
rdma_registration_handle_unregister_success(uint64_t chunk) &quot;%&quot; PRIu64
rdma_registration_handle_wait(void) &quot;&quot;
rdma_registration_start(uint64_t flags) &quot;%&quot; PRIu64
rdma_registration_stop(uint64_t flags) &quot;%&quot; PRIu64
rdma_registration_stop_ram(void) &quot;&quot;
rdma_start_incoming_migration(void) &quot;&quot;
rdma_start_incoming_migration_after_dest_init(void) &quot;&quot;
rdma_start_incoming_migration_after_rdma_listen(void) &quot;&quot;
rdma_start_outgoing_migration_after_rdma_connect(void) &quot;&quot;
rdma_start_outgoing_migration_after_rdma_source_init(void) &quot;&quot;

# postcopy-ram.c
postcopy_discard_send_finish(const char *ramblock, int nwords, int ncmds) &quot;%s mask words sent=%d in %d commands&quot;
postcopy_discard_send_range(const char *ramblock, unsigned long start, unsigned long length) &quot;%s:%lx/%lx&quot;
postcopy_cleanup_range(const char *ramblock, void *host_addr, size_t offset, size_t length) &quot;%s: %p offset=0x%zx length=0x%zx&quot;
postcopy_init_range(const char *ramblock, void *host_addr, size_t offset, size_t length) &quot;%s: %p offset=0x%zx length=0x%zx&quot;
postcopy_nhp_range(const char *ramblock, void *host_addr, size_t offset, size_t length) &quot;%s: %p offset=0x%zx length=0x%zx&quot;
postcopy_place_page(void *host_addr) &quot;host=%p&quot;
postcopy_place_page_zero(void *host_addr) &quot;host=%p&quot;
postcopy_ram_enable_notify(void) &quot;&quot;
mark_postcopy_blocktime_begin(uint64_t addr, void *dd, uint32_t time, int cpu, int received) &quot;addr: 0x%&quot; PRIx64 &quot;, dd: %p, time: %u, cpu: %d, already_received: %d&quot;
mark_postcopy_blocktime_end(uint64_t addr, void *dd, uint32_t time, int affected_cpu) &quot;addr: 0x%&quot; PRIx64 &quot;, dd: %p, time: %u, affected_cpu: %d&quot;
postcopy_pause_fault_thread(void) &quot;&quot;
postcopy_pause_fault_thread_continued(void) &quot;&quot;
postcopy_pause_fast_load(void) &quot;&quot;
postcopy_pause_fast_load_continued(void) &quot;&quot;
postcopy_ram_fault_thread_entry(void) &quot;&quot;
postcopy_ram_fault_thread_exit(void) &quot;&quot;
postcopy_ram_fault_thread_fds_core(int baseufd, int quitfd) &quot;ufd: %d quitfd: %d&quot;
postcopy_ram_fault_thread_fds_extra(size_t index, const char *name, int fd) &quot;%zd/%s: %d&quot;
postcopy_ram_fault_thread_quit(void) &quot;&quot;
postcopy_ram_fault_thread_request(uint64_t hostaddr, const char *ramblock, size_t offset, uint32_t pid) &quot;Request for HVA=0x%&quot; PRIx64 &quot; rb=%s offset=0x%zx pid=%u&quot;
postcopy_ram_incoming_cleanup_closeuf(void) &quot;&quot;
postcopy_ram_incoming_cleanup_entry(void) &quot;&quot;
postcopy_ram_incoming_cleanup_exit(void) &quot;&quot;
postcopy_ram_incoming_cleanup_join(void) &quot;&quot;
postcopy_ram_incoming_cleanup_blocktime(uint64_t total) &quot;total blocktime %&quot; PRIu64
postcopy_request_shared_page(const char *sharer, const char *rb, uint64_t rb_offset) &quot;for %s in %s offset 0x%&quot;PRIx64
postcopy_request_shared_page_present(const char *sharer, const char *rb, uint64_t rb_offset) &quot;%s already %s offset 0x%&quot;PRIx64
postcopy_wake_shared(uint64_t client_addr, const char *rb) &quot;at 0x%&quot;PRIx64&quot; in %s&quot;
postcopy_page_req_del(void *addr, int count) &quot;resolved page req %p total %d&quot;
postcopy_preempt_tls_handshake(void) &quot;&quot;
postcopy_preempt_new_channel(void) &quot;&quot;
postcopy_preempt_thread_entry(void) &quot;&quot;
postcopy_preempt_thread_exit(void) &quot;&quot;

get_mem_fault_cpu_index(int cpu, uint32_t pid) &quot;cpu: %d, pid: %u&quot;

# exec.c
migration_exec_outgoing(const char *cmd) &quot;cmd=%s&quot;
migration_exec_incoming(const char *cmd) &quot;cmd=%s&quot;

# fd.c
migration_fd_outgoing(int fd) &quot;fd=%d&quot;
migration_fd_incoming(int fd) &quot;fd=%d&quot;

# file.c
migration_file_outgoing(const char *filename) &quot;filename=%s&quot;
migration_file_incoming(const char *filename) &quot;filename=%s&quot;

# socket.c
migration_socket_incoming_accepted(void) &quot;&quot;
migration_socket_outgoing_connected(const char *hostname) &quot;hostname=%s&quot;
migration_socket_outgoing_error(const char *err) &quot;error=%s&quot;

# tls.c
migration_tls_outgoing_handshake_start(const char *hostname) &quot;hostname=%s&quot;
migration_tls_outgoing_handshake_error(const char *err) &quot;err=%s&quot;
migration_tls_outgoing_handshake_complete(void) &quot;&quot;
migration_tls_incoming_handshake_start(void) &quot;&quot;
migration_tls_incoming_handshake_error(const char *err) &quot;err=%s&quot;
migration_tls_incoming_handshake_complete(void) &quot;&quot;

# colo.c
colo_vm_state_change(const char *old, const char *new) &quot;Change &#039;%s&#039; =&gt; &#039;%s&#039;&quot;
colo_send_message(const char *msg) &quot;Send &#039;%s&#039; message&quot;
colo_receive_message(const char *msg) &quot;Receive &#039;%s&#039; message&quot;

# colo-failover.c
colo_failover_set_state(const char *new_state) &quot;new state %s&quot;

# block-dirty-bitmap.c
send_bitmap_header_enter(void) &quot;&quot;
send_bitmap_bits(uint32_t flags, uint64_t start_sector, uint32_t nr_sectors, uint64_t data_size) &quot;flags: 0x%x, start_sector: %&quot; PRIu64 &quot;, nr_sectors: %&quot; PRIu32 &quot;, data_size: %&quot; PRIu64
dirty_bitmap_save_iterate(int in_postcopy) &quot;in postcopy: %d&quot;
dirty_bitmap_save_complete_enter(void) &quot;&quot;
dirty_bitmap_save_complete_finish(void) &quot;&quot;
dirty_bitmap_state_pending(uint64_t pending) &quot;pending %&quot; PRIu64
dirty_bitmap_load_complete(void) &quot;&quot;
dirty_bitmap_load_bits_enter(uint64_t first_sector, uint32_t nr_sectors) &quot;chunk: %&quot; PRIu64 &quot; %&quot; PRIu32
dirty_bitmap_load_bits_zeroes(void) &quot;&quot;
dirty_bitmap_load_header(uint32_t flags) &quot;flags 0x%x&quot;
dirty_bitmap_load_enter(void) &quot;&quot;
dirty_bitmap_load_success(void) &quot;&quot;

# dirtyrate.c
dirtyrate_set_state(const char *new_state) &quot;new state %s&quot;
query_dirty_rate_info(const char *new_state) &quot;current state %s&quot;
get_ramblock_vfn_hash(const char *idstr, uint64_t vfn, uint32_t hash) &quot;ramblock name: %s, vfn: %&quot;PRIu64 &quot;, hash: %&quot; PRIu32
calc_page_dirty_rate(const char *idstr, uint32_t new_hash, uint32_t old_hash) &quot;ramblock name: %s, new hash: %&quot; PRIu32 &quot;, old hash: %&quot; PRIu32
skip_sample_ramblock(const char *idstr, uint64_t ramblock_size) &quot;ramblock name: %s, ramblock size: %&quot; PRIu64
find_page_matched(const char *idstr) &quot;ramblock %s addr or size changed&quot;
dirtyrate_calculate(int64_t dirtyrate) &quot;dirty rate: %&quot; PRIi64 &quot; MB/s&quot;
dirtyrate_do_calculate_vcpu(int idx, uint64_t rate) &quot;vcpu[%d]: %&quot;PRIu64 &quot; MB/s&quot;

# block.c
migration_block_init_shared(const char *blk_device_name) &quot;Start migration for %s with shared base image&quot;
migration_block_init_full(const char *blk_device_name) &quot;Start full migration for %s&quot;
migration_block_save_device_dirty(int64_t sector) &quot;Error reading sector %&quot; PRId64
migration_block_flush_blks(const char *action, int submitted, int read_done, int transferred) &quot;%s submitted %d read_done %d transferred %d&quot;
migration_block_save(const char *mig_stage, int submitted, int transferred) &quot;Enter save live %s submitted %d transferred %d&quot;
migration_block_save_complete(void) &quot;Block migration completed&quot;
migration_block_state_pending(uint64_t pending) &quot;Enter save live pending  %&quot; PRIu64
migration_block_progression(unsigned percent) &quot;Completed %u%%&quot;

# page_cache.c
migration_pagecache_init(int64_t max_num_items) &quot;Setting cache buckets to %&quot; PRId64
migration_pagecache_insert(void) &quot;Error allocating page&quot;
# See docs/devel/tracing.rst for syntax documentation.

# announce.c
qemu_announce_self_iter(const char *id, const char *name, const char *mac, int skip) &quot;%s:%s:%s skip: %d&quot;
qemu_announce_timer_del(bool free_named, bool free_timer, char *id) &quot;free named: %d free timer: %d id: %s&quot;

# vhost-user.c
vhost_user_event(const char *chr, int event) &quot;chr: %s got event: %d&quot;

# colo.c
colo_proxy_main(const char *chr) &quot;: %s&quot;
colo_proxy_main_vnet_info(const char *sta, uint32_t vnet_hdr, int size) &quot;: %s pkt-&gt;vnet_hdr_len = %u, pkt-&gt;size = %d&quot;

# colo-compare.c
colo_compare_main(const char *chr) &quot;: %s&quot;
colo_compare_drop_packet(const char *queue, const char *chr) &quot;: %s: %s&quot;
colo_compare_udp_miscompare(const char *sta, int size) &quot;: %s = %d&quot;
colo_compare_icmp_miscompare(const char *sta, int size) &quot;: %s = %d&quot;
colo_compare_ip_info(int psize, const char *sta, const char *stb, int ssize, const char *stc, const char *std) &quot;ppkt size = %d, ip_src = %s, ip_dst = %s, spkt size = %d, ip_src = %s, ip_dst = %s&quot;
colo_old_packet_check_found(int64_t old_time) &quot;%&quot; PRId64
colo_compare_tcp_info(const char *pkt, uint32_t seq, uint32_t ack, int hdlen, int pdlen, int offset, int flags) &quot;%s: seq/ack= %u/%u hdlen= %d pdlen= %d offset= %d flags=%d&quot;

# filter-rewriter.c
colo_filter_rewriter_pkt_info(const char *func, const char *src, const char *dst, uint32_t seq, uint32_t ack, uint32_t flag) &quot;%s: src/dst: %s/%s p: seq/ack=%u/%u  flags=0x%x&quot;
colo_filter_rewriter_conn_offset(uint32_t offset) &quot;: offset=%u&quot;
# See docs/devel/tracing.rst for syntax documentation.

# balloon.c
# Since requests are raised via monitor, not many tracepoints are needed.
balloon_event(void *opaque, unsigned long addr) &quot;opaque %p addr %lu&quot;

# ioport.c
cpu_in(unsigned int addr, char size, unsigned int val) &quot;addr 0x%x(%c) value %u&quot;
cpu_out(unsigned int addr, char size, unsigned int val) &quot;addr 0x%x(%c) value %u&quot;

# memory.c
memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) &quot;cpu %d mr %p addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64&quot; size %u name &#039;%s&#039;&quot;
memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) &quot;cpu %d mr %p addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64&quot; size %u name &#039;%s&#039;&quot;
memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) &quot;cpu %d mr %p offset 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64&quot; size %u&quot;
memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) &quot;cpu %d mr %p offset 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64&quot; size %u&quot;
memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) &quot;cpu %d mr %p addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64&quot; size %u&quot;
memory_region_ram_device_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) &quot;cpu %d mr %p addr 0x%&quot;PRIx64&quot; value 0x%&quot;PRIx64&quot; size %u&quot;
memory_region_sync_dirty(const char *mr, const char *listener, int global) &quot;mr &#039;%s&#039; listener &#039;%s&#039; synced (global=%d)&quot;
flatview_new(void *view, void *root) &quot;%p (root %p)&quot;
flatview_destroy(void *view, void *root) &quot;%p (root %p)&quot;
flatview_destroy_rcu(void *view, void *root) &quot;%p (root %p)&quot;
global_dirty_changed(unsigned int bitmask) &quot;bitmask 0x%&quot;PRIx32

# cpus.c
vm_stop_flush_all(int ret) &quot;ret %d&quot;

# vl.c
vm_state_notify(int running, int reason, const char *reason_str) &quot;running %d reason %d (%s)&quot;
load_file(const char *name, const char *path) &quot;name %s location %s&quot;
runstate_set(int current_state, const char *current_state_str, int new_state, const char *new_state_str) &quot;current_run_state %d (%s) new_state %d (%s)&quot;
system_wakeup_request(int reason) &quot;reason=%d&quot;
qemu_system_shutdown_request(int reason) &quot;reason=%d&quot;
qemu_system_powerdown_request(void) &quot;&quot;

#dirtylimit.c
dirtylimit_state_initialize(int max_cpus) &quot;dirtylimit state initialize: max cpus %d&quot;
dirtylimit_state_finalize(void)
dirtylimit_throttle_pct(int cpu_index, uint64_t pct, int64_t time_us) &quot;CPU[%d] throttle percent: %&quot; PRIu64 &quot;, throttle adjust time %&quot;PRIi64 &quot; us&quot;
dirtylimit_set_vcpu(int cpu_index, uint64_t quota) &quot;CPU[%d] set dirty page rate limit %&quot;PRIu64
dirtylimit_vcpu_execute(int cpu_index, int64_t sleep_time_us) &quot;CPU[%d] sleep %&quot;PRIi64 &quot; us&quot;
# See docs/devel/tracing.rst for syntax documentation.

# console.c
console_gfx_new(void) &quot;&quot;
console_gfx_reuse(int index) &quot;%d&quot;
console_gfx_close(int index) &quot;%d&quot;
console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) &quot;escape sequence CSI%d;%d%c, %d parameters&quot;
console_putchar_unhandled(int ch) &quot;unhandled escape character &#039;%c&#039;&quot;
console_txt_new(int w, int h) &quot;%dx%d&quot;
console_select(int nr) &quot;%d&quot;
console_refresh(int interval) &quot;interval %d ms&quot;
displaysurface_create(int w, int h) &quot;%dx%d&quot;
displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) &quot;surface=%p, %dx%d, format 0x%x&quot;
displaysurface_create_pixman(void *display_surface) &quot;surface=%p&quot;
displaysurface_free(void *display_surface) &quot;surface=%p&quot;
displaychangelistener_register(void *dcl, const char *name) &quot;%p [ %s ]&quot;
displaychangelistener_unregister(void *dcl, const char *name) &quot;%p [ %s ]&quot;
ppm_save(int fd, void *image) &quot;fd=%d image=%p&quot;

# gtk-egl.c
# gtk-gl-area.c
# gtk.c
gd_switch(const char *tab, int width, int height) &quot;tab=%s, width=%d, height=%d&quot;
gd_update(const char *tab, int x, int y, int w, int h) &quot;tab=%s, x=%d, y=%d, w=%d, h=%d&quot;
gd_key_event(const char *tab, int gdk_keycode, int qkeycode, const char *action) &quot;tab=%s, translated GDK keycode %d to QKeyCode %d (%s)&quot;
gd_grab(const char *tab, const char *device, const char *reason) &quot;tab=%s, dev=%s, reason=%s&quot;
gd_ungrab(const char *tab, const char *device) &quot;tab=%s, dev=%s&quot;
gd_keymap_windowing(const char *name) &quot;backend=%s&quot;
gd_gl_area_create_context(void *ctx, int major, int minor) &quot;ctx=%p, major=%d, minor=%d&quot;
gd_gl_area_destroy_context(void *ctx, void *current_ctx) &quot;ctx=%p, current_ctx=%p&quot;

# vnc-auth-sasl.c
# vnc-auth-vencrypt.c
# vnc-ws.c
# vnc.c
vnc_key_guest_leds(bool caps, bool num, bool scroll) &quot;caps %d, num %d, scroll %d&quot;
vnc_key_map_init(const char *layout) &quot;%s&quot;
vnc_key_event_ext(bool down, int sym, int keycode, const char *name) &quot;down %d, sym 0x%x, keycode 0x%x [%s]&quot;
vnc_key_event_map(bool down, int sym, int keycode, const char *name) &quot;down %d, sym 0x%x -&gt; keycode 0x%x [%s]&quot;
vnc_key_sync_numlock(bool on) &quot;%d&quot;
vnc_key_sync_capslock(bool on) &quot;%d&quot;
vnc_msg_server_audio_begin(void *state, void *ioc) &quot;VNC server msg audio begin state=%p ioc=%p&quot;
vnc_msg_server_audio_end(void *state, void *ioc) &quot;VNC server msg audio end state=%p ioc=%p&quot;
vnc_msg_server_audio_data(void *state, void *ioc, const void *buf, size_t len) &quot;VNC server msg audio data state=%p ioc=%p buf=%p len=%zd&quot;
vnc_msg_server_desktop_resize(void *state, void *ioc, int width, int height) &quot;VNC server msg ext resize state=%p ioc=%p size=%dx%d&quot;
vnc_msg_server_ext_desktop_resize(void *state, void *ioc, int width, int height, int reason) &quot;VNC server msg ext resize state=%p ioc=%p size=%dx%d reason=%d&quot;
vnc_msg_client_audio_enable(void *state, void *ioc) &quot;VNC client msg audio enable state=%p ioc=%p&quot;
vnc_msg_client_audio_disable(void *state, void *ioc) &quot;VNC client msg audio disable state=%p ioc=%p&quot;
vnc_msg_client_audio_format(void *state, void *ioc, int fmt, int channels, int freq) &quot;VNC client msg audio format state=%p ioc=%p fmt=%d channels=%d freq=%d&quot;
vnc_msg_client_set_desktop_size(void *state, void *ioc, int width, int height, int screens) &quot;VNC client msg set desktop size  state=%p ioc=%p size=%dx%d screens=%d&quot;
vnc_client_eof(void *state, void *ioc) &quot;VNC client EOF state=%p ioc=%p&quot;
vnc_client_io_error(void *state, void *ioc, const char *msg) &quot;VNC client I/O error state=%p ioc=%p errmsg=%s&quot;
vnc_client_connect(void *state, void *ioc) &quot;VNC client connect state=%p ioc=%p&quot;
vnc_client_disconnect_start(void *state, void *ioc) &quot;VNC client disconnect start state=%p ioc=%p&quot;
vnc_client_disconnect_finish(void *state, void *ioc) &quot;VNC client disconnect finish state=%p ioc=%p&quot;
vnc_client_io_wrap(void *state, void *ioc, const char *type) &quot;VNC client I/O wrap state=%p ioc=%p type=%s&quot;
vnc_client_throttle_threshold(void *state, void *ioc, size_t oldoffset, size_t offset, int client_width, int client_height, int bytes_per_pixel, void *audio_cap) &quot;VNC client throttle threshold state=%p ioc=%p oldoffset=%zu newoffset=%zu width=%d height=%d bpp=%d audio=%p&quot;
vnc_client_throttle_incremental(void *state, void *ioc, int job_update, size_t offset) &quot;VNC client throttle incremental state=%p ioc=%p job-update=%d offset=%zu&quot;
vnc_client_throttle_forced(void *state, void *ioc, int job_update, size_t offset) &quot;VNC client throttle forced state=%p ioc=%p job-update=%d offset=%zu&quot;
vnc_client_throttle_audio(void *state, void *ioc, size_t offset) &quot;VNC client throttle audio state=%p ioc=%p offset=%zu&quot;
vnc_client_unthrottle_forced(void *state, void *ioc) &quot;VNC client unthrottle forced offset state=%p ioc=%p&quot;
vnc_client_unthrottle_incremental(void *state, void *ioc, size_t offset) &quot;VNC client unthrottle incremental state=%p ioc=%p offset=%zu&quot;
vnc_client_output_limit(void *state, void *ioc, size_t offset, size_t threshold) &quot;VNC client output limit state=%p ioc=%p offset=%zu threshold=%zu&quot;
vnc_server_dpy_pageflip(void *dpy, int w, int h, int fmt) &quot;VNC server dpy pageflip dpy=%p size=%dx%d fmt=%d&quot;
vnc_server_dpy_recreate(void *dpy, int w, int h, int fmt) &quot;VNC server dpy recreate dpy=%p size=%dx%d fmt=%d&quot;
vnc_job_add_rect(void *state, void *job, int x, int y, int w, int h) &quot;VNC add rect state=%p job=%p offset=%d,%d size=%dx%d&quot;
vnc_job_discard_rect(void *state, void *job, int x, int y, int w, int h) &quot;VNC job discard rect state=%p job=%p offset=%d,%d size=%dx%d&quot;
vnc_job_clamp_rect(void *state, void *job, int x, int y, int w, int h) &quot;VNC job clamp rect state=%p job=%p offset=%d,%d size=%dx%d&quot;
vnc_job_clamped_rect(void *state, void *job, int x, int y, int w, int h) &quot;VNC job clamp rect state=%p job=%p offset=%d,%d size=%dx%d&quot;
vnc_job_nrects(void *state, void *job, int nrects) &quot;VNC job state=%p job=%p nrects=%d&quot;
vnc_auth_init(void *display, int websock, int auth, int subauth) &quot;VNC auth init state=%p websock=%d auth=%d subauth=%d&quot;
vnc_auth_start(void *state, int method) &quot;VNC client auth start state=%p method=%d&quot;
vnc_auth_pass(void *state, int method) &quot;VNC client auth passed state=%p method=%d&quot;
vnc_auth_fail(void *state, int method, const char *message, const char *reason) &quot;VNC client auth failed state=%p method=%d message=%s reason=%s&quot;
vnc_auth_reject(void *state, int expect, int got) &quot;VNC client auth rejected state=%p method expected=%d got=%d&quot;
vnc_auth_vencrypt_version(void *state, int major, int minor) &quot;VNC client auth vencrypt version state=%p major=%d minor=%d&quot;
vnc_auth_vencrypt_subauth(void *state, int auth) &quot;VNC client auth vencrypt subauth state=%p auth=%d&quot;
vnc_auth_sasl_mech_list(void *state, const char *mechs) &quot;VNC client auth SASL state=%p mechlist=%s&quot;
vnc_auth_sasl_mech_choose(void *state, const char *mech) &quot;VNC client auth SASL state=%p mech=%s&quot;
vnc_auth_sasl_start(void *state, const void *clientdata, size_t clientlen, const void *serverdata, size_t severlen, int ret) &quot;VNC client auth SASL start state=%p clientdata=%p clientlen=%zu serverdata=%p serverlen=%zu ret=%d&quot;
vnc_auth_sasl_step(void *state, const void *clientdata, size_t clientlen, const void *serverdata, size_t severlen, int ret) &quot;VNC client auth SASL step state=%p clientdata=%p clientlen=%zu serverdata=%p serverlen=%zu ret=%d&quot;
vnc_auth_sasl_ssf(void *state, int ssf) &quot;VNC client auth SASL SSF state=%p size=%d&quot;
vnc_auth_sasl_username(void *state, const char *name) &quot;VNC client auth SASL user state=%p name=%s&quot;
vnc_auth_sasl_acl(void *state, int allow) &quot;VNC client auth SASL ACL state=%p allow=%d&quot;


# input.c
input_event_key_number(int conidx, int number, const char *qcode, bool down) &quot;con %d, key number 0x%x [%s], down %d&quot;
input_event_key_qcode(int conidx, const char *qcode, bool down) &quot;con %d, key qcode %s, down %d&quot;
input_event_btn(int conidx, const char *btn, bool down) &quot;con %d, button %s, down %d&quot;
input_event_rel(int conidx, const char *axis, int value) &quot;con %d, axis %s, value %d&quot;
input_event_abs(int conidx, const char *axis, int value) &quot;con %d, axis %s, value 0x%x&quot;
input_event_mtt(int conidx, const char *axis, int value) &quot;con %d, axis %s, value 0x%x&quot;
input_event_sync(void) &quot;&quot;

# sdl2-input.c
sdl2_process_key(int sdl_scancode, int qcode, const char *action) &quot;translated SDL scancode %d to QKeyCode %d (%s)&quot;

# spice-display.c
qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) &quot;%d %u: host virt 0x%lx - 0x%lx async=%d&quot;
qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) &quot;%d gid=%u sid=%u&quot;
qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) &quot;%d sid=%u surface=%p async=%d&quot;
qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) &quot;%d sid=%u async=%d&quot;
qemu_spice_wakeup(uint32_t qid) &quot;%d&quot;
qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) &quot;lr %d -&gt; %d,  tb -&gt; %d -&gt; %d&quot;
qemu_spice_display_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) &quot;%d +%d+%d %dx%d&quot;
qemu_spice_display_surface(int qid, uint32_t w, uint32_t h, int fast) &quot;%d %dx%d, fast %d&quot;
qemu_spice_display_refresh(int qid, int notify) &quot;%d notify %d&quot;
qemu_spice_ui_info(int qid, uint32_t width, uint32_t height) &quot;%d %dx%d&quot;

qemu_spice_gl_surface(int qid, uint32_t w, uint32_t h, uint32_t fourcc) &quot;%d %dx%d, fourcc 0x%x&quot;
qemu_spice_gl_scanout_disable(int qid) &quot;%d&quot;
qemu_spice_gl_scanout_texture(int qid, uint32_t w, uint32_t h, uint32_t fourcc) &quot;%d %dx%d, fourcc 0x%x&quot;
qemu_spice_gl_cursor(int qid, bool enabled, bool hotspot) &quot;%d enabled %d, hotspot %d&quot;
qemu_spice_gl_forward_dmabuf(int qid, uint32_t width, uint32_t height) &quot;%d %dx%d&quot;
qemu_spice_gl_render_dmabuf(int qid, uint32_t width, uint32_t height) &quot;%d %dx%d&quot;
qemu_spice_gl_update(int qid, uint32_t x, uint32_t y, uint32_t w, uint32_t h) &quot;%d +%d+%d %dx%d&quot;

# keymaps.c
keymap_parse(const char *file) &quot;file %s&quot;
keymap_add(int sym, int code, const char *line) &quot;sym=0x%04x code=0x%04x (line: %s)&quot;
keymap_unmapped(int sym) &quot;sym=0x%04x&quot;

# x_keymap.c
xkeymap_extension(const char *name) &quot;extension &#039;%s&#039;&quot;
xkeymap_vendor(const char *name) &quot;vendor &#039;%s&#039;&quot;
xkeymap_keycodes(const char *name) &quot;keycodes &#039;%s&#039;&quot;
xkeymap_keymap(const char *name) &quot;keymap &#039;%s&#039;&quot;

# clipboard.c
clipboard_check_serial(int cur, int recv, bool ok) &quot;cur:%d recv:%d %d&quot;

# vdagent.c
vdagent_open(void) &quot;&quot;
vdagent_close(void) &quot;&quot;
vdagent_disconnect(void) &quot;&quot;
vdagent_send(const char *name) &quot;msg %s&quot;
vdagent_send_empty_clipboard(void) &quot;&quot;
vdagent_recv_chunk(uint32_t size) &quot;size %d&quot;
vdagent_recv_msg(const char *name, uint32_t size) &quot;msg %s, size %d&quot;
vdagent_peer_cap(const char *name) &quot;cap %s&quot;
vdagent_cb_grab_selection(const char *name) &quot;selection %s&quot;
vdagent_cb_grab_discard(const char *name, int cur, int recv) &quot;selection %s, cur:%d recv:%d&quot;
vdagent_cb_grab_type(const char *name) &quot;type %s&quot;
vdagent_cb_serial_discard(uint32_t current, uint32_t received) &quot;current=%u, received=%u&quot;

# dbus.c
dbus_registered_listener(const char *bus_name) &quot;peer %s&quot;
dbus_listener_vanished(const char *bus_name) &quot;peer %s&quot;
dbus_kbd_press(unsigned int keycode) &quot;keycode %u&quot;
dbus_kbd_release(unsigned int keycode) &quot;keycode %u&quot;
dbus_mouse_press(unsigned int button) &quot;button %u&quot;
dbus_mouse_release(unsigned int button) &quot;button %u&quot;
dbus_mouse_set_pos(unsigned int x, unsigned int y) &quot;x=%u, y=%u&quot;
dbus_mouse_rel_motion(int dx, int dy) &quot;dx=%d, dy=%d&quot;
dbus_touch_send_event(unsigned int kind, uint32_t num_slot, uint32_t x, uint32_t y) &quot;kind=%u, num_slot=%u, x=%d, y=%d&quot;
dbus_update(int x, int y, int w, int h) &quot;x=%d, y=%d, w=%d, h=%d&quot;
dbus_update_gl(int x, int y, int w, int h) &quot;x=%d, y=%d, w=%d, h=%d&quot;
dbus_clipboard_grab_failed(void) &quot;&quot;
dbus_clipboard_register(const char *bus_name) &quot;peer %s&quot;
dbus_clipboard_unregister(const char *bus_name) &quot;peer %s&quot;
dbus_scanout_texture(uint32_t tex_id, bool backing_y_0_top, uint32_t backing_width, uint32_t backing_height, uint32_t x, uint32_t y, uint32_t w, uint32_t h) &quot;tex_id:%u y0top:%d back:%ux%u %u+%u-%ux%u&quot;
dbus_gl_gfx_switch(void *p) &quot;surf: %p&quot;

# egl-helpers.c
egl_init_d3d11_device(void *p) &quot;d3d device: %p&quot;
# multi-process trace events

mpqemu_send_io_error(int cmd, int size, int nfds) &quot;send command %d size %d, %d file descriptors to remote process&quot;
mpqemu_recv_io_error(int cmd, int size, int nfds) &quot;failed to receive %d size %d, %d file descriptors to remote process&quot;

# vfio-user-obj.c
vfu_prop(const char *prop, const char *val) &quot;vfu: setting %s as %s&quot;
vfu_cfg_read(uint32_t offset, uint32_t val) &quot;vfu: cfg: 0x%x -&gt; 0x%x&quot;
vfu_cfg_write(uint32_t offset, uint32_t val) &quot;vfu: cfg: 0x%x &lt;- 0x%x&quot;
vfu_dma_register(uint64_t gpa, size_t len) &quot;vfu: registering GPA 0x%&quot;PRIx64&quot;, %zu bytes&quot;
vfu_dma_unregister(uint64_t gpa) &quot;vfu: unregistering GPA 0x%&quot;PRIx64&quot;&quot;
vfu_bar_register(int i, uint64_t addr, uint64_t size) &quot;vfu: BAR %d: addr 0x%&quot;PRIx64&quot; size 0x%&quot;PRIx64&quot;&quot;
vfu_bar_rw_enter(const char *op, uint64_t addr) &quot;vfu: %s request for BAR address 0x%&quot;PRIx64&quot;&quot;
vfu_bar_rw_exit(const char *op, uint64_t addr) &quot;vfu: Finished %s of BAR address 0x%&quot;PRIx64&quot;&quot;
vfu_interrupt(int pirq) &quot;vfu: sending interrupt to device - PIRQ %d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# TCG related tracing
# cpu-exec.c
exec_tb(void *tb, uintptr_t pc) &quot;tb:%p pc=0x%&quot;PRIxPTR
exec_tb_nocache(void *tb, uintptr_t pc) &quot;tb:%p pc=0x%&quot;PRIxPTR
exec_tb_exit(void *last_tb, unsigned int flags) &quot;tb:%p flags=0x%x&quot;

# cputlb.c
memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) &quot;0x%&quot; PRIx64 &quot; ram_addr 0x%&quot; PRIx64 &quot; size %u&quot;
memory_notdirty_set_dirty(uint64_t vaddr) &quot;0x%&quot; PRIx64

# translate-all.c
translate_block(void *tb, uintptr_t pc, const void *tb_code) &quot;tb:%p, pc:0x%&quot;PRIxPTR&quot;, tb_code:%p&quot;
# loader.c
loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom) &quot;%s: @0x%&quot;PRIx64&quot; size=0x%&quot;PRIx64&quot; ROM=%d&quot;

# qdev.c
qdev_update_parent_bus(void *obj, const char *objtype, void *oldp, const char *oldptype, void *newp, const char *newptype) &quot;obj=%p(%s) old_parent=%p(%s) new_parent=%p(%s)&quot;

# resettable.c
resettable_reset(void *obj, int cold) &quot;obj=%p cold=%d&quot;
resettable_reset_assert_begin(void *obj, int cold) &quot;obj=%p cold=%d&quot;
resettable_reset_assert_end(void *obj) &quot;obj=%p&quot;
resettable_reset_release_begin(void *obj, int cold) &quot;obj=%p cold=%d&quot;
resettable_reset_release_end(void *obj) &quot;obj=%p&quot;
resettable_change_parent(void *obj, void *o, unsigned oc, void *n, unsigned nc) &quot;obj=%p from=%p(%d) to=%p(%d)&quot;
resettable_phase_enter_begin(void *obj, const char *objtype, unsigned count, int type) &quot;obj=%p(%s) count=%d type=%d&quot;
resettable_phase_enter_exec(void *obj, const char *objtype, int type, int has_method) &quot;obj=%p(%s) type=%d method=%d&quot;
resettable_phase_enter_end(void *obj, const char *objtype, unsigned count) &quot;obj=%p(%s) count=%d&quot;
resettable_phase_hold_begin(void *obj, const char *objtype, unsigned count, int type) &quot;obj=%p(%s) count=%d type=%d&quot;
resettable_phase_hold_exec(void *obj, const char *objtype, int has_method) &quot;obj=%p(%s) method=%d&quot;
resettable_phase_hold_end(void *obj, const char *objtype, unsigned count) &quot;obj=%p(%s) count=%d&quot;
resettable_phase_exit_begin(void *obj, const char *objtype, unsigned count, int type) &quot;obj=%p(%s) count=%d type=%d&quot;
resettable_phase_exit_exec(void *obj, const char *objtype, int has_method) &quot;obj=%p(%s) method=%d&quot;
resettable_phase_exit_end(void *obj, const char *objtype, unsigned count) &quot;obj=%p(%s) count=%d&quot;
resettable_transitional_function(void *obj, const char *objtype) &quot;obj=%p(%s)&quot;

# clock.c
clock_set_source(const char *clk, const char *src) &quot;&#039;%s&#039;, src=&#039;%s&#039;&quot;
clock_disconnect(const char *clk) &quot;&#039;%s&#039;&quot;
clock_set(const char *clk, uint64_t old, uint64_t new) &quot;&#039;%s&#039;, %&quot;PRIu64&quot;Hz-&gt;%&quot;PRIu64&quot;Hz&quot;
clock_propagate(const char *clk) &quot;&#039;%s&#039;&quot;
clock_update(const char *clk, const char *src, uint64_t hz, int cb) &quot;&#039;%s&#039;, src=&#039;%s&#039;, val=%&quot;PRIu64&quot;Hz cb=%d&quot;
clock_set_mul_div(const char *clk, uint32_t oldmul, uint32_t mul, uint32_t olddiv, uint32_t div) &quot;&#039;%s&#039;, mul: %u -&gt; %u, div: %u -&gt; %u&quot;

# cpu-common.c
cpu_reset(int cpu_index) &quot;%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# helper.c
arm_gt_recalc(int timer, uint64_t nexttick) &quot;gt recalc: timer %d next tick 0x%&quot; PRIx64
arm_gt_recalc_disabled(int timer) &quot;gt recalc: timer %d timer disabled&quot;
arm_gt_cval_write(int timer, uint64_t value) &quot;gt_cval_write: timer %d value 0x%&quot; PRIx64
arm_gt_tval_write(int timer, uint64_t value) &quot;gt_tval_write: timer %d value 0x%&quot; PRIx64
arm_gt_ctl_write(int timer, uint64_t value) &quot;gt_ctl_write: timer %d value 0x%&quot; PRIx64
arm_gt_imask_toggle(int timer) &quot;gt_ctl_write: timer %d IMASK toggle&quot;
arm_gt_cntvoff_write(uint64_t value) &quot;gt_cntvoff_write: value 0x%&quot; PRIx64
arm_gt_update_irq(int timer, int irqstate) &quot;gt_update_irq: timer %d irqstate %d&quot;

# kvm.c
kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) &quot;MSI iova = 0x%&quot;PRIx64&quot; is translated into 0x%&quot;PRIx64
hvf_unhandled_sysreg_read(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) &quot;unhandled sysreg read at pc=0x%&quot;PRIx64&quot;: 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d)&quot;
hvf_unhandled_sysreg_write(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) &quot;unhandled sysreg write at pc=0x%&quot;PRIx64&quot;: 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d)&quot;
hvf_inject_fiq(void) &quot;injecting FIQ&quot;
hvf_inject_irq(void) &quot;injecting IRQ&quot;
hvf_data_abort(uint64_t pc, uint64_t va, uint64_t pa, bool isv, bool iswrite, bool s1ptw, uint32_t len, uint32_t srt) &quot;data abort: [pc=0x%&quot;PRIx64&quot; va=0x%016&quot;PRIx64&quot; pa=0x%016&quot;PRIx64&quot; isv=%d iswrite=%d s1ptw=%d len=%d srt=%d]&quot;
hvf_sysreg_read(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) &quot;sysreg read 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d) = 0x%016&quot;PRIx64
hvf_sysreg_write(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) &quot;sysreg write 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d, val=0x%016&quot;PRIx64&quot;)&quot;
hvf_unknown_hvc(uint64_t x0) &quot;unknown HVC! 0x%016&quot;PRIx64
hvf_unknown_smc(uint64_t x0) &quot;unknown SMC! 0x%016&quot;PRIx64
hvf_exit(uint64_t syndrome, uint32_t ec, uint64_t pc) &quot;exit: 0x%&quot;PRIx64&quot; [ec=0x%x pc=0x%&quot;PRIx64&quot;]&quot;
hvf_psci_call(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, uint32_t cpuid) &quot;PSCI Call x0=0x%016&quot;PRIx64&quot; x1=0x%016&quot;PRIx64&quot; x2=0x%016&quot;PRIx64&quot; x3=0x%016&quot;PRIx64&quot; cpu=0x%x&quot;
hvf_vgic_write(const char *name, uint64_t val) &quot;vgic write to %s [val=0x%016&quot;PRIx64&quot;]&quot;
hvf_vgic_read(const char *name, uint64_t val) &quot;vgic read from %s [val=0x%016&quot;PRIx64&quot;]&quot;
# See docs/devel/tracing.rst for syntax documentation.

# mem_helper.c
disable hppa_tlb_flush_ent(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) &quot;env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx&quot;
disable hppa_tlb_find_entry(void *env, void *ent, int valid, uint64_t va_b, uint64_t va_e, uint64_t pa) &quot;env=%p ent=%p valid=%d va_b=0x%lx va_e=0x%lx pa=0x%lx&quot;
disable hppa_tlb_find_entry_not_found(void *env, uint64_t addr) &quot;env=%p addr=%08lx&quot;
disable hppa_tlb_get_physical_address(void *env, int ret, int prot, uint64_t addr, uint64_t phys) &quot;env=%p ret=%d prot=%d addr=0x%lx phys=0x%lx&quot;
disable hppa_tlb_fill_excp(void *env, uint64_t addr, int size, int type, int mmu_idx) &quot;env=%p addr=0x%lx size=%d type=%d mmu_idx=%d&quot;
disable hppa_tlb_fill_success(void *env, uint64_t addr, uint64_t phys, int size, int type, int mmu_idx) &quot;env=%p addr=0x%lx phys=0x%lx size=%d type=%d mmu_idx=%d&quot;
disable hppa_tlb_itlba(void *env, void *ent, uint64_t va_b, uint64_t va_e, uint64_t pa) &quot;env=%p ent=%p va_b=0x%lx va_e=0x%lx pa=0x%lx&quot;
disable hppa_tlb_itlbp(void *env, void *ent, int access_id, int u, int pl2, int pl1, int type, int b, int d, int t) &quot;env=%p ent=%p access_id=%x u=%d pl2=%d pl1=%d type=%d b=%d d=%d t=%d&quot;
disable hppa_tlb_ptlb(void *env) &quot;env=%p&quot;
disable hppa_tlb_ptlb_local(void *env) &quot;env=%p&quot;
disable hppa_tlb_ptlbe(void *env) &quot;env=%p&quot;
disable hppa_tlb_lpa_success(void *env, uint64_t addr, uint64_t phys) &quot;env=%p addr=0x%lx phys=0x%lx&quot;
disable hppa_tlb_lpa_failed(void *env, uint64_t addr) &quot;env=%p addr=0x%lx&quot;

# op_helper.c
disable hppa_tlb_probe(uint64_t addr, int level, int want) &quot;addr=0x%lx level=%d want=%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# sev.c
kvm_sev_init(void) &quot;&quot;
kvm_memcrypt_register_region(void *addr, size_t len) &quot;addr %p len 0x%zx&quot;
kvm_memcrypt_unregister_region(void *addr, size_t len) &quot;addr %p len 0x%zx&quot;
kvm_sev_change_state(const char *old, const char *new) &quot;%s -&gt; %s&quot;
kvm_sev_launch_start(int policy, void *session, void *pdh) &quot;policy 0x%x session %p pdh %p&quot;
kvm_sev_launch_update_data(void *addr, uint64_t len) &quot;addr %p len 0x%&quot; PRIx64
kvm_sev_launch_measurement(const char *value) &quot;data %s&quot;
kvm_sev_launch_finish(void) &quot;&quot;
kvm_sev_launch_secret(uint64_t hpa, uint64_t hva, uint64_t secret, int len) &quot;hpa 0x%&quot; PRIx64 &quot; hva 0x%&quot; PRIx64 &quot; data 0x%&quot; PRIx64 &quot; len %d&quot;
kvm_sev_attestation_report(const char *mnonce, const char *data) &quot;mnonce %s data %s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# kvm.c
kvm_x86_fixup_msi_error(uint32_t gsi) &quot;VT-d failed to remap interrupt for GSI %&quot; PRIu32
kvm_x86_add_msi_route(int virq) &quot;Adding route entry for virq %d&quot;
kvm_x86_remove_msi_route(int virq) &quot;Removing route entry for virq %d&quot;
kvm_x86_update_msi_routes(int num) &quot;Updated %d MSI routes&quot;

# xen-emu.c
kvm_xen_hypercall(int cpu, uint8_t cpl, uint64_t input, uint64_t a0, uint64_t a1, uint64_t a2, uint64_t ret) &quot;xen_hypercall: cpu %d cpl %d input %&quot; PRIu64 &quot; a0 0x%&quot; PRIx64 &quot; a1 0x%&quot; PRIx64 &quot; a2 0x%&quot; PRIx64&quot; ret 0x%&quot; PRIx64
kvm_xen_soft_reset(void) &quot;&quot;
kvm_xen_set_shared_info(uint64_t gfn) &quot;shared info at gfn 0x%&quot; PRIx64
kvm_xen_set_vcpu_attr(int cpu, int type, uint64_t gpa) &quot;vcpu attr cpu %d type %d gpa 0x%&quot; PRIx64
kvm_xen_set_vcpu_callback(int cpu, int vector) &quot;callback vcpu %d vector %d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# translate.c
mips_translate_c0(const char *instr, const char *rn, int reg, int sel) &quot;%s %s (reg %d sel %d)&quot;
mips_translate_tr(const char *instr, int rt, int u, int sel, int h) &quot;%s (reg %d u %d sel %d h %d)&quot;
# mmu.c
nios2_mmu_translate_miss(uint32_t vaddr, uint32_t pid, uint32_t index, uint32_t tag) &quot;mmu_translate: MISS vaddr=0x%08x pid=%u TLB[%u] tag=0x%08x&quot;
nios2_mmu_translate_hit(uint32_t vaddr, uint32_t pid, uint32_t index, uint32_t paddr, uint32_t prot) &quot;mmu_translate: HIT vaddr=0x%08x pid=%u TLB[%u] paddr=0x%08x prot=0x%x&quot;

nios2_mmu_flush_pid_miss(uint32_t pid, uint32_t index, uint32_t vaddr) &quot;mmu_flush: MISS pid=%u TLB[%u] tag=0x%08x&quot;
nios2_mmu_flush_pid_hit(uint32_t pid, uint32_t index, uint32_t vaddr) &quot;mmu_flush: HIT pid=%u TLB[%u] vaddr=0x%08x&quot;

nios2_mmu_write_tlbacc(uint32_t ig, char c, char r, char w, char x, char g, uint32_t pfn) &quot;mmu_write_tlbacc: ig=0x%02x flags=%c%c%c%c%c pfn=0x%08x&quot;
nios2_mmu_write_tlbmisc(uint32_t way, char r, char w, char t, char b, char p, char d, uint32_t pid) &quot;mmu_write_tlbmisc: way=0x%x flags=%c%c%c%c%c%c pid=%u&quot;
nios2_mmu_write_pteaddr(uint32_t ptb, uint32_t vpn) &quot;mmu_write_pteaddr: ptbase=0x%03x vpn=0x%05x&quot;
# See docs/devel/tracing.rst for syntax documentation.

# kvm.c
kvm_failed_spr_set(int spr, const char *msg) &quot;Warning: Unable to set SPR %d to KVM: %s&quot;
kvm_failed_spr_get(int spr, const char *msg) &quot;Warning: Unable to retrieve SPR %d from KVM: %s&quot;
kvm_failed_fpscr_set(const char *msg) &quot;Unable to set FPSCR to KVM: %s&quot;
kvm_failed_fp_set(const char *fpname, int fpnum, const char *msg) &quot;Unable to set %s%d to KVM: %s&quot;
kvm_failed_vscr_set(const char *msg) &quot;Unable to set VSCR to KVM: %s&quot;
kvm_failed_vr_set(int vr, const char *msg) &quot;Unable to set VR%d to KVM: %s&quot;
kvm_failed_fpscr_get(const char *msg) &quot;Unable to get FPSCR from KVM: %s&quot;
kvm_failed_fp_get(const char *fpname, int fpnum, const char *msg) &quot;Unable to get %s%d from KVM: %s&quot;
kvm_failed_vscr_get(const char *msg) &quot;Unable to get VSCR from KVM: %s&quot;
kvm_failed_vr_get(int vr, const char *msg) &quot;Unable to get VR%d from KVM: %s&quot;
kvm_failed_vpa_addr_get(const char *msg) &quot;Unable to get VPA address from KVM: %s&quot;
kvm_failed_slb_get(const char *msg) &quot;Unable to get SLB shadow state from KVM: %s&quot;
kvm_failed_dtl_get(const char *msg) &quot;Unable to get dispatch trace log state from KVM: %s&quot;
kvm_failed_vpa_addr_set(const char *msg) &quot;Unable to set VPA address to KVM: %s&quot;
kvm_failed_slb_set(const char *msg) &quot;Unable to set SLB shadow state to KVM: %s&quot;
kvm_failed_dtl_set(const char *msg) &quot;Unable to set dispatch trace log state to KVM: %s&quot;
kvm_failed_null_vpa_addr_set(const char *msg) &quot;Unable to set VPA address to KVM: %s&quot;
kvm_failed_put_vpa(void) &quot;Warning: Unable to set VPA information to KVM&quot;
kvm_failed_get_vpa(void) &quot;Warning: Unable to get VPA information from KVM&quot;
kvm_handle_dcr_write(void) &quot;handle dcr write&quot;
kvm_handle_dcr_read(void) &quot;handle dcr read&quot;
kvm_handle_halt(void) &quot;handle halt&quot;
kvm_handle_papr_hcall(uint64_t hcall) &quot;0x%&quot; PRIx64
kvm_handle_epr(void) &quot;handle epr&quot;
kvm_handle_watchdog_expiry(void) &quot;handle watchdog expiry&quot;
kvm_handle_debug_exception(void) &quot;handle debug exception&quot;
kvm_handle_nmi_exception(void) &quot;handle NMI exception&quot;

# excp_helper.c
ppc_excp_rfi(uint64_t nip, uint64_t msr) &quot;Return from exception at 0x%&quot; PRIx64 &quot; with flags 0x%016&quot; PRIx64
ppc_excp_dsi(uint64_t dsisr, uint64_t dar) &quot;DSI exception: DSISR=0x%&quot; PRIx64 &quot; DAR=0x%&quot; PRIx64
ppc_excp_isi(uint64_t msr, uint64_t nip) &quot;ISI exception: msr=0x%016&quot; PRIx64 &quot; nip=0x%&quot; PRIx64
ppc_excp_fp_ignore(void) &quot;Ignore floating point exception&quot;
ppc_excp_inval(uint64_t nip) &quot;Invalid instruction at 0x%&quot; PRIx64
ppc_excp_print(const char *excp) &quot;%s exception&quot;
# cpu_helper.c
riscv_trap(uint64_t hartid, bool async, uint64_t cause, uint64_t epc, uint64_t tval, const char *desc) &quot;hart:%&quot;PRId64&quot;, async:%d, cause:%&quot;PRId64&quot;, epc:0x%&quot;PRIx64&quot;, tval:0x%&quot;PRIx64&quot;, desc=%s&quot;

# pmp.c
pmpcfg_csr_read(uint64_t mhartid, uint32_t reg_index, uint64_t val) &quot;hart %&quot; PRIu64 &quot;: read reg%&quot; PRIu32&quot;, val: 0x%&quot; PRIx64
pmpcfg_csr_write(uint64_t mhartid, uint32_t reg_index, uint64_t val) &quot;hart %&quot; PRIu64 &quot;: write reg%&quot; PRIu32&quot;, val: 0x%&quot; PRIx64
pmpaddr_csr_read(uint64_t mhartid, uint32_t addr_index, uint64_t val) &quot;hart %&quot; PRIu64 &quot;: read addr%&quot; PRIu32&quot;, val: 0x%&quot; PRIx64
pmpaddr_csr_write(uint64_t mhartid, uint32_t addr_index, uint64_t val) &quot;hart %&quot; PRIu64 &quot;: write addr%&quot; PRIu32&quot;, val: 0x%&quot; PRIx64

mseccfg_csr_read(uint64_t mhartid, uint64_t val) &quot;hart %&quot; PRIu64 &quot;: read mseccfg, val: 0x%&quot; PRIx64
mseccfg_csr_write(uint64_t mhartid, uint64_t val) &quot;hart %&quot; PRIu64 &quot;: write mseccfg, val: 0x%&quot; PRIx64
# See docs/devel/tracing.rst for syntax documentation.

# mmu_helper.c
get_skeys_nonzero(int rc) &quot;SKEY: Call to get_skeys unexpectedly returned %d&quot;
set_skeys_nonzero(int rc) &quot;SKEY: Call to set_skeys unexpectedly returned %d&quot;

# ioinst.c
ioinst(const char *insn) &quot;IOINST: %s&quot;
ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) &quot;IOINST: %s (%x.%x.%04x)&quot;
ioinst_chp_id(const char *insn, int cssid, int chpid) &quot;IOINST: %s (%x.%02x)&quot;
ioinst_chsc_cmd(uint16_t cmd, uint16_t len) &quot;IOINST: chsc command 0x%04x, len 0x%04x&quot;

# cpu-sysemu.c
cpu_set_state(int cpu_index, uint8_t state) &quot;setting cpu %d state to %&quot; PRIu8
cpu_halt(int cpu_index) &quot;halting cpu %d&quot;
cpu_unhalt(int cpu_index) &quot;unhalting cpu %d&quot;

# sigp.c
sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) &quot;SIGP: Finished order %u on cpu %d -&gt; cpu %d with cc=%d&quot;
# See docs/devel/tracing.rst for syntax documentation.

# kvm.c
kvm_enable_cmma(int rc) &quot;CMMA: enabling with result code %d&quot;
kvm_clear_cmma(int rc) &quot;CMMA: clearing with result code %d&quot;
kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) &quot;Warning: Unable to set cpu %d state %&quot; PRIu8 &quot; to KVM: %s&quot;
kvm_assign_subch_ioeventfd(int fd, uint32_t addr, bool assign, int datamatch) &quot;fd: %d sch: @0x%x assign: %d vq: %d&quot;

kvm_sw_breakpoint(uint32_t n) &quot;KVM: will use %d-byte sw breakpoints&quot;
kvm_insn_unhandled_priv(uint32_t x) &quot;KVM: unhandled PRIV: 0x%x&quot;
kvm_insn_diag(uint32_t x) &quot;KVM: unknown DIAG: 0x%x&quot;
kvm_insn(uint32_t ipa, uint32_t ipb) &quot;handle_instruction 0x%x 0x%x&quot;
kvm_intercept(uint32_t icpt_code, uint64_t psw_addr) &quot;intercept: 0x%x (at 0x%&quot;PRIx64&quot;lx)&quot;
kvm_msi_route_fixup(const char* msg) &quot;%s&quot;
# See docs/devel/tracing.rst for syntax documentation.

# mmu_helper.c
mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) &quot;DFAULT at 0x%&quot;PRIx64&quot; context 0x%&quot;PRIx64&quot; mmu_idx=%d tl=%d&quot;
mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) &quot;DPROT at 0x%&quot;PRIx64&quot; context 0x%&quot;PRIx64&quot; mmu_idx=%d tl=%d&quot;
mmu_helper_dmiss(uint64_t address, uint64_t context) &quot;DMISS at 0x%&quot;PRIx64&quot; context 0x%&quot;PRIx64
mmu_helper_tfault(uint64_t address, uint64_t context) &quot;TFAULT at 0x%&quot;PRIx64&quot; context 0x%&quot;PRIx64
mmu_helper_tmiss(uint64_t address, uint64_t context) &quot;TMISS at 0x%&quot;PRIx64&quot; context 0x%&quot;PRIx64
mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) &quot;tl=%d mmu_idx=%d primary context=0x%&quot;PRIx64&quot; secondary context=0x%&quot;PRIx64&quot; address=0x%&quot;PRIx64
mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) &quot;tl=%d mmu_idx=%d primary context=0x%&quot;PRIx64&quot; secondary context=0x%&quot;PRIx64&quot; address=0x%&quot;PRIx64
mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) &quot;Translate at 0x%&quot;PRIx64&quot; -&gt; 0x%&quot;PRIx64&quot;, mmu_idx=%d tl=%d primary context=0x%&quot;PRIx64&quot; secondary context=0x%&quot;PRIx64

# int32_helper.c
sun4m_cpu_interrupt(unsigned int level) &quot;Set CPU IRQ %d&quot;
sun4m_cpu_reset_interrupt(unsigned int level) &quot;Reset CPU IRQ %d&quot;

# int64_helper.c
int_helper_set_softint(uint32_t softint) &quot;new 0x%08x&quot;
int_helper_clear_softint(uint32_t softint) &quot;new 0x%08x&quot;
int_helper_write_softint(uint32_t softint) &quot;new 0x%08x&quot;
sparc64_cpu_check_irqs_reset_irq(int intno) &quot;Reset CPU IRQ (current interrupt 0x%x)&quot;
sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) &quot;Not setting CPU IRQ: TL=%d current 0x%x &gt;= pending 0x%x&quot;
sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) &quot;Set CPU IRQ %d old=0x%x new=0x%x&quot;
sparc64_cpu_check_irqs_disabled(uint32_t pil, uint32_t pil_in, uint32_t softint, int intno) &quot;Interrupts disabled, pil=0x%08x pil_in=0x%08x softint=0x%08x current interrupt 0x%x&quot;

# win_helper.c
win_helper_gregset_error(uint32_t pstate) &quot;ERROR in get_gregset: active pstate bits=0x%x&quot;
win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) &quot;change_pstate: switching regs old=0x%x new=0x%x&quot;
win_helper_no_switch_pstate(uint32_t new_pstate_regs) &quot;change_pstate: regs new=0x%x (unchanged)&quot;
win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) &quot;old=0x%x new=0x%x&quot;
win_helper_done(uint32_t tl) &quot;tl=%d&quot;
win_helper_retry(uint32_t tl) &quot;tl=%d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_pr_managers(const char *json) &quot;%s&quot;
qmp_exit_query_pr_managers(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_eject(const char *json) &quot;%s&quot;
qmp_exit_eject(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_open_tray(const char *json) &quot;%s&quot;
qmp_exit_blockdev_open_tray(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_close_tray(const char *json) &quot;%s&quot;
qmp_exit_blockdev_close_tray(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_remove_medium(const char *json) &quot;%s&quot;
qmp_exit_blockdev_remove_medium(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_insert_medium(const char *json) &quot;%s&quot;
qmp_exit_blockdev_insert_medium(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_change_medium(const char *json) &quot;%s&quot;
qmp_exit_blockdev_change_medium(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_set_io_throttle(const char *json) &quot;%s&quot;
qmp_exit_block_set_io_throttle(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_latency_histogram_set(const char *json) &quot;%s&quot;
qmp_exit_block_latency_histogram_set(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_block(const char *json) &quot;%s&quot;
qmp_exit_query_block(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_blockstats(const char *json) &quot;%s&quot;
qmp_exit_query_blockstats(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_block_jobs(const char *json) &quot;%s&quot;
qmp_exit_query_block_jobs(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_resize(const char *json) &quot;%s&quot;
qmp_exit_block_resize(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_snapshot_sync(const char *json) &quot;%s&quot;
qmp_exit_blockdev_snapshot_sync(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_snapshot(const char *json) &quot;%s&quot;
qmp_exit_blockdev_snapshot(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_change_backing_file(const char *json) &quot;%s&quot;
qmp_exit_change_backing_file(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_commit(const char *json) &quot;%s&quot;
qmp_exit_block_commit(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_drive_backup(const char *json) &quot;%s&quot;
qmp_exit_drive_backup(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_backup(const char *json) &quot;%s&quot;
qmp_exit_blockdev_backup(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_named_block_nodes(const char *json) &quot;%s&quot;
qmp_exit_query_named_block_nodes(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_debug_query_block_graph(const char *json) &quot;%s&quot;
qmp_exit_x_debug_query_block_graph(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_drive_mirror(const char *json) &quot;%s&quot;
qmp_exit_drive_mirror(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_dirty_bitmap_add(const char *json) &quot;%s&quot;
qmp_exit_block_dirty_bitmap_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_dirty_bitmap_remove(const char *json) &quot;%s&quot;
qmp_exit_block_dirty_bitmap_remove(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_dirty_bitmap_clear(const char *json) &quot;%s&quot;
qmp_exit_block_dirty_bitmap_clear(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_dirty_bitmap_enable(const char *json) &quot;%s&quot;
qmp_exit_block_dirty_bitmap_enable(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_dirty_bitmap_disable(const char *json) &quot;%s&quot;
qmp_exit_block_dirty_bitmap_disable(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_dirty_bitmap_merge(const char *json) &quot;%s&quot;
qmp_exit_block_dirty_bitmap_merge(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_debug_block_dirty_bitmap_sha256(const char *json) &quot;%s&quot;
qmp_exit_x_debug_block_dirty_bitmap_sha256(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_mirror(const char *json) &quot;%s&quot;
qmp_exit_blockdev_mirror(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_stream(const char *json) &quot;%s&quot;
qmp_exit_block_stream(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_set_speed(const char *json) &quot;%s&quot;
qmp_exit_block_job_set_speed(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_cancel(const char *json) &quot;%s&quot;
qmp_exit_block_job_cancel(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_pause(const char *json) &quot;%s&quot;
qmp_exit_block_job_pause(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_resume(const char *json) &quot;%s&quot;
qmp_exit_block_job_resume(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_complete(const char *json) &quot;%s&quot;
qmp_exit_block_job_complete(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_dismiss(const char *json) &quot;%s&quot;
qmp_exit_block_job_dismiss(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_finalize(const char *json) &quot;%s&quot;
qmp_exit_block_job_finalize(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_job_change(const char *json) &quot;%s&quot;
qmp_exit_block_job_change(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_add(const char *json) &quot;%s&quot;
qmp_exit_blockdev_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_reopen(const char *json) &quot;%s&quot;
qmp_exit_blockdev_reopen(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_del(const char *json) &quot;%s&quot;
qmp_exit_blockdev_del(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_create(const char *json) &quot;%s&quot;
qmp_exit_blockdev_create(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_blockdev_amend(const char *json) &quot;%s&quot;
qmp_exit_x_blockdev_amend(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_set_write_threshold(const char *json) &quot;%s&quot;
qmp_exit_block_set_write_threshold(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_blockdev_change(const char *json) &quot;%s&quot;
qmp_exit_x_blockdev_change(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_blockdev_set_iothread(const char *json) &quot;%s&quot;
qmp_exit_x_blockdev_set_iothread(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_snapshot_internal_sync(const char *json) &quot;%s&quot;
qmp_exit_blockdev_snapshot_internal_sync(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_blockdev_snapshot_delete_internal_sync(const char *json) &quot;%s&quot;
qmp_exit_blockdev_snapshot_delete_internal_sync(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_nbd_server_start(const char *json) &quot;%s&quot;
qmp_exit_nbd_server_start(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_nbd_server_add(const char *json) &quot;%s&quot;
qmp_exit_nbd_server_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_nbd_server_remove(const char *json) &quot;%s&quot;
qmp_exit_nbd_server_remove(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_nbd_server_stop(const char *json) &quot;%s&quot;
qmp_exit_nbd_server_stop(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_export_add(const char *json) &quot;%s&quot;
qmp_exit_block_export_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_block_export_del(const char *json) &quot;%s&quot;
qmp_exit_block_export_del(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_block_exports(const char *json) &quot;%s&quot;
qmp_exit_query_block_exports(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_chardev(const char *json) &quot;%s&quot;
qmp_exit_query_chardev(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_chardev_backends(const char *json) &quot;%s&quot;
qmp_exit_query_chardev_backends(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_ringbuf_write(const char *json) &quot;%s&quot;
qmp_exit_ringbuf_write(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_ringbuf_read(const char *json) &quot;%s&quot;
qmp_exit_ringbuf_read(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_chardev_add(const char *json) &quot;%s&quot;
qmp_exit_chardev_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_chardev_change(const char *json) &quot;%s&quot;
qmp_exit_chardev_change(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_chardev_remove(const char *json) &quot;%s&quot;
qmp_exit_chardev_remove(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_chardev_send_break(const char *json) &quot;%s&quot;
qmp_exit_chardev_send_break(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_qmp_capabilities(const char *json) &quot;%s&quot;
qmp_exit_qmp_capabilities(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_version(const char *json) &quot;%s&quot;
qmp_exit_query_version(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_commands(const char *json) &quot;%s&quot;
qmp_exit_query_commands(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_quit(const char *json) &quot;%s&quot;
qmp_exit_quit(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_cxl_inject_general_media_event(const char *json) &quot;%s&quot;
qmp_exit_cxl_inject_general_media_event(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cxl_inject_dram_event(const char *json) &quot;%s&quot;
qmp_exit_cxl_inject_dram_event(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cxl_inject_memory_module_event(const char *json) &quot;%s&quot;
qmp_exit_cxl_inject_memory_module_event(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cxl_inject_poison(const char *json) &quot;%s&quot;
qmp_exit_cxl_inject_poison(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cxl_inject_uncorrectable_errors(const char *json) &quot;%s&quot;
qmp_exit_cxl_inject_uncorrectable_errors(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cxl_inject_correctable_error(const char *json) &quot;%s&quot;
qmp_exit_cxl_inject_correctable_error(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_dump_guest_memory(const char *json) &quot;%s&quot;
qmp_exit_dump_guest_memory(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_dump(const char *json) &quot;%s&quot;
qmp_exit_query_dump(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_dump_guest_memory_capability(const char *json) &quot;%s&quot;
qmp_exit_query_dump_guest_memory_capability(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_qmp_schema(const char *json) &quot;%s&quot;
qmp_exit_query_qmp_schema(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_job_pause(const char *json) &quot;%s&quot;
qmp_exit_job_pause(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_job_resume(const char *json) &quot;%s&quot;
qmp_exit_job_resume(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_job_cancel(const char *json) &quot;%s&quot;
qmp_exit_job_cancel(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_job_complete(const char *json) &quot;%s&quot;
qmp_exit_job_complete(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_job_dismiss(const char *json) &quot;%s&quot;
qmp_exit_job_dismiss(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_job_finalize(const char *json) &quot;%s&quot;
qmp_exit_job_finalize(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_jobs(const char *json) &quot;%s&quot;
qmp_exit_query_jobs(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_cpus_fast(const char *json) &quot;%s&quot;
qmp_exit_query_cpus_fast(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_machines(const char *json) &quot;%s&quot;
qmp_exit_query_machines(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_current_machine(const char *json) &quot;%s&quot;
qmp_exit_query_current_machine(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_target(const char *json) &quot;%s&quot;
qmp_exit_query_target(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_uuid(const char *json) &quot;%s&quot;
qmp_exit_query_uuid(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_vm_generation_id(const char *json) &quot;%s&quot;
qmp_exit_query_vm_generation_id(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_system_reset(const char *json) &quot;%s&quot;
qmp_exit_system_reset(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_system_powerdown(const char *json) &quot;%s&quot;
qmp_exit_system_powerdown(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_system_wakeup(const char *json) &quot;%s&quot;
qmp_exit_system_wakeup(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_inject_nmi(const char *json) &quot;%s&quot;
qmp_exit_inject_nmi(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_kvm(const char *json) &quot;%s&quot;
qmp_exit_query_kvm(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_memsave(const char *json) &quot;%s&quot;
qmp_exit_memsave(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_pmemsave(const char *json) &quot;%s&quot;
qmp_exit_pmemsave(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_memdev(const char *json) &quot;%s&quot;
qmp_exit_query_memdev(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_hotpluggable_cpus(const char *json) &quot;%s&quot;
qmp_exit_query_hotpluggable_cpus(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_set_numa_node(const char *json) &quot;%s&quot;
qmp_exit_set_numa_node(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_balloon(const char *json) &quot;%s&quot;
qmp_exit_balloon(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_balloon(const char *json) &quot;%s&quot;
qmp_exit_query_balloon(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_hv_balloon_status_report(const char *json) &quot;%s&quot;
qmp_exit_query_hv_balloon_status_report(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_memory_size_summary(const char *json) &quot;%s&quot;
qmp_exit_query_memory_size_summary(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_memory_devices(const char *json) &quot;%s&quot;
qmp_exit_query_memory_devices(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_irq(const char *json) &quot;%s&quot;
qmp_exit_x_query_irq(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_jit(const char *json) &quot;%s&quot;
qmp_exit_x_query_jit(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_numa(const char *json) &quot;%s&quot;
qmp_exit_x_query_numa(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_opcount(const char *json) &quot;%s&quot;
qmp_exit_x_query_opcount(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_ramblock(const char *json) &quot;%s&quot;
qmp_exit_x_query_ramblock(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_rdma(const char *json) &quot;%s&quot;
qmp_exit_x_query_rdma(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_roms(const char *json) &quot;%s&quot;
qmp_exit_x_query_roms(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_usb(const char *json) &quot;%s&quot;
qmp_exit_x_query_usb(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_dumpdtb(const char *json) &quot;%s&quot;
qmp_exit_dumpdtb(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_migrate(const char *json) &quot;%s&quot;
qmp_exit_query_migrate(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_set_capabilities(const char *json) &quot;%s&quot;
qmp_exit_migrate_set_capabilities(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_migrate_capabilities(const char *json) &quot;%s&quot;
qmp_exit_query_migrate_capabilities(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_set_parameters(const char *json) &quot;%s&quot;
qmp_exit_migrate_set_parameters(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_migrate_parameters(const char *json) &quot;%s&quot;
qmp_exit_query_migrate_parameters(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_start_postcopy(const char *json) &quot;%s&quot;
qmp_exit_migrate_start_postcopy(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_colo_lost_heartbeat(const char *json) &quot;%s&quot;
qmp_exit_x_colo_lost_heartbeat(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_cancel(const char *json) &quot;%s&quot;
qmp_exit_migrate_cancel(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_continue(const char *json) &quot;%s&quot;
qmp_exit_migrate_continue(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate(const char *json) &quot;%s&quot;
qmp_exit_migrate(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_incoming(const char *json) &quot;%s&quot;
qmp_exit_migrate_incoming(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_save_devices_state(const char *json) &quot;%s&quot;
qmp_exit_xen_save_devices_state(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_set_global_dirty_log(const char *json) &quot;%s&quot;
qmp_exit_xen_set_global_dirty_log(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_load_devices_state(const char *json) &quot;%s&quot;
qmp_exit_xen_load_devices_state(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_set_replication(const char *json) &quot;%s&quot;
qmp_exit_xen_set_replication(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_xen_replication_status(const char *json) &quot;%s&quot;
qmp_exit_query_xen_replication_status(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_colo_do_checkpoint(const char *json) &quot;%s&quot;
qmp_exit_xen_colo_do_checkpoint(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_colo_status(const char *json) &quot;%s&quot;
qmp_exit_query_colo_status(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_recover(const char *json) &quot;%s&quot;
qmp_exit_migrate_recover(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_migrate_pause(const char *json) &quot;%s&quot;
qmp_exit_migrate_pause(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_calc_dirty_rate(const char *json) &quot;%s&quot;
qmp_exit_calc_dirty_rate(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_dirty_rate(const char *json) &quot;%s&quot;
qmp_exit_query_dirty_rate(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_set_vcpu_dirty_limit(const char *json) &quot;%s&quot;
qmp_exit_set_vcpu_dirty_limit(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cancel_vcpu_dirty_limit(const char *json) &quot;%s&quot;
qmp_exit_cancel_vcpu_dirty_limit(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_vcpu_dirty_limit(const char *json) &quot;%s&quot;
qmp_exit_query_vcpu_dirty_limit(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_migrationthreads(const char *json) &quot;%s&quot;
qmp_exit_query_migrationthreads(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_snapshot_save(const char *json) &quot;%s&quot;
qmp_exit_snapshot_save(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_snapshot_load(const char *json) &quot;%s&quot;
qmp_exit_snapshot_load(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_snapshot_delete(const char *json) &quot;%s&quot;
qmp_exit_snapshot_delete(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_add_client(const char *json) &quot;%s&quot;
qmp_exit_add_client(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_name(const char *json) &quot;%s&quot;
qmp_exit_query_name(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_iothreads(const char *json) &quot;%s&quot;
qmp_exit_query_iothreads(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_stop(const char *json) &quot;%s&quot;
qmp_exit_stop(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_cont(const char *json) &quot;%s&quot;
qmp_exit_cont(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_exit_preconfig(const char *json) &quot;%s&quot;
qmp_exit_x_exit_preconfig(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_human_monitor_command(const char *json) &quot;%s&quot;
qmp_exit_human_monitor_command(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_getfd(const char *json) &quot;%s&quot;
qmp_exit_getfd(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_get_win32_socket(const char *json) &quot;%s&quot;
qmp_exit_get_win32_socket(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_closefd(const char *json) &quot;%s&quot;
qmp_exit_closefd(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_add_fd(const char *json) &quot;%s&quot;
qmp_exit_add_fd(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_remove_fd(const char *json) &quot;%s&quot;
qmp_exit_remove_fd(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_fdsets(const char *json) &quot;%s&quot;
qmp_exit_query_fdsets(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_command_line_options(const char *json) &quot;%s&quot;
qmp_exit_query_command_line_options(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_set_link(const char *json) &quot;%s&quot;
qmp_exit_set_link(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_netdev_add(const char *json) &quot;%s&quot;
qmp_exit_netdev_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_netdev_del(const char *json) &quot;%s&quot;
qmp_exit_netdev_del(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_rx_filter(const char *json) &quot;%s&quot;
qmp_exit_query_rx_filter(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_announce_self(const char *json) &quot;%s&quot;
qmp_exit_announce_self(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_qom_list(const char *json) &quot;%s&quot;
qmp_exit_qom_list(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_qom_get(const char *json) &quot;%s&quot;
qmp_exit_qom_get(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_qom_set(const char *json) &quot;%s&quot;
qmp_exit_qom_set(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_qom_list_types(const char *json) &quot;%s&quot;
qmp_exit_qom_list_types(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_qom_list_properties(const char *json) &quot;%s&quot;
qmp_exit_qom_list_properties(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_object_add(const char *json) &quot;%s&quot;
qmp_exit_object_add(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_object_del(const char *json) &quot;%s&quot;
qmp_exit_object_del(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_replay(const char *json) &quot;%s&quot;
qmp_exit_query_replay(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_replay_break(const char *json) &quot;%s&quot;
qmp_exit_replay_break(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_replay_delete_break(const char *json) &quot;%s&quot;
qmp_exit_replay_delete_break(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_replay_seek(const char *json) &quot;%s&quot;
qmp_exit_replay_seek(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_status(const char *json) &quot;%s&quot;
qmp_exit_query_status(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_watchdog_set_action(const char *json) &quot;%s&quot;
qmp_exit_watchdog_set_action(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_set_action(const char *json) &quot;%s&quot;
qmp_exit_set_action(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_stats(const char *json) &quot;%s&quot;
qmp_exit_query_stats(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_stats_schemas(const char *json) &quot;%s&quot;
qmp_exit_query_stats_schemas(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_trace_event_get_state(const char *json) &quot;%s&quot;
qmp_exit_trace_event_get_state(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_trace_event_set_state(const char *json) &quot;%s&quot;
qmp_exit_trace_event_set_state(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_transaction(const char *json) &quot;%s&quot;
qmp_exit_transaction(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_x_query_virtio(const char *json) &quot;%s&quot;
qmp_exit_x_query_virtio(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_virtio_status(const char *json) &quot;%s&quot;
qmp_exit_x_query_virtio_status(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_virtio_queue_status(const char *json) &quot;%s&quot;
qmp_exit_x_query_virtio_queue_status(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_virtio_vhost_queue_status(const char *json) &quot;%s&quot;
qmp_exit_x_query_virtio_vhost_queue_status(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_x_query_virtio_queue_element(const char *json) &quot;%s&quot;
qmp_exit_x_query_virtio_queue_element(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_yank(const char *json) &quot;%s&quot;
qmp_exit_yank(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_yank(const char *json) &quot;%s&quot;
qmp_exit_query_yank(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_acpi_ospm_status(const char *json) &quot;%s&quot;
qmp_exit_query_acpi_ospm_status(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_audiodevs(const char *json) &quot;%s&quot;
qmp_exit_query_audiodevs(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_cryptodev(const char *json) &quot;%s&quot;
qmp_exit_query_cryptodev(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_device_list_properties(const char *json) &quot;%s&quot;
qmp_exit_device_list_properties(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_device_del(const char *json) &quot;%s&quot;
qmp_exit_device_del(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_pci(const char *json) &quot;%s&quot;
qmp_exit_query_pci(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_rocker(const char *json) &quot;%s&quot;
qmp_exit_query_rocker(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_rocker_ports(const char *json) &quot;%s&quot;
qmp_exit_query_rocker_ports(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_rocker_of_dpa_flows(const char *json) &quot;%s&quot;
qmp_exit_query_rocker_of_dpa_flows(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_rocker_of_dpa_groups(const char *json) &quot;%s&quot;
qmp_exit_query_rocker_of_dpa_groups(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_tpm_models(const char *json) &quot;%s&quot;
qmp_exit_query_tpm_models(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_tpm_types(const char *json) &quot;%s&quot;
qmp_exit_query_tpm_types(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_tpm(const char *json) &quot;%s&quot;
qmp_exit_query_tpm(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_set_password(const char *json) &quot;%s&quot;
qmp_exit_set_password(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_expire_password(const char *json) &quot;%s&quot;
qmp_exit_expire_password(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_screendump(const char *json) &quot;%s&quot;
qmp_exit_screendump(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_spice(const char *json) &quot;%s&quot;
qmp_exit_query_spice(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_vnc(const char *json) &quot;%s&quot;
qmp_exit_query_vnc(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_vnc_servers(const char *json) &quot;%s&quot;
qmp_exit_query_vnc_servers(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_change_vnc_password(const char *json) &quot;%s&quot;
qmp_exit_change_vnc_password(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_mice(const char *json) &quot;%s&quot;
qmp_exit_query_mice(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_send_key(const char *json) &quot;%s&quot;
qmp_exit_send_key(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_input_send_event(const char *json) &quot;%s&quot;
qmp_exit_input_send_event(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_display_options(const char *json) &quot;%s&quot;
qmp_exit_query_display_options(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_display_reload(const char *json) &quot;%s&quot;
qmp_exit_display_reload(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_display_update(const char *json) &quot;%s&quot;
qmp_exit_display_update(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_client_migrate_info(const char *json) &quot;%s&quot;
qmp_exit_client_migrate_info(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_query_cpu_model_comparison(const char *json) &quot;%s&quot;
qmp_exit_query_cpu_model_comparison(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_cpu_model_baseline(const char *json) &quot;%s&quot;
qmp_exit_query_cpu_model_baseline(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_cpu_model_expansion(const char *json) &quot;%s&quot;
qmp_exit_query_cpu_model_expansion(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_cpu_definitions(const char *json) &quot;%s&quot;
qmp_exit_query_cpu_definitions(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_set_cpu_topology(const char *json) &quot;%s&quot;
qmp_exit_set_cpu_topology(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_s390x_cpu_polarization(const char *json) &quot;%s&quot;
qmp_exit_query_s390x_cpu_polarization(const char *result, bool succeeded) &quot;%s %d&quot;
# AUTOMATICALLY GENERATED by qapi-gen.py, DO NOT MODIFY

qmp_enter_rtc_reset_reinjection(const char *json) &quot;%s&quot;
qmp_exit_rtc_reset_reinjection(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_sev(const char *json) &quot;%s&quot;
qmp_exit_query_sev(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_sev_launch_measure(const char *json) &quot;%s&quot;
qmp_exit_query_sev_launch_measure(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_sev_capabilities(const char *json) &quot;%s&quot;
qmp_exit_query_sev_capabilities(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_sev_inject_launch_secret(const char *json) &quot;%s&quot;
qmp_exit_sev_inject_launch_secret(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_sev_attestation_report(const char *json) &quot;%s&quot;
qmp_exit_query_sev_attestation_report(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_dump_skeys(const char *json) &quot;%s&quot;
qmp_exit_dump_skeys(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_gic_capabilities(const char *json) &quot;%s&quot;
qmp_exit_query_gic_capabilities(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_sgx(const char *json) &quot;%s&quot;
qmp_exit_query_sgx(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_query_sgx_capabilities(const char *json) &quot;%s&quot;
qmp_exit_query_sgx_capabilities(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_event_list(const char *json) &quot;%s&quot;
qmp_exit_xen_event_list(const char *result, bool succeeded) &quot;%s %d&quot;
qmp_enter_xen_event_inject(const char *json) &quot;%s&quot;
qmp_exit_xen_event_inject(const char *result, bool succeeded) &quot;%s %d&quot;
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